< prev index next >

src/hotspot/cpu/x86/gc/shenandoah/shenandoahBarrierSetAssembler_x86.cpp

Print this page




 496       load_reference_barrier(masm, dst, src);
 497     }
 498 
 499     // Move loaded oop to final destination
 500     if (dst != result_dst) {
 501       __ movptr(result_dst, dst);
 502 
 503       if (!use_tmp1_for_dst) {
 504         __ pop(dst);
 505       }
 506 
 507       dst = result_dst;
 508     }
 509   } else {
 510     BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
 511   }
 512 
 513   // 3: apply keep-alive barrier if needed
 514   if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
 515     __ push_IU_state();













 516     Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread);
 517     assert_different_registers(dst, tmp1, tmp_thread);
 518     if (!thread->is_valid()) {
 519       thread = rdx;
 520     }
 521     NOT_LP64(__ get_thread(thread));
 522     // Generate the SATB pre-barrier code to log the value of
 523     // the referent field in an SATB buffer.
 524     shenandoah_write_barrier_pre(masm /* masm */,
 525                                  noreg /* obj */,
 526                                  dst /* pre_val */,
 527                                  thread /* thread */,
 528                                  tmp1 /* tmp */,
 529                                  true /* tosca_live */,
 530                                  true /* expand_call */);









 531     __ pop_IU_state();
 532   }
 533 }
 534 
 535 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 536               Address dst, Register val, Register tmp1, Register tmp2) {
 537 
 538   bool on_oop = is_reference_type(type);
 539   bool in_heap = (decorators & IN_HEAP) != 0;
 540   bool as_normal = (decorators & AS_NORMAL) != 0;
 541   if (on_oop && in_heap) {
 542     bool needs_pre_barrier = as_normal;
 543 
 544     Register tmp3 = LP64_ONLY(r8) NOT_LP64(rsi);
 545     Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
 546     // flatten object address if needed
 547     // We do it regardless of precise because we need the registers
 548     if (dst.index() == noreg && dst.disp() == 0) {
 549       if (dst.base() != tmp1) {
 550         __ movptr(tmp1, dst.base());




 496       load_reference_barrier(masm, dst, src);
 497     }
 498 
 499     // Move loaded oop to final destination
 500     if (dst != result_dst) {
 501       __ movptr(result_dst, dst);
 502 
 503       if (!use_tmp1_for_dst) {
 504         __ pop(dst);
 505       }
 506 
 507       dst = result_dst;
 508     }
 509   } else {
 510     BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
 511   }
 512 
 513   // 3: apply keep-alive barrier if needed
 514   if (ShenandoahBarrierSet::need_keep_alive_barrier(decorators, type)) {
 515     __ push_IU_state();
 516     // That path can be reached from the c2i adapter with live fp
 517     // arguments in registers.
 518     LP64_ONLY(assert(Argument::n_float_register_parameters_j == 8, "8 fp registers to save at java call"));
 519     __ subptr(rsp, 64);
 520     __ movdbl(Address(rsp, 0), xmm0);
 521     __ movdbl(Address(rsp, 8), xmm1);
 522     __ movdbl(Address(rsp, 16), xmm2);
 523     __ movdbl(Address(rsp, 24), xmm3);
 524     __ movdbl(Address(rsp, 32), xmm4);
 525     __ movdbl(Address(rsp, 40), xmm5);
 526     __ movdbl(Address(rsp, 48), xmm6);
 527     __ movdbl(Address(rsp, 56), xmm7);
 528 
 529     Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread);
 530     assert_different_registers(dst, tmp1, tmp_thread);
 531     if (!thread->is_valid()) {
 532       thread = rdx;
 533     }
 534     NOT_LP64(__ get_thread(thread));
 535     // Generate the SATB pre-barrier code to log the value of
 536     // the referent field in an SATB buffer.
 537     shenandoah_write_barrier_pre(masm /* masm */,
 538                                  noreg /* obj */,
 539                                  dst /* pre_val */,
 540                                  thread /* thread */,
 541                                  tmp1 /* tmp */,
 542                                  true /* tosca_live */,
 543                                  true /* expand_call */);
 544     __ movdbl(xmm0, Address(rsp, 0));
 545     __ movdbl(xmm1, Address(rsp, 8));
 546     __ movdbl(xmm2, Address(rsp, 16));
 547     __ movdbl(xmm3, Address(rsp, 24));
 548     __ movdbl(xmm4, Address(rsp, 32));
 549     __ movdbl(xmm5, Address(rsp, 40));
 550     __ movdbl(xmm6, Address(rsp, 48));
 551     __ movdbl(xmm7, Address(rsp, 56));
 552     __ addptr(rsp, 64);
 553     __ pop_IU_state();
 554   }
 555 }
 556 
 557 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 558               Address dst, Register val, Register tmp1, Register tmp2) {
 559 
 560   bool on_oop = is_reference_type(type);
 561   bool in_heap = (decorators & IN_HEAP) != 0;
 562   bool as_normal = (decorators & AS_NORMAL) != 0;
 563   if (on_oop && in_heap) {
 564     bool needs_pre_barrier = as_normal;
 565 
 566     Register tmp3 = LP64_ONLY(r8) NOT_LP64(rsi);
 567     Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
 568     // flatten object address if needed
 569     // We do it regardless of precise because we need the registers
 570     if (dst.index() == noreg && dst.disp() == 0) {
 571       if (dst.base() != tmp1) {
 572         __ movptr(tmp1, dst.base());


< prev index next >