src/cpu/sparc/vm/assembler_sparc.hpp

*** 1031,1041 ****
    void smulcc( Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(smul_op3 | cc_bit_op3) | rs1(s1) | rs2(s2) ); }
    void smulcc( Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(smul_op3 | cc_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
  
    // pp 201
  
!   void nop() { emit_int32( op(branch_op) | op2(sethi_op2) ); }
  
    void sw_count() { emit_int32( op(branch_op) | op2(sethi_op2) | 0x3f0 ); }
  
    // pp 202
  
--- 1031,1044 ----
    void smulcc( Register s1, Register s2, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(smul_op3 | cc_bit_op3) | rs1(s1) | rs2(s2) ); }
    void smulcc( Register s1, int simm13a, Register d ) { emit_int32( op(arith_op) | rd(d) | op3(smul_op3 | cc_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13) ); }
  
    // pp 201
  
!   void nop(int count = 1) {
!     for(int i = 0; i < count; i++)
!       emit_int32( op(branch_op) | op2(sethi_op2) );
!   }
  
    void sw_count() { emit_int32( op(branch_op) | op2(sethi_op2) | 0x3f0 ); }
  
    // pp 202