1 /*
2 * Copyright (c) 2003, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_INLINE_HPP
26 #define OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_INLINE_HPP
27
28 #include "runtime/atomic.hpp"
29 #include "runtime/orderAccess.hpp"
30 #include "vm_version_x86.hpp"
31
32 #pragma warning(disable: 4035) // Disables warnings reporting missing return statement
33
34 // Implementation of class OrderAccess.
35
36 inline void OrderAccess::loadload() { acquire(); }
37 inline void OrderAccess::storestore() { release(); }
38 inline void OrderAccess::loadstore() { acquire(); }
39 inline void OrderAccess::storeload() { fence(); }
40
41 inline void OrderAccess::acquire() {
42 #ifndef AMD64
43 __asm {
44 mov eax, dword ptr [esp];
45 }
46 #endif // !AMD64
47 }
48
49 inline void OrderAccess::release() {
50 // A volatile store has release semantics.
51 volatile jint local_dummy = 0;
52 }
53
54 inline void OrderAccess::fence() {
55 #ifdef AMD64
56 StubRoutines_fence();
57 #else
58 if (os::is_MP()) {
59 __asm {
60 lock add dword ptr [esp], 0;
61 }
62 }
63 #endif // AMD64
64 }
65
66 inline jbyte OrderAccess::load_acquire(volatile jbyte* p) { return *p; }
67 inline jshort OrderAccess::load_acquire(volatile jshort* p) { return *p; }
68 inline jint OrderAccess::load_acquire(volatile jint* p) { return *p; }
69 inline jlong OrderAccess::load_acquire(volatile jlong* p) { return Atomic::load(p); }
70 inline jubyte OrderAccess::load_acquire(volatile jubyte* p) { return *p; }
71 inline jushort OrderAccess::load_acquire(volatile jushort* p) { return *p; }
72 inline juint OrderAccess::load_acquire(volatile juint* p) { return *p; }
73 inline julong OrderAccess::load_acquire(volatile julong* p) { return Atomic::load((volatile jlong*)p); }
74 inline jfloat OrderAccess::load_acquire(volatile jfloat* p) { return *p; }
75 inline jdouble OrderAccess::load_acquire(volatile jdouble* p) { return *p; }
76
77 inline intptr_t OrderAccess::load_ptr_acquire(volatile intptr_t* p) { return *p; }
78 inline void* OrderAccess::load_ptr_acquire(volatile void* p) { return *(void* volatile *)p; }
79 inline void* OrderAccess::load_ptr_acquire(const volatile void* p) { return *(void* const volatile *)p; }
80
81 inline void OrderAccess::release_store(volatile jbyte* p, jbyte v) { *p = v; }
82 inline void OrderAccess::release_store(volatile jshort* p, jshort v) { *p = v; }
83 inline void OrderAccess::release_store(volatile jint* p, jint v) { *p = v; }
84 inline void OrderAccess::release_store(volatile jlong* p, jlong v) { Atomic::store(v, p); }
85 inline void OrderAccess::release_store(volatile jubyte* p, jubyte v) { *p = v; }
86 inline void OrderAccess::release_store(volatile jushort* p, jushort v) { *p = v; }
87 inline void OrderAccess::release_store(volatile juint* p, juint v) { *p = v; }
88 inline void OrderAccess::release_store(volatile julong* p, julong v) { Atomic::store((jlong)v, (volatile jlong*)p); }
89 inline void OrderAccess::release_store(volatile jfloat* p, jfloat v) { *p = v; }
90 inline void OrderAccess::release_store(volatile jdouble* p, jdouble v) { *p = v; }
91
92 inline void OrderAccess::release_store_ptr(volatile intptr_t* p, intptr_t v) { *p = v; }
93 inline void OrderAccess::release_store_ptr(volatile void* p, void* v) { *(void* volatile *)p = v; }
94
95 inline void OrderAccess::store_fence(jbyte* p, jbyte v) {
96 #ifdef AMD64
97 *p = v; fence();
98 #else
99 __asm {
100 mov edx, p;
101 mov al, v;
102 xchg al, byte ptr [edx];
103 }
104 #endif // AMD64
105 }
106
107 inline void OrderAccess::store_fence(jshort* p, jshort v) {
108 #ifdef AMD64
109 *p = v; fence();
110 #else
111 __asm {
112 mov edx, p;
113 mov ax, v;
114 xchg ax, word ptr [edx];
115 }
116 #endif // AMD64
117 }
118
119 inline void OrderAccess::store_fence(jint* p, jint v) {
120 #ifdef AMD64
121 *p = v; fence();
122 #else
123 __asm {
124 mov edx, p;
125 mov eax, v;
126 xchg eax, dword ptr [edx];
127 }
128 #endif // AMD64
129 }
130
131 inline void OrderAccess::store_fence(jlong* p, jlong v) { *p = v; fence(); }
132 inline void OrderAccess::store_fence(jubyte* p, jubyte v) { store_fence((jbyte*)p, (jbyte)v); }
133 inline void OrderAccess::store_fence(jushort* p, jushort v) { store_fence((jshort*)p, (jshort)v); }
134 inline void OrderAccess::store_fence(juint* p, juint v) { store_fence((jint*)p, (jint)v); }
135 inline void OrderAccess::store_fence(julong* p, julong v) { store_fence((jlong*)p, (jlong)v); }
136 inline void OrderAccess::store_fence(jfloat* p, jfloat v) { *p = v; fence(); }
137 inline void OrderAccess::store_fence(jdouble* p, jdouble v) { *p = v; fence(); }
138
139 inline void OrderAccess::store_ptr_fence(intptr_t* p, intptr_t v) {
140 #ifdef AMD64
141 *p = v; fence();
142 #else
143 store_fence((jint*)p, (jint)v);
144 #endif // AMD64
145 }
146
147 inline void OrderAccess::store_ptr_fence(void** p, void* v) {
148 #ifdef AMD64
149 *p = v; fence();
150 #else
151 store_fence((jint*)p, (jint)v);
152 #endif // AMD64
153 }
154
155 // Must duplicate definitions instead of calling store_fence because we don't want to cast away volatile.
156 inline void OrderAccess::release_store_fence(volatile jbyte* p, jbyte v) {
157 #ifdef AMD64
158 *p = v; fence();
159 #else
160 __asm {
161 mov edx, p;
162 mov al, v;
163 xchg al, byte ptr [edx];
164 }
165 #endif // AMD64
166 }
167
168 inline void OrderAccess::release_store_fence(volatile jshort* p, jshort v) {
169 #ifdef AMD64
170 *p = v; fence();
171 #else
172 __asm {
173 mov edx, p;
174 mov ax, v;
175 xchg ax, word ptr [edx];
176 }
177 #endif // AMD64
178 }
179
180 inline void OrderAccess::release_store_fence(volatile jint* p, jint v) {
181 #ifdef AMD64
182 *p = v; fence();
183 #else
184 __asm {
185 mov edx, p;
186 mov eax, v;
187 xchg eax, dword ptr [edx];
188 }
189 #endif // AMD64
190 }
191
192 inline void OrderAccess::release_store_fence(volatile jlong* p, jlong v) { release_store(p, v); fence(); }
193
194 inline void OrderAccess::release_store_fence(volatile jubyte* p, jubyte v) { release_store_fence((volatile jbyte*)p, (jbyte)v); }
195 inline void OrderAccess::release_store_fence(volatile jushort* p, jushort v) { release_store_fence((volatile jshort*)p, (jshort)v); }
196 inline void OrderAccess::release_store_fence(volatile juint* p, juint v) { release_store_fence((volatile jint*)p, (jint)v); }
197 inline void OrderAccess::release_store_fence(volatile julong* p, julong v) { release_store_fence((volatile jlong*)p, (jlong)v); }
198 inline void OrderAccess::release_store_fence(volatile jfloat* p, jfloat v) { *p = v; fence(); }
199 inline void OrderAccess::release_store_fence(volatile jdouble* p, jdouble v) { *p = v; fence(); }
200
201 inline void OrderAccess::release_store_ptr_fence(volatile intptr_t* p, intptr_t v) {
202 #ifdef AMD64
203 *p = v; fence();
204 #else
205 release_store_fence((volatile jint*)p, (jint)v);
206 #endif // AMD64
207 }
208
209 inline void OrderAccess::release_store_ptr_fence(volatile void* p, void* v) {
210 #ifdef AMD64
211 *(void* volatile *)p = v; fence();
212 #else
213 release_store_fence((volatile jint*)p, (jint)v);
214 #endif // AMD64
215 }
216
217 #pragma warning(default: 4035) // Enables warnings reporting missing return statement
218
219 #endif // OS_CPU_WINDOWS_X86_VM_ORDERACCESS_WINDOWS_X86_INLINE_HPP