5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 public: 26 27 enum { 28 nof_reg_args = 6, // registers o0-o5 are available for parameter passing 29 first_available_sp_in_frame = frame::memory_parameter_word_sp_offset * BytesPerWord, 30 frame_pad_in_bytes = 0 31 }; 32 33 static const int pd_c_runtime_reserved_arg_size; 34 35 static LIR_Opr G0_opr; 36 static LIR_Opr G1_opr; 37 static LIR_Opr G2_opr; 38 static LIR_Opr G3_opr; 39 static LIR_Opr G4_opr; 40 static LIR_Opr G5_opr; 41 static LIR_Opr G6_opr; 42 static LIR_Opr G7_opr; 43 static LIR_Opr O0_opr; 44 static LIR_Opr O1_opr; 134 static LIR_Opr as_long_opr(Register r) { 135 return as_long_pair_opr(r); 136 } 137 static LIR_Opr as_pointer_opr(Register r) { 138 return as_opr(r); 139 } 140 #endif 141 static LIR_Opr as_float_opr(FloatRegister r) { 142 return LIR_OprFact::single_fpu(r->encoding()); 143 } 144 static LIR_Opr as_double_opr(FloatRegister r) { 145 return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding()); 146 } 147 148 static FloatRegister nr2floatreg (int rnr); 149 150 static VMReg fpu_regname (int n); 151 152 static bool is_caller_save_register (LIR_Opr reg); 153 static bool is_caller_save_register (Register r); | 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP 26 #define CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP 27 28 public: 29 30 enum { 31 nof_reg_args = 6, // registers o0-o5 are available for parameter passing 32 first_available_sp_in_frame = frame::memory_parameter_word_sp_offset * BytesPerWord, 33 frame_pad_in_bytes = 0 34 }; 35 36 static const int pd_c_runtime_reserved_arg_size; 37 38 static LIR_Opr G0_opr; 39 static LIR_Opr G1_opr; 40 static LIR_Opr G2_opr; 41 static LIR_Opr G3_opr; 42 static LIR_Opr G4_opr; 43 static LIR_Opr G5_opr; 44 static LIR_Opr G6_opr; 45 static LIR_Opr G7_opr; 46 static LIR_Opr O0_opr; 47 static LIR_Opr O1_opr; 137 static LIR_Opr as_long_opr(Register r) { 138 return as_long_pair_opr(r); 139 } 140 static LIR_Opr as_pointer_opr(Register r) { 141 return as_opr(r); 142 } 143 #endif 144 static LIR_Opr as_float_opr(FloatRegister r) { 145 return LIR_OprFact::single_fpu(r->encoding()); 146 } 147 static LIR_Opr as_double_opr(FloatRegister r) { 148 return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding()); 149 } 150 151 static FloatRegister nr2floatreg (int rnr); 152 153 static VMReg fpu_regname (int n); 154 155 static bool is_caller_save_register (LIR_Opr reg); 156 static bool is_caller_save_register (Register r); 157 158 #endif // CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP |