src/cpu/sparc/vm/c1_LIRAssembler_sparc.hpp

@@ -20,10 +20,13 @@
  * or visit www.oracle.com if you need additional information or have any
  * questions.
  *
  */
 
+#ifndef CPU_SPARC_VM_C1_LIRASSEMBLER_SPARC_HPP
+#define CPU_SPARC_VM_C1_LIRASSEMBLER_SPARC_HPP
+
  private:
 
   //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
   //
   // Sparc load/store emission

@@ -88,5 +91,7 @@
 #else
          call_stub_size = 20,
 #endif // _LP64
          exception_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(10*4),
          deopt_handler_size = DEBUG_ONLY(1*K) NOT_DEBUG(10*4) };
+
+#endif // CPU_SPARC_VM_C1_LIRASSEMBLER_SPARC_HPP