src/cpu/x86/vm/nativeInst_x86.hpp

*** 1,7 ****
  /*
!  * Copyright (c) 1997, 2008, Oracle and/or its affiliates. All rights reserved.
   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   *
   * This code is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License version 2 only, as
   * published by the Free Software Foundation.
--- 1,7 ----
  /*
!  * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   *
   * This code is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License version 2 only, as
   * published by the Free Software Foundation.
*** 20,29 ****
--- 20,38 ----
   * or visit www.oracle.com if you need additional information or have any
   * questions.
   *
   */
  
+ #ifndef CPU_X86_VM_NATIVEINST_X86_HPP
+ #define CPU_X86_VM_NATIVEINST_X86_HPP
+ 
+ #include "asm/assembler.hpp"
+ #include "memory/allocation.hpp"
+ #include "runtime/icache.hpp"
+ #include "runtime/os.hpp"
+ #include "utilities/top.hpp"
+ 
  // We have interfaces for the following instructions:
  // - NativeInstruction
  // - - NativeCall
  // - - NativeMovConstReg
  // - - NativeMovConstRegPatching
*** 545,549 ****
--- 554,560 ----
            (ubyte_at(1) & (0xff ^ NativeMovConstReg::register_mask)) == 0xB8);
  #else
    return false;
  #endif // AMD64
  }
+ 
+ #endif // CPU_X86_VM_NATIVEINST_X86_HPP