1 /* 2 * Copyright (c) 1998, 2010, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_VM_CODE_VMREG_HPP 26 #define SHARE_VM_CODE_VMREG_HPP 27 28 #include "memory/allocation.hpp" 29 #include "utilities/globalDefinitions.hpp" 30 #ifdef TARGET_ARCH_x86 31 # include "register_x86.hpp" 32 #endif 33 #ifdef TARGET_ARCH_sparc 34 # include "register_sparc.hpp" 35 #endif 36 #ifdef TARGET_ARCH_zero 37 # include "register_zero.hpp" 38 #endif 39 #ifdef COMPILER2 40 #include "opto/adlcVMDeps.hpp" 41 #include "utilities/ostream.hpp" 42 #ifdef TARGET_ARCH_MODEL_x86_32 43 # include "adfiles/adGlobals_x86_32.hpp" 44 #endif 45 #ifdef TARGET_ARCH_MODEL_x86_64 46 # include "adfiles/adGlobals_x86_64.hpp" 47 #endif 48 #ifdef TARGET_ARCH_MODEL_sparc 49 # include "adfiles/adGlobals_sparc.hpp" 50 #endif 51 #ifdef TARGET_ARCH_MODEL_zero 52 # include "adfiles/adGlobals_zero.hpp" 53 #endif 54 #endif 55 56 //------------------------------VMReg------------------------------------------ 57 // The VM uses 'unwarped' stack slots; the compiler uses 'warped' stack slots. 58 // Register numbers below VMRegImpl::stack0 are the same for both. Register 59 // numbers above stack0 are either warped (in the compiler) or unwarped 60 // (in the VM). Unwarped numbers represent stack indices, offsets from 61 // the current stack pointer. Warped numbers are required during compilation 62 // when we do not yet know how big the frame will be. 63 64 class VMRegImpl; 65 typedef VMRegImpl* VMReg; 66 67 class VMRegImpl { 68 // friend class OopMap; 69 friend class VMStructs; 70 friend class OptoReg; 71 // friend class Location; 72 private: 73 enum { 74 BAD = -1 75 }; 76 77 78 79 static VMReg stack0; 80 // Names for registers 81 static const char *regName[]; 82 static const int register_count; 83 84 85 public: 86 87 static VMReg as_VMReg(int val, bool bad_ok = false) { assert(val > BAD || bad_ok, "invalid"); return (VMReg) (intptr_t) val; } 88 89 const char* name() { 90 if (is_reg()) { 91 return regName[value()]; 92 } else if (!is_valid()) { 93 return "BAD"; 94 } else { 95 // shouldn't really be called with stack 96 return "STACKED REG"; 97 } 98 } 99 static VMReg Bad() { return (VMReg) (intptr_t) BAD; } 100 bool is_valid() const { return ((intptr_t) this) != BAD; } 101 bool is_stack() const { return (intptr_t) this >= (intptr_t) stack0; } 102 bool is_reg() const { return is_valid() && !is_stack(); } 103 104 // A concrete register is a value that returns true for is_reg() and is 105 // also a register you could use in the assembler. On machines with 106 // 64bit registers only one half of the VMReg (and OptoReg) is considered 107 // concrete. 108 bool is_concrete(); 109 110 // VMRegs are 4 bytes wide on all platforms 111 static const int stack_slot_size; 112 static const int slots_per_word; 113 114 115 // This really ought to check that the register is "real" in the sense that 116 // we don't try and get the VMReg number of a physical register that doesn't 117 // have an expressible part. That would be pd specific code 118 VMReg next() { 119 assert((is_reg() && value() < stack0->value() - 1) || is_stack(), "must be"); 120 return (VMReg)(intptr_t)(value() + 1); 121 } 122 VMReg prev() { 123 assert((is_stack() && value() > stack0->value()) || (is_reg() && value() != 0), "must be"); 124 return (VMReg)(intptr_t)(value() - 1); 125 } 126 127 128 intptr_t value() const {return (intptr_t) this; } 129 130 void print_on(outputStream* st) const; 131 void print() const { print_on(tty); } 132 133 // bias a stack slot. 134 // Typically used to adjust a virtual frame slots by amounts that are offset by 135 // amounts that are part of the native abi. The VMReg must be a stack slot 136 // and the result must be also. 137 138 VMReg bias(int offset) { 139 assert(is_stack(), "must be"); 140 // VMReg res = VMRegImpl::as_VMReg(value() + offset); 141 VMReg res = stack2reg(reg2stack() + offset); 142 assert(res->is_stack(), "must be"); 143 return res; 144 } 145 146 // Convert register numbers to stack slots and vice versa 147 static VMReg stack2reg( int idx ) { 148 return (VMReg) (intptr_t) (stack0->value() + idx); 149 } 150 151 uintptr_t reg2stack() { 152 assert( is_stack(), "Not a stack-based register" ); 153 return value() - stack0->value(); 154 } 155 156 static void set_regName(); 157 158 #ifdef TARGET_ARCH_x86 159 # include "vmreg_x86.hpp" 160 #endif 161 #ifdef TARGET_ARCH_sparc 162 # include "vmreg_sparc.hpp" 163 #endif 164 #ifdef TARGET_ARCH_zero 165 # include "vmreg_zero.hpp" 166 #endif 167 168 169 }; 170 171 //---------------------------VMRegPair------------------------------------------- 172 // Pairs of 32-bit registers for arguments. 173 // SharedRuntime::java_calling_convention will overwrite the structs with 174 // the calling convention's registers. VMRegImpl::Bad is returned for any 175 // unused 32-bit register. This happens for the unused high half of Int 176 // arguments, or for 32-bit pointers or for longs in the 32-bit sparc build 177 // (which are passed to natives in low 32-bits of e.g. O0/O1 and the high 178 // 32-bits of O0/O1 are set to VMRegImpl::Bad). Longs in one register & doubles 179 // always return a high and a low register, as do 64-bit pointers. 180 // 181 class VMRegPair { 182 private: 183 VMReg _second; 184 VMReg _first; 185 public: 186 void set_bad ( ) { _second=VMRegImpl::Bad(); _first=VMRegImpl::Bad(); } 187 void set1 ( VMReg v ) { _second=VMRegImpl::Bad(); _first=v; } 188 void set2 ( VMReg v ) { _second=v->next(); _first=v; } 189 void set_pair( VMReg second, VMReg first ) { _second= second; _first= first; } 190 void set_ptr ( VMReg ptr ) { 191 #ifdef _LP64 192 _second = ptr->next(); 193 #else 194 _second = VMRegImpl::Bad(); 195 #endif 196 _first = ptr; 197 } 198 // Return true if single register, even if the pair is really just adjacent stack slots 199 bool is_single_reg() const { 200 return (_first->is_valid()) && (_first->value() + 1 == _second->value()); 201 } 202 203 // Return true if single stack based "register" where the slot alignment matches input alignment 204 bool is_adjacent_on_stack(int alignment) const { 205 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0)); 206 } 207 208 // Return true if single stack based "register" where the slot alignment matches input alignment 209 bool is_adjacent_aligned_on_stack(int alignment) const { 210 return (_first->is_stack() && (_first->value() + 1 == _second->value()) && ((_first->value() & (alignment-1)) == 0)); 211 } 212 213 // Return true if single register but adjacent stack slots do not count 214 bool is_single_phys_reg() const { 215 return (_first->is_reg() && (_first->value() + 1 == _second->value())); 216 } 217 218 VMReg second() const { return _second; } 219 VMReg first() const { return _first; } 220 VMRegPair(VMReg s, VMReg f) { _second = s; _first = f; } 221 VMRegPair(VMReg f) { _second = VMRegImpl::Bad(); _first = f; } 222 VMRegPair() { _second = VMRegImpl::Bad(); _first = VMRegImpl::Bad(); } 223 }; 224 225 #endif // SHARE_VM_CODE_VMREG_HPP