src/cpu/x86/vm/assembler_x86.inline.hpp

@@ -1,7 +1,7 @@
 /*
- * Copyright (c) 1997, 2008, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  *
  * This code is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License version 2 only, as
  * published by the Free Software Foundation.

@@ -20,10 +20,18 @@
  * or visit www.oracle.com if you need additional information or have any
  * questions.
  *
  */
 
+#ifndef CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
+#define CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP
+
+#include "asm/assembler.inline.hpp"
+#include "asm/codeBuffer.hpp"
+#include "code/codeCache.hpp"
+#include "runtime/handles.inline.hpp"
+
 inline void MacroAssembler::pd_patch_instruction(address branch, address target) {
   unsigned char op = branch[0];
   assert(op == 0xE8 /* call */ ||
          op == 0xE9 /* jmp */ ||
          op == 0xEB /* short jmp */ ||

@@ -83,5 +91,7 @@
   *(jlong*) _code_pos = x;
   _code_pos += sizeof(jlong);
   code_section()->set_end(_code_pos);
 }
 #endif // _LP64
+
+#endif // CPU_X86_VM_ASSEMBLER_X86_INLINE_HPP