1 /*
2 * Copyright (c) 2005, 2008, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 inline bool LinearScan::is_processed_reg_num(int reg_num) {
26 #ifndef _LP64
27 // rsp and rbp (numbers 6 ancd 7) are ignored
28 assert(FrameMap::rsp_opr->cpu_regnr() == 6, "wrong assumption below");
29 assert(FrameMap::rbp_opr->cpu_regnr() == 7, "wrong assumption below");
30 assert(reg_num >= 0, "invalid reg_num");
31
32 return reg_num < 6 || reg_num > 7;
33 #else
34 // rsp and rbp, r10, r15 (numbers 6 ancd 7) are ignored
35 assert(FrameMap::r10_opr->cpu_regnr() == 12, "wrong assumption below");
36 assert(FrameMap::r15_opr->cpu_regnr() == 13, "wrong assumption below");
37 assert(FrameMap::rsp_opr->cpu_regnrLo() == 14, "wrong assumption below");
38 assert(FrameMap::rbp_opr->cpu_regnrLo() == 15, "wrong assumption below");
39 assert(reg_num >= 0, "invalid reg_num");
40
41 return reg_num < 12 || reg_num > 15;
42 #endif // _LP64
43 }
44
168
169 #ifndef PRODUCT
170 void check_invalid_lir_op(LIR_Op* op);
171 #endif
172
173 // Helper functions for merging of fpu stacks
174 void merge_insert_add(LIR_List* instrs, FpuStackSim* cur_sim, int reg);
175 void merge_insert_xchg(LIR_List* instrs, FpuStackSim* cur_sim, int slot);
176 void merge_insert_pop(LIR_List* instrs, FpuStackSim* cur_sim);
177 bool merge_rename(FpuStackSim* cur_sim, FpuStackSim* sux_sim, int start_slot, int change_slot);
178 void merge_fpu_stack(LIR_List* instrs, FpuStackSim* cur_sim, FpuStackSim* sux_sim);
179 void merge_cleanup_fpu_stack(LIR_List* instrs, FpuStackSim* cur_sim, BitMap& live_fpu_regs);
180 bool merge_fpu_stack_with_successors(BlockBegin* block);
181
182 public:
183 LIR_Opr to_fpu_stack(LIR_Opr opr); // used by LinearScan for creation of debug information
184
185 FpuStackAllocator(Compilation* compilation, LinearScan* allocator);
186 void allocate();
187 };
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1 /*
2 * Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_VM_C1_LINEARSCAN_X86_HPP
26 #define CPU_X86_VM_C1_LINEARSCAN_X86_HPP
27
28 inline bool LinearScan::is_processed_reg_num(int reg_num) {
29 #ifndef _LP64
30 // rsp and rbp (numbers 6 ancd 7) are ignored
31 assert(FrameMap::rsp_opr->cpu_regnr() == 6, "wrong assumption below");
32 assert(FrameMap::rbp_opr->cpu_regnr() == 7, "wrong assumption below");
33 assert(reg_num >= 0, "invalid reg_num");
34
35 return reg_num < 6 || reg_num > 7;
36 #else
37 // rsp and rbp, r10, r15 (numbers 6 ancd 7) are ignored
38 assert(FrameMap::r10_opr->cpu_regnr() == 12, "wrong assumption below");
39 assert(FrameMap::r15_opr->cpu_regnr() == 13, "wrong assumption below");
40 assert(FrameMap::rsp_opr->cpu_regnrLo() == 14, "wrong assumption below");
41 assert(FrameMap::rbp_opr->cpu_regnrLo() == 15, "wrong assumption below");
42 assert(reg_num >= 0, "invalid reg_num");
43
44 return reg_num < 12 || reg_num > 15;
45 #endif // _LP64
46 }
47
171
172 #ifndef PRODUCT
173 void check_invalid_lir_op(LIR_Op* op);
174 #endif
175
176 // Helper functions for merging of fpu stacks
177 void merge_insert_add(LIR_List* instrs, FpuStackSim* cur_sim, int reg);
178 void merge_insert_xchg(LIR_List* instrs, FpuStackSim* cur_sim, int slot);
179 void merge_insert_pop(LIR_List* instrs, FpuStackSim* cur_sim);
180 bool merge_rename(FpuStackSim* cur_sim, FpuStackSim* sux_sim, int start_slot, int change_slot);
181 void merge_fpu_stack(LIR_List* instrs, FpuStackSim* cur_sim, FpuStackSim* sux_sim);
182 void merge_cleanup_fpu_stack(LIR_List* instrs, FpuStackSim* cur_sim, BitMap& live_fpu_regs);
183 bool merge_fpu_stack_with_successors(BlockBegin* block);
184
185 public:
186 LIR_Opr to_fpu_stack(LIR_Opr opr); // used by LinearScan for creation of debug information
187
188 FpuStackAllocator(Compilation* compilation, LinearScan* allocator);
189 void allocate();
190 };
191
192 #endif // CPU_X86_VM_C1_LINEARSCAN_X86_HPP
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