src/cpu/x86/vm/icache_x86.cpp

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   1 /*
   2  * Copyright (c) 1997, 2008, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "incls/_precompiled.incl"
  26 #include "incls/_icache_x86.cpp.incl"

  27 
  28 #define __ _masm->
  29 
  30 void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {
  31   StubCodeMark mark(this, "ICache", "flush_icache_stub");
  32 
  33   address start = __ pc();
  34 #ifdef AMD64
  35 
  36   const Register addr  = c_rarg0;
  37   const Register lines = c_rarg1;
  38   const Register magic = c_rarg2;
  39 
  40   Label flush_line, done;
  41 
  42   __ testl(lines, lines);
  43   __ jcc(Assembler::zero, done);
  44 
  45   // Force ordering wrt cflush.
  46   // Other fence and sync instructions won't do the job.


   1 /*
   2  * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "assembler_x86.inline.hpp"
  27 #include "runtime/icache.hpp"
  28 
  29 #define __ _masm->
  30 
  31 void ICacheStubGenerator::generate_icache_flush(ICache::flush_icache_stub_t* flush_icache_stub) {
  32   StubCodeMark mark(this, "ICache", "flush_icache_stub");
  33 
  34   address start = __ pc();
  35 #ifdef AMD64
  36 
  37   const Register addr  = c_rarg0;
  38   const Register lines = c_rarg1;
  39   const Register magic = c_rarg2;
  40 
  41   Label flush_line, done;
  42 
  43   __ testl(lines, lines);
  44   __ jcc(Assembler::zero, done);
  45 
  46   // Force ordering wrt cflush.
  47   // Other fence and sync instructions won't do the job.