src/cpu/x86/vm/nativeInst_x86.hpp

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   1 /*
   2  * Copyright (c) 1997, 2008, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 









  25 // We have interfaces for the following instructions:
  26 // - NativeInstruction
  27 // - - NativeCall
  28 // - - NativeMovConstReg
  29 // - - NativeMovConstRegPatching
  30 // - - NativeMovRegMem
  31 // - - NativeMovRegMemPatching
  32 // - - NativeJump
  33 // - - NativeIllegalOpCode
  34 // - - NativeGeneralJump
  35 // - - NativeReturn
  36 // - - NativeReturnX (return with argument)
  37 // - - NativePushConst
  38 // - - NativeTstRegMem
  39 
  40 // The base class for different kinds of native instruction abstractions.
  41 // Provides the primitive operations to manipulate code relative to this.
  42 
  43 class NativeInstruction VALUE_OBJ_CLASS_SPEC {
  44   friend class Relocation;


 530      return os::is_poll_address(fault);
 531   } else {
 532     return false;
 533   }
 534 #else
 535   return ( ubyte_at(0) == NativeMovRegMem::instruction_code_mem2reg ||
 536            ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl ) &&
 537            (ubyte_at(1)&0xC7) == 0x05 && /* Mod R/M == disp32 */
 538            (os::is_poll_address((address)int_at(2)));
 539 #endif // AMD64
 540 }
 541 
 542 inline bool NativeInstruction::is_mov_literal64() {
 543 #ifdef AMD64
 544   return ((ubyte_at(0) == Assembler::REX_W || ubyte_at(0) == Assembler::REX_WB) &&
 545           (ubyte_at(1) & (0xff ^ NativeMovConstReg::register_mask)) == 0xB8);
 546 #else
 547   return false;
 548 #endif // AMD64
 549 }


   1 /*
   2  * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef CPU_X86_VM_NATIVEINST_X86_HPP
  26 #define CPU_X86_VM_NATIVEINST_X86_HPP
  27 
  28 #include "asm/assembler.hpp"
  29 #include "memory/allocation.hpp"
  30 #include "runtime/icache.hpp"
  31 #include "runtime/os.hpp"
  32 #include "utilities/top.hpp"
  33 
  34 // We have interfaces for the following instructions:
  35 // - NativeInstruction
  36 // - - NativeCall
  37 // - - NativeMovConstReg
  38 // - - NativeMovConstRegPatching
  39 // - - NativeMovRegMem
  40 // - - NativeMovRegMemPatching
  41 // - - NativeJump
  42 // - - NativeIllegalOpCode
  43 // - - NativeGeneralJump
  44 // - - NativeReturn
  45 // - - NativeReturnX (return with argument)
  46 // - - NativePushConst
  47 // - - NativeTstRegMem
  48 
  49 // The base class for different kinds of native instruction abstractions.
  50 // Provides the primitive operations to manipulate code relative to this.
  51 
  52 class NativeInstruction VALUE_OBJ_CLASS_SPEC {
  53   friend class Relocation;


 539      return os::is_poll_address(fault);
 540   } else {
 541     return false;
 542   }
 543 #else
 544   return ( ubyte_at(0) == NativeMovRegMem::instruction_code_mem2reg ||
 545            ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl ) &&
 546            (ubyte_at(1)&0xC7) == 0x05 && /* Mod R/M == disp32 */
 547            (os::is_poll_address((address)int_at(2)));
 548 #endif // AMD64
 549 }
 550 
 551 inline bool NativeInstruction::is_mov_literal64() {
 552 #ifdef AMD64
 553   return ((ubyte_at(0) == Assembler::REX_W || ubyte_at(0) == Assembler::REX_WB) &&
 554           (ubyte_at(1) & (0xff ^ NativeMovConstReg::register_mask)) == 0xB8);
 555 #else
 556   return false;
 557 #endif // AMD64
 558 }
 559 
 560 #endif // CPU_X86_VM_NATIVEINST_X86_HPP