1 /*
2 * Copyright (c) 2000, 2007, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 class VMRegImpl;
26 typedef VMRegImpl* VMReg;
27
28 // Use Register as shortcut
29 class RegisterImpl;
30 typedef RegisterImpl* Register;
31
32
33 // The implementation of integer registers for the ia32 architecture
34 inline Register as_Register(int encoding) {
35 return (Register)(intptr_t) encoding;
36 }
37
38 class RegisterImpl: public AbstractRegisterImpl {
39 public:
40 enum {
41 #ifndef AMD64
42 number_of_registers = 8,
43 number_of_byte_registers = 4
44 #else
202 enum {
203 // A big enough number for C2: all the registers plus flags
204 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
205 // There is no requirement that any ordering here matches any ordering c2 gives
206 // it's optoregs.
207
208 number_of_registers = RegisterImpl::number_of_registers +
209 #ifdef AMD64
210 RegisterImpl::number_of_registers + // "H" half of a 64bit register
211 #endif // AMD64
212 2 * FloatRegisterImpl::number_of_registers +
213 2 * XMMRegisterImpl::number_of_registers +
214 1 // eflags
215 };
216
217 static const int max_gpr;
218 static const int max_fpr;
219 static const int max_xmm;
220
221 };
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1 /*
2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_X86_VM_REGISTER_X86_HPP
26 #define CPU_X86_VM_REGISTER_X86_HPP
27
28 #include "asm/register.hpp"
29 #include "vm_version_x86.hpp"
30
31 class VMRegImpl;
32 typedef VMRegImpl* VMReg;
33
34 // Use Register as shortcut
35 class RegisterImpl;
36 typedef RegisterImpl* Register;
37
38
39 // The implementation of integer registers for the ia32 architecture
40 inline Register as_Register(int encoding) {
41 return (Register)(intptr_t) encoding;
42 }
43
44 class RegisterImpl: public AbstractRegisterImpl {
45 public:
46 enum {
47 #ifndef AMD64
48 number_of_registers = 8,
49 number_of_byte_registers = 4
50 #else
208 enum {
209 // A big enough number for C2: all the registers plus flags
210 // This number must be large enough to cover REG_COUNT (defined by c2) registers.
211 // There is no requirement that any ordering here matches any ordering c2 gives
212 // it's optoregs.
213
214 number_of_registers = RegisterImpl::number_of_registers +
215 #ifdef AMD64
216 RegisterImpl::number_of_registers + // "H" half of a 64bit register
217 #endif // AMD64
218 2 * FloatRegisterImpl::number_of_registers +
219 2 * XMMRegisterImpl::number_of_registers +
220 1 // eflags
221 };
222
223 static const int max_gpr;
224 static const int max_fpr;
225 static const int max_xmm;
226
227 };
228
229 #endif // CPU_X86_VM_REGISTER_X86_HPP
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