1 /* 2 * Copyright (c) 2000, 2010, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_VM_C1_C1_LIR_HPP 26 #define SHARE_VM_C1_C1_LIR_HPP 27 28 #include "c1/c1_ValueType.hpp" 29 30 class BlockBegin; 31 class BlockList; 32 class LIR_Assembler; 33 class CodeEmitInfo; 34 class CodeStub; 35 class CodeStubList; 36 class ArrayCopyStub; 37 class LIR_Op; 38 class ciType; 39 class ValueType; 40 class LIR_OpVisitState; 41 class FpuStackSim; 42 43 //--------------------------------------------------------------------- 44 // LIR Operands 45 // LIR_OprDesc 46 // LIR_OprPtr 47 // LIR_Const 48 // LIR_Address 49 //--------------------------------------------------------------------- 50 class LIR_OprDesc; 51 class LIR_OprPtr; 52 class LIR_Const; 53 class LIR_Address; 54 class LIR_OprVisitor; 55 56 57 typedef LIR_OprDesc* LIR_Opr; 58 typedef int RegNr; 59 60 define_array(LIR_OprArray, LIR_Opr) 61 define_stack(LIR_OprList, LIR_OprArray) 62 63 define_array(LIR_OprRefArray, LIR_Opr*) 64 define_stack(LIR_OprRefList, LIR_OprRefArray) 65 66 define_array(CodeEmitInfoArray, CodeEmitInfo*) 67 define_stack(CodeEmitInfoList, CodeEmitInfoArray) 68 69 define_array(LIR_OpArray, LIR_Op*) 70 define_stack(LIR_OpList, LIR_OpArray) 71 72 // define LIR_OprPtr early so LIR_OprDesc can refer to it 73 class LIR_OprPtr: public CompilationResourceObj { 74 public: 75 bool is_oop_pointer() const { return (type() == T_OBJECT); } 76 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); } 77 78 virtual LIR_Const* as_constant() { return NULL; } 79 virtual LIR_Address* as_address() { return NULL; } 80 virtual BasicType type() const = 0; 81 virtual void print_value_on(outputStream* out) const = 0; 82 }; 83 84 85 86 // LIR constants 87 class LIR_Const: public LIR_OprPtr { 88 private: 89 JavaValue _value; 90 91 void type_check(BasicType t) const { assert(type() == t, "type check"); } 92 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); } 93 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); } 94 95 public: 96 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); } 97 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); } 98 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); } 99 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); } 100 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); } 101 LIR_Const(void* p) { 102 #ifdef _LP64 103 assert(sizeof(jlong) >= sizeof(p), "too small");; 104 _value.set_type(T_LONG); _value.set_jlong((jlong)p); 105 #else 106 assert(sizeof(jint) >= sizeof(p), "too small");; 107 _value.set_type(T_INT); _value.set_jint((jint)p); 108 #endif 109 } 110 111 virtual BasicType type() const { return _value.get_type(); } 112 virtual LIR_Const* as_constant() { return this; } 113 114 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); } 115 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); } 116 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); } 117 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); } 118 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); } 119 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); } 120 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); } 121 122 #ifdef _LP64 123 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); } 124 #else 125 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); } 126 #endif 127 128 129 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); } 130 jint as_jint_lo_bits() const { 131 if (type() == T_DOUBLE) { 132 return low(jlong_cast(_value.get_jdouble())); 133 } else { 134 return as_jint_lo(); 135 } 136 } 137 jint as_jint_hi_bits() const { 138 if (type() == T_DOUBLE) { 139 return high(jlong_cast(_value.get_jdouble())); 140 } else { 141 return as_jint_hi(); 142 } 143 } 144 jlong as_jlong_bits() const { 145 if (type() == T_DOUBLE) { 146 return jlong_cast(_value.get_jdouble()); 147 } else { 148 return as_jlong(); 149 } 150 } 151 152 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; 153 154 155 bool is_zero_float() { 156 jfloat f = as_jfloat(); 157 jfloat ok = 0.0f; 158 return jint_cast(f) == jint_cast(ok); 159 } 160 161 bool is_one_float() { 162 jfloat f = as_jfloat(); 163 return !g_isnan(f) && g_isfinite(f) && f == 1.0; 164 } 165 166 bool is_zero_double() { 167 jdouble d = as_jdouble(); 168 jdouble ok = 0.0; 169 return jlong_cast(d) == jlong_cast(ok); 170 } 171 172 bool is_one_double() { 173 jdouble d = as_jdouble(); 174 return !g_isnan(d) && g_isfinite(d) && d == 1.0; 175 } 176 }; 177 178 179 //---------------------LIR Operand descriptor------------------------------------ 180 // 181 // The class LIR_OprDesc represents a LIR instruction operand; 182 // it can be a register (ALU/FPU), stack location or a constant; 183 // Constants and addresses are represented as resource area allocated 184 // structures (see above). 185 // Registers and stack locations are inlined into the this pointer 186 // (see value function). 187 188 class LIR_OprDesc: public CompilationResourceObj { 189 public: 190 // value structure: 191 // data opr-type opr-kind 192 // +--------------+-------+-------+ 193 // [max...........|7 6 5 4|3 2 1 0] 194 // ^ 195 // is_pointer bit 196 // 197 // lowest bit cleared, means it is a structure pointer 198 // we need 4 bits to represent types 199 200 private: 201 friend class LIR_OprFact; 202 203 // Conversion 204 intptr_t value() const { return (intptr_t) this; } 205 206 bool check_value_mask(intptr_t mask, intptr_t masked_value) const { 207 return (value() & mask) == masked_value; 208 } 209 210 enum OprKind { 211 pointer_value = 0 212 , stack_value = 1 213 , cpu_register = 3 214 , fpu_register = 5 215 , illegal_value = 7 216 }; 217 218 enum OprBits { 219 pointer_bits = 1 220 , kind_bits = 3 221 , type_bits = 4 222 , size_bits = 2 223 , destroys_bits = 1 224 , virtual_bits = 1 225 , is_xmm_bits = 1 226 , last_use_bits = 1 227 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation 228 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits + 229 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits 230 , data_bits = BitsPerInt - non_data_bits 231 , reg_bits = data_bits / 2 // for two registers in one value encoding 232 }; 233 234 enum OprShift { 235 kind_shift = 0 236 , type_shift = kind_shift + kind_bits 237 , size_shift = type_shift + type_bits 238 , destroys_shift = size_shift + size_bits 239 , last_use_shift = destroys_shift + destroys_bits 240 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits 241 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits 242 , is_xmm_shift = virtual_shift + virtual_bits 243 , data_shift = is_xmm_shift + is_xmm_bits 244 , reg1_shift = data_shift 245 , reg2_shift = data_shift + reg_bits 246 247 }; 248 249 enum OprSize { 250 single_size = 0 << size_shift 251 , double_size = 1 << size_shift 252 }; 253 254 enum OprMask { 255 kind_mask = right_n_bits(kind_bits) 256 , type_mask = right_n_bits(type_bits) << type_shift 257 , size_mask = right_n_bits(size_bits) << size_shift 258 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift 259 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift 260 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift 261 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift 262 , pointer_mask = right_n_bits(pointer_bits) 263 , lower_reg_mask = right_n_bits(reg_bits) 264 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask)) 265 }; 266 267 uintptr_t data() const { return value() >> data_shift; } 268 int lo_reg_half() const { return data() & lower_reg_mask; } 269 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; } 270 OprKind kind_field() const { return (OprKind)(value() & kind_mask); } 271 OprSize size_field() const { return (OprSize)(value() & size_mask); } 272 273 static char type_char(BasicType t); 274 275 public: 276 enum { 277 vreg_base = ConcreteRegisterImpl::number_of_registers, 278 vreg_max = (1 << data_bits) - 1 279 }; 280 281 static inline LIR_Opr illegalOpr(); 282 283 enum OprType { 284 unknown_type = 0 << type_shift // means: not set (catch uninitialized types) 285 , int_type = 1 << type_shift 286 , long_type = 2 << type_shift 287 , object_type = 3 << type_shift 288 , pointer_type = 4 << type_shift 289 , float_type = 5 << type_shift 290 , double_type = 6 << type_shift 291 }; 292 friend OprType as_OprType(BasicType t); 293 friend BasicType as_BasicType(OprType t); 294 295 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); } 296 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); } 297 298 static OprSize size_for(BasicType t) { 299 switch (t) { 300 case T_LONG: 301 case T_DOUBLE: 302 return double_size; 303 break; 304 305 case T_FLOAT: 306 case T_BOOLEAN: 307 case T_CHAR: 308 case T_BYTE: 309 case T_SHORT: 310 case T_INT: 311 case T_OBJECT: 312 case T_ARRAY: 313 return single_size; 314 break; 315 316 default: 317 ShouldNotReachHere(); 318 return single_size; 319 } 320 } 321 322 323 void validate_type() const PRODUCT_RETURN; 324 325 BasicType type() const { 326 if (is_pointer()) { 327 return pointer()->type(); 328 } 329 return as_BasicType(type_field()); 330 } 331 332 333 ValueType* value_type() const { return as_ValueType(type()); } 334 335 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); } 336 337 bool is_equal(LIR_Opr opr) const { return this == opr; } 338 // checks whether types are same 339 bool is_same_type(LIR_Opr opr) const { 340 assert(type_field() != unknown_type && 341 opr->type_field() != unknown_type, "shouldn't see unknown_type"); 342 return type_field() == opr->type_field(); 343 } 344 bool is_same_register(LIR_Opr opr) { 345 return (is_register() && opr->is_register() && 346 kind_field() == opr->kind_field() && 347 (value() & no_type_mask) == (opr->value() & no_type_mask)); 348 } 349 350 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); } 351 bool is_illegal() const { return kind_field() == illegal_value; } 352 bool is_valid() const { return kind_field() != illegal_value; } 353 354 bool is_register() const { return is_cpu_register() || is_fpu_register(); } 355 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); } 356 357 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; } 358 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; } 359 360 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); } 361 bool is_oop() const; 362 363 // semantic for fpu- and xmm-registers: 364 // * is_float and is_double return true for xmm_registers 365 // (so is_single_fpu and is_single_xmm are true) 366 // * So you must always check for is_???_xmm prior to is_???_fpu to 367 // distinguish between fpu- and xmm-registers 368 369 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); } 370 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); } 371 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); } 372 373 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); } 374 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); } 375 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); } 376 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); } 377 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); } 378 379 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); } 380 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); } 381 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); } 382 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); } 383 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); } 384 385 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); } 386 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); } 387 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); } 388 389 // fast accessor functions for special bits that do not work for pointers 390 // (in this functions, the check for is_pointer() is omitted) 391 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); } 392 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); } 393 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); } 394 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; } 395 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); } 396 397 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; } 398 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; } 399 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); } 400 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); } 401 402 403 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); } 404 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); } 405 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); } 406 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 407 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 408 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); } 409 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 410 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 411 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); } 412 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 413 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 414 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); } 415 416 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; } 417 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); } 418 LIR_Address* as_address_ptr() const { return pointer()->as_address(); } 419 420 Register as_register() const; 421 Register as_register_lo() const; 422 Register as_register_hi() const; 423 424 Register as_pointer_register() { 425 #ifdef _LP64 426 if (is_double_cpu()) { 427 assert(as_register_lo() == as_register_hi(), "should be a single register"); 428 return as_register_lo(); 429 } 430 #endif 431 return as_register(); 432 } 433 434 #ifdef X86 435 XMMRegister as_xmm_float_reg() const; 436 XMMRegister as_xmm_double_reg() const; 437 // for compatibility with RInfo 438 int fpu () const { return lo_reg_half(); } 439 #endif // X86 440 #if defined(SPARC) || defined(ARM) || defined(PPC) 441 FloatRegister as_float_reg () const; 442 FloatRegister as_double_reg () const; 443 #endif 444 445 jint as_jint() const { return as_constant_ptr()->as_jint(); } 446 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } 447 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } 448 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } 449 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); } 450 451 void print() const PRODUCT_RETURN; 452 void print(outputStream* out) const PRODUCT_RETURN; 453 }; 454 455 456 inline LIR_OprDesc::OprType as_OprType(BasicType type) { 457 switch (type) { 458 case T_INT: return LIR_OprDesc::int_type; 459 case T_LONG: return LIR_OprDesc::long_type; 460 case T_FLOAT: return LIR_OprDesc::float_type; 461 case T_DOUBLE: return LIR_OprDesc::double_type; 462 case T_OBJECT: 463 case T_ARRAY: return LIR_OprDesc::object_type; 464 case T_ILLEGAL: // fall through 465 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; 466 } 467 } 468 469 inline BasicType as_BasicType(LIR_OprDesc::OprType t) { 470 switch (t) { 471 case LIR_OprDesc::int_type: return T_INT; 472 case LIR_OprDesc::long_type: return T_LONG; 473 case LIR_OprDesc::float_type: return T_FLOAT; 474 case LIR_OprDesc::double_type: return T_DOUBLE; 475 case LIR_OprDesc::object_type: return T_OBJECT; 476 case LIR_OprDesc::unknown_type: // fall through 477 default: ShouldNotReachHere(); return T_ILLEGAL; 478 } 479 } 480 481 482 // LIR_Address 483 class LIR_Address: public LIR_OprPtr { 484 friend class LIR_OpVisitState; 485 486 public: 487 // NOTE: currently these must be the log2 of the scale factor (and 488 // must also be equivalent to the ScaleFactor enum in 489 // assembler_i486.hpp) 490 enum Scale { 491 times_1 = 0, 492 times_2 = 1, 493 times_4 = 2, 494 times_8 = 3 495 }; 496 497 private: 498 LIR_Opr _base; 499 LIR_Opr _index; 500 Scale _scale; 501 intx _disp; 502 BasicType _type; 503 504 public: 505 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type): 506 _base(base) 507 , _index(index) 508 , _scale(times_1) 509 , _type(type) 510 , _disp(0) { verify(); } 511 512 LIR_Address(LIR_Opr base, intx disp, BasicType type): 513 _base(base) 514 , _index(LIR_OprDesc::illegalOpr()) 515 , _scale(times_1) 516 , _type(type) 517 , _disp(disp) { verify(); } 518 519 LIR_Address(LIR_Opr base, BasicType type): 520 _base(base) 521 , _index(LIR_OprDesc::illegalOpr()) 522 , _scale(times_1) 523 , _type(type) 524 , _disp(0) { verify(); } 525 526 #if defined(X86) || defined(ARM) 527 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): 528 _base(base) 529 , _index(index) 530 , _scale(scale) 531 , _type(type) 532 , _disp(disp) { verify(); } 533 #endif // X86 || ARM 534 535 LIR_Opr base() const { return _base; } 536 LIR_Opr index() const { return _index; } 537 Scale scale() const { return _scale; } 538 intx disp() const { return _disp; } 539 540 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); } 541 542 virtual LIR_Address* as_address() { return this; } 543 virtual BasicType type() const { return _type; } 544 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; 545 546 void verify() const PRODUCT_RETURN; 547 548 static Scale scale(BasicType type); 549 }; 550 551 552 // operand factory 553 class LIR_OprFact: public AllStatic { 554 public: 555 556 static LIR_Opr illegalOpr; 557 558 static LIR_Opr single_cpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::int_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } 559 static LIR_Opr single_cpu_oop(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::object_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } 560 static LIR_Opr double_cpu(int reg1, int reg2) { 561 LP64_ONLY(assert(reg1 == reg2, "must be identical")); 562 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | 563 (reg2 << LIR_OprDesc::reg2_shift) | 564 LIR_OprDesc::long_type | 565 LIR_OprDesc::cpu_register | 566 LIR_OprDesc::double_size); 567 } 568 569 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 570 LIR_OprDesc::float_type | 571 LIR_OprDesc::fpu_register | 572 LIR_OprDesc::single_size); } 573 #if defined(ARM) 574 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); } 575 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); } 576 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); } 577 #endif 578 #ifdef SPARC 579 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | 580 (reg2 << LIR_OprDesc::reg2_shift) | 581 LIR_OprDesc::double_type | 582 LIR_OprDesc::fpu_register | 583 LIR_OprDesc::double_size); } 584 #endif 585 #ifdef X86 586 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 587 (reg << LIR_OprDesc::reg2_shift) | 588 LIR_OprDesc::double_type | 589 LIR_OprDesc::fpu_register | 590 LIR_OprDesc::double_size); } 591 592 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 593 LIR_OprDesc::float_type | 594 LIR_OprDesc::fpu_register | 595 LIR_OprDesc::single_size | 596 LIR_OprDesc::is_xmm_mask); } 597 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 598 (reg << LIR_OprDesc::reg2_shift) | 599 LIR_OprDesc::double_type | 600 LIR_OprDesc::fpu_register | 601 LIR_OprDesc::double_size | 602 LIR_OprDesc::is_xmm_mask); } 603 #endif // X86 604 #ifdef PPC 605 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 606 (reg << LIR_OprDesc::reg2_shift) | 607 LIR_OprDesc::double_type | 608 LIR_OprDesc::fpu_register | 609 LIR_OprDesc::double_size); } 610 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | 611 LIR_OprDesc::float_type | 612 LIR_OprDesc::cpu_register | 613 LIR_OprDesc::single_size); } 614 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) | 615 (reg1 << LIR_OprDesc::reg2_shift) | 616 LIR_OprDesc::double_type | 617 LIR_OprDesc::cpu_register | 618 LIR_OprDesc::double_size); } 619 #endif // PPC 620 621 static LIR_Opr virtual_register(int index, BasicType type) { 622 LIR_Opr res; 623 switch (type) { 624 case T_OBJECT: // fall through 625 case T_ARRAY: 626 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 627 LIR_OprDesc::object_type | 628 LIR_OprDesc::cpu_register | 629 LIR_OprDesc::single_size | 630 LIR_OprDesc::virtual_mask); 631 break; 632 633 case T_INT: 634 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 635 LIR_OprDesc::int_type | 636 LIR_OprDesc::cpu_register | 637 LIR_OprDesc::single_size | 638 LIR_OprDesc::virtual_mask); 639 break; 640 641 case T_LONG: 642 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 643 LIR_OprDesc::long_type | 644 LIR_OprDesc::cpu_register | 645 LIR_OprDesc::double_size | 646 LIR_OprDesc::virtual_mask); 647 break; 648 649 #ifdef __SOFTFP__ 650 case T_FLOAT: 651 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 652 LIR_OprDesc::float_type | 653 LIR_OprDesc::cpu_register | 654 LIR_OprDesc::single_size | 655 LIR_OprDesc::virtual_mask); 656 break; 657 case T_DOUBLE: 658 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 659 LIR_OprDesc::double_type | 660 LIR_OprDesc::cpu_register | 661 LIR_OprDesc::double_size | 662 LIR_OprDesc::virtual_mask); 663 break; 664 #else // __SOFTFP__ 665 case T_FLOAT: 666 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 667 LIR_OprDesc::float_type | 668 LIR_OprDesc::fpu_register | 669 LIR_OprDesc::single_size | 670 LIR_OprDesc::virtual_mask); 671 break; 672 673 case 674 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 675 LIR_OprDesc::double_type | 676 LIR_OprDesc::fpu_register | 677 LIR_OprDesc::double_size | 678 LIR_OprDesc::virtual_mask); 679 break; 680 #endif // __SOFTFP__ 681 default: ShouldNotReachHere(); res = illegalOpr; 682 } 683 684 #ifdef ASSERT 685 res->validate_type(); 686 assert(res->vreg_number() == index, "conversion check"); 687 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); 688 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); 689 690 // old-style calculation; check if old and new method are equal 691 LIR_OprDesc::OprType t = as_OprType(type); 692 #ifdef __SOFTFP__ 693 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 694 t | 695 LIR_OprDesc::cpu_register | 696 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); 697 #else // __SOFTFP__ 698 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t | 699 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | 700 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); 701 assert(res == old_res, "old and new method not equal"); 702 #endif // __SOFTFP__ 703 #endif // ASSERT 704 705 return res; 706 } 707 708 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as 709 // the index is platform independent; a double stack useing indeces 2 and 3 has always 710 // index 2. 711 static LIR_Opr stack(int index, BasicType type) { 712 LIR_Opr res; 713 switch (type) { 714 case T_OBJECT: // fall through 715 case T_ARRAY: 716 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 717 LIR_OprDesc::object_type | 718 LIR_OprDesc::stack_value | 719 LIR_OprDesc::single_size); 720 break; 721 722 case T_INT: 723 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 724 LIR_OprDesc::int_type | 725 LIR_OprDesc::stack_value | 726 LIR_OprDesc::single_size); 727 break; 728 729 case T_LONG: 730 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 731 LIR_OprDesc::long_type | 732 LIR_OprDesc::stack_value | 733 LIR_OprDesc::double_size); 734 break; 735 736 case T_FLOAT: 737 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 738 LIR_OprDesc::float_type | 739 LIR_OprDesc::stack_value | 740 LIR_OprDesc::single_size); 741 break; 742 case T_DOUBLE: 743 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 744 LIR_OprDesc::double_type | 745 LIR_OprDesc::stack_value | 746 LIR_OprDesc::double_size); 747 break; 748 749 default: ShouldNotReachHere(); res = illegalOpr; 750 } 751 752 #ifdef ASSERT 753 assert(index >= 0, "index must be positive"); 754 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); 755 756 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 757 LIR_OprDesc::stack_value | 758 as_OprType(type) | 759 LIR_OprDesc::size_for(type)); 760 assert(res == old_res, "old and new method not equal"); 761 #endif 762 763 return res; 764 } 765 766 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); } 767 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); } 768 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); } 769 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); } 770 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); } 771 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; } 772 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); } 773 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); } 774 static LIR_Opr illegal() { return (LIR_Opr)-1; } 775 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); } 776 777 static LIR_Opr value_type(ValueType* type); 778 static LIR_Opr dummy_value_type(ValueType* type); 779 }; 780 781 782 //------------------------------------------------------------------------------- 783 // LIR Instructions 784 //------------------------------------------------------------------------------- 785 // 786 // Note: 787 // - every instruction has a result operand 788 // - every instruction has an CodeEmitInfo operand (can be revisited later) 789 // - every instruction has a LIR_OpCode operand 790 // - LIR_OpN, means an instruction that has N input operands 791 // 792 // class hierarchy: 793 // 794 class LIR_Op; 795 class LIR_Op0; 796 class LIR_OpLabel; 797 class LIR_Op1; 798 class LIR_OpBranch; 799 class LIR_OpConvert; 800 class LIR_OpAllocObj; 801 class LIR_OpRoundFP; 802 class LIR_Op2; 803 class LIR_OpDelay; 804 class LIR_Op3; 805 class LIR_OpAllocArray; 806 class LIR_OpCall; 807 class LIR_OpJavaCall; 808 class LIR_OpRTCall; 809 class LIR_OpArrayCopy; 810 class LIR_OpLock; 811 class LIR_OpTypeCheck; 812 class LIR_OpCompareAndSwap; 813 class LIR_OpProfileCall; 814 815 816 // LIR operation codes 817 enum LIR_Code { 818 lir_none 819 , begin_op0 820 , lir_word_align 821 , lir_label 822 , lir_nop 823 , lir_backwardbranch_target 824 , lir_std_entry 825 , lir_osr_entry 826 , lir_build_frame 827 , lir_fpop_raw 828 , lir_24bit_FPU 829 , lir_reset_FPU 830 , lir_breakpoint 831 , lir_rtcall 832 , lir_membar 833 , lir_membar_acquire 834 , lir_membar_release 835 , lir_get_thread 836 , end_op0 837 , begin_op1 838 , lir_fxch 839 , lir_fld 840 , lir_ffree 841 , lir_push 842 , lir_pop 843 , lir_null_check 844 , lir_return 845 , lir_leal 846 , lir_neg 847 , lir_branch 848 , lir_cond_float_branch 849 , lir_move 850 , lir_prefetchr 851 , lir_prefetchw 852 , lir_convert 853 , lir_alloc_object 854 , lir_monaddr 855 , lir_roundfp 856 , lir_safepoint 857 , lir_pack64 858 , lir_unpack64 859 , lir_unwind 860 , end_op1 861 , begin_op2 862 , lir_cmp 863 , lir_cmp_l2i 864 , lir_ucmp_fd2i 865 , lir_cmp_fd2i 866 , lir_cmove 867 , lir_add 868 , lir_sub 869 , lir_mul 870 , lir_mul_strictfp 871 , lir_div 872 , lir_div_strictfp 873 , lir_rem 874 , lir_sqrt 875 , lir_abs 876 , lir_sin 877 , lir_cos 878 , lir_tan 879 , lir_log 880 , lir_log10 881 , lir_logic_and 882 , lir_logic_or 883 , lir_logic_xor 884 , lir_shl 885 , lir_shr 886 , lir_ushr 887 , lir_alloc_array 888 , lir_throw 889 , lir_compare_to 890 , end_op2 891 , begin_op3 892 , lir_idiv 893 , lir_irem 894 , end_op3 895 , begin_opJavaCall 896 , lir_static_call 897 , lir_optvirtual_call 898 , lir_icvirtual_call 899 , lir_virtual_call 900 , lir_dynamic_call 901 , end_opJavaCall 902 , begin_opArrayCopy 903 , lir_arraycopy 904 , end_opArrayCopy 905 , begin_opLock 906 , lir_lock 907 , lir_unlock 908 , end_opLock 909 , begin_delay_slot 910 , lir_delay_slot 911 , end_delay_slot 912 , begin_opTypeCheck 913 , lir_instanceof 914 , lir_checkcast 915 , lir_store_check 916 , end_opTypeCheck 917 , begin_opCompareAndSwap 918 , lir_cas_long 919 , lir_cas_obj 920 , lir_cas_int 921 , end_opCompareAndSwap 922 , begin_opMDOProfile 923 , lir_profile_call 924 , end_opMDOProfile 925 }; 926 927 928 enum LIR_Condition { 929 lir_cond_equal 930 , lir_cond_notEqual 931 , lir_cond_less 932 , lir_cond_lessEqual 933 , lir_cond_greaterEqual 934 , lir_cond_greater 935 , lir_cond_belowEqual 936 , lir_cond_aboveEqual 937 , lir_cond_always 938 , lir_cond_unknown = -1 939 }; 940 941 942 enum LIR_PatchCode { 943 lir_patch_none, 944 lir_patch_low, 945 lir_patch_high, 946 lir_patch_normal 947 }; 948 949 950 enum LIR_MoveKind { 951 lir_move_normal, 952 lir_move_volatile, 953 lir_move_unaligned, 954 lir_move_max_flag 955 }; 956 957 958 // -------------------------------------------------- 959 // LIR_Op 960 // -------------------------------------------------- 961 class LIR_Op: public CompilationResourceObj { 962 friend class LIR_OpVisitState; 963 964 #ifdef ASSERT 965 private: 966 const char * _file; 967 int _line; 968 #endif 969 970 protected: 971 LIR_Opr _result; 972 unsigned short _code; 973 unsigned short _flags; 974 CodeEmitInfo* _info; 975 int _id; // value id for register allocation 976 int _fpu_pop_count; 977 Instruction* _source; // for debugging 978 979 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN; 980 981 protected: 982 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; } 983 984 public: 985 LIR_Op() 986 : _result(LIR_OprFact::illegalOpr) 987 , _code(lir_none) 988 , _flags(0) 989 , _info(NULL) 990 #ifdef ASSERT 991 , _file(NULL) 992 , _line(0) 993 #endif 994 , _fpu_pop_count(0) 995 , _source(NULL) 996 , _id(-1) {} 997 998 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info) 999 : _result(result) 1000 , _code(code) 1001 , _flags(0) 1002 , _info(info) 1003 #ifdef ASSERT 1004 , _file(NULL) 1005 , _line(0) 1006 #endif 1007 , _fpu_pop_count(0) 1008 , _source(NULL) 1009 , _id(-1) {} 1010 1011 CodeEmitInfo* info() const { return _info; } 1012 LIR_Code code() const { return (LIR_Code)_code; } 1013 LIR_Opr result_opr() const { return _result; } 1014 void set_result_opr(LIR_Opr opr) { _result = opr; } 1015 1016 #ifdef ASSERT 1017 void set_file_and_line(const char * file, int line) { 1018 _file = file; 1019 _line = line; 1020 } 1021 #endif 1022 1023 virtual const char * name() const PRODUCT_RETURN0; 1024 1025 int id() const { return _id; } 1026 void set_id(int id) { _id = id; } 1027 1028 // FPU stack simulation helpers -- only used on Intel 1029 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; } 1030 int fpu_pop_count() const { return _fpu_pop_count; } 1031 bool pop_fpu_stack() { return _fpu_pop_count > 0; } 1032 1033 Instruction* source() const { return _source; } 1034 void set_source(Instruction* ins) { _source = ins; } 1035 1036 virtual void emit_code(LIR_Assembler* masm) = 0; 1037 virtual void print_instr(outputStream* out) const = 0; 1038 virtual void print_on(outputStream* st) const PRODUCT_RETURN; 1039 1040 virtual LIR_OpCall* as_OpCall() { return NULL; } 1041 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; } 1042 virtual LIR_OpLabel* as_OpLabel() { return NULL; } 1043 virtual LIR_OpDelay* as_OpDelay() { return NULL; } 1044 virtual LIR_OpLock* as_OpLock() { return NULL; } 1045 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } 1046 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } 1047 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } 1048 virtual LIR_OpBranch* as_OpBranch() { return NULL; } 1049 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } 1050 virtual LIR_OpConvert* as_OpConvert() { return NULL; } 1051 virtual LIR_Op0* as_Op0() { return NULL; } 1052 virtual LIR_Op1* as_Op1() { return NULL; } 1053 virtual LIR_Op2* as_Op2() { return NULL; } 1054 virtual LIR_Op3* as_Op3() { return NULL; } 1055 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } 1056 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } 1057 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; } 1058 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; } 1059 1060 virtual void verify() const {} 1061 }; 1062 1063 // for calls 1064 class LIR_OpCall: public LIR_Op { 1065 friend class LIR_OpVisitState; 1066 1067 protected: 1068 address _addr; 1069 LIR_OprList* _arguments; 1070 protected: 1071 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result, 1072 LIR_OprList* arguments, CodeEmitInfo* info = NULL) 1073 : LIR_Op(code, result, info) 1074 , _arguments(arguments) 1075 , _addr(addr) {} 1076 1077 public: 1078 address addr() const { return _addr; } 1079 const LIR_OprList* arguments() const { return _arguments; } 1080 virtual LIR_OpCall* as_OpCall() { return this; } 1081 }; 1082 1083 1084 // -------------------------------------------------- 1085 // LIR_OpJavaCall 1086 // -------------------------------------------------- 1087 class LIR_OpJavaCall: public LIR_OpCall { 1088 friend class LIR_OpVisitState; 1089 1090 private: 1091 ciMethod* _method; 1092 LIR_Opr _receiver; 1093 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr. 1094 1095 public: 1096 LIR_OpJavaCall(LIR_Code code, ciMethod* method, 1097 LIR_Opr receiver, LIR_Opr result, 1098 address addr, LIR_OprList* arguments, 1099 CodeEmitInfo* info) 1100 : LIR_OpCall(code, addr, result, arguments, info) 1101 , _receiver(receiver) 1102 , _method(method) 1103 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) 1104 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } 1105 1106 LIR_OpJavaCall(LIR_Code code, ciMethod* method, 1107 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset, 1108 LIR_OprList* arguments, CodeEmitInfo* info) 1109 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info) 1110 , _receiver(receiver) 1111 , _method(method) 1112 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) 1113 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } 1114 1115 LIR_Opr receiver() const { return _receiver; } 1116 ciMethod* method() const { return _method; } 1117 1118 // JSR 292 support. 1119 bool is_invokedynamic() const { return code() == lir_dynamic_call; } 1120 bool is_method_handle_invoke() const { 1121 return 1122 is_invokedynamic() // An invokedynamic is always a MethodHandle call site. 1123 || 1124 (method()->holder()->name() == ciSymbol::java_dyn_MethodHandle() && 1125 methodOopDesc::is_method_handle_invoke_name(method()->name()->sid())); 1126 } 1127 1128 intptr_t vtable_offset() const { 1129 assert(_code == lir_virtual_call, "only have vtable for real vcall"); 1130 return (intptr_t) addr(); 1131 } 1132 1133 virtual void emit_code(LIR_Assembler* masm); 1134 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; } 1135 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1136 }; 1137 1138 // -------------------------------------------------- 1139 // LIR_OpLabel 1140 // -------------------------------------------------- 1141 // Location where a branch can continue 1142 class LIR_OpLabel: public LIR_Op { 1143 friend class LIR_OpVisitState; 1144 1145 private: 1146 Label* _label; 1147 public: 1148 LIR_OpLabel(Label* lbl) 1149 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL) 1150 , _label(lbl) {} 1151 Label* label() const { return _label; } 1152 1153 virtual void emit_code(LIR_Assembler* masm); 1154 virtual LIR_OpLabel* as_OpLabel() { return this; } 1155 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1156 }; 1157 1158 // LIR_OpArrayCopy 1159 class LIR_OpArrayCopy: public LIR_Op { 1160 friend class LIR_OpVisitState; 1161 1162 private: 1163 ArrayCopyStub* _stub; 1164 LIR_Opr _src; 1165 LIR_Opr _src_pos; 1166 LIR_Opr _dst; 1167 LIR_Opr _dst_pos; 1168 LIR_Opr _length; 1169 LIR_Opr _tmp; 1170 ciArrayKlass* _expected_type; 1171 int _flags; 1172 1173 public: 1174 enum Flags { 1175 src_null_check = 1 << 0, 1176 dst_null_check = 1 << 1, 1177 src_pos_positive_check = 1 << 2, 1178 dst_pos_positive_check = 1 << 3, 1179 length_positive_check = 1 << 4, 1180 src_range_check = 1 << 5, 1181 dst_range_check = 1 << 6, 1182 type_check = 1 << 7, 1183 all_flags = (1 << 8) - 1 1184 }; 1185 1186 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, 1187 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info); 1188 1189 LIR_Opr src() const { return _src; } 1190 LIR_Opr src_pos() const { return _src_pos; } 1191 LIR_Opr dst() const { return _dst; } 1192 LIR_Opr dst_pos() const { return _dst_pos; } 1193 LIR_Opr length() const { return _length; } 1194 LIR_Opr tmp() const { return _tmp; } 1195 int flags() const { return _flags; } 1196 ciArrayKlass* expected_type() const { return _expected_type; } 1197 ArrayCopyStub* stub() const { return _stub; } 1198 1199 virtual void emit_code(LIR_Assembler* masm); 1200 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; } 1201 void print_instr(outputStream* out) const PRODUCT_RETURN; 1202 }; 1203 1204 1205 // -------------------------------------------------- 1206 // LIR_Op0 1207 // -------------------------------------------------- 1208 class LIR_Op0: public LIR_Op { 1209 friend class LIR_OpVisitState; 1210 1211 public: 1212 LIR_Op0(LIR_Code code) 1213 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } 1214 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL) 1215 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } 1216 1217 virtual void emit_code(LIR_Assembler* masm); 1218 virtual LIR_Op0* as_Op0() { return this; } 1219 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1220 }; 1221 1222 1223 // -------------------------------------------------- 1224 // LIR_Op1 1225 // -------------------------------------------------- 1226 1227 class LIR_Op1: public LIR_Op { 1228 friend class LIR_OpVisitState; 1229 1230 protected: 1231 LIR_Opr _opr; // input operand 1232 BasicType _type; // Operand types 1233 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?) 1234 1235 static void print_patch_code(outputStream* out, LIR_PatchCode code); 1236 1237 void set_kind(LIR_MoveKind kind) { 1238 assert(code() == lir_move, "must be"); 1239 _flags = kind; 1240 } 1241 1242 public: 1243 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL) 1244 : LIR_Op(code, result, info) 1245 , _opr(opr) 1246 , _patch(patch) 1247 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } 1248 1249 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind) 1250 : LIR_Op(code, result, info) 1251 , _opr(opr) 1252 , _patch(patch) 1253 , _type(type) { 1254 assert(code == lir_move, "must be"); 1255 set_kind(kind); 1256 } 1257 1258 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info) 1259 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1260 , _opr(opr) 1261 , _patch(lir_patch_none) 1262 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } 1263 1264 LIR_Opr in_opr() const { return _opr; } 1265 LIR_PatchCode patch_code() const { return _patch; } 1266 BasicType type() const { return _type; } 1267 1268 LIR_MoveKind move_kind() const { 1269 assert(code() == lir_move, "must be"); 1270 return (LIR_MoveKind)_flags; 1271 } 1272 1273 virtual void emit_code(LIR_Assembler* masm); 1274 virtual LIR_Op1* as_Op1() { return this; } 1275 virtual const char * name() const PRODUCT_RETURN0; 1276 1277 void set_in_opr(LIR_Opr opr) { _opr = opr; } 1278 1279 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1280 virtual void verify() const; 1281 }; 1282 1283 1284 // for runtime calls 1285 class LIR_OpRTCall: public LIR_OpCall { 1286 friend class LIR_OpVisitState; 1287 1288 private: 1289 LIR_Opr _tmp; 1290 public: 1291 LIR_OpRTCall(address addr, LIR_Opr tmp, 1292 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL) 1293 : LIR_OpCall(lir_rtcall, addr, result, arguments, info) 1294 , _tmp(tmp) {} 1295 1296 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1297 virtual void emit_code(LIR_Assembler* masm); 1298 virtual LIR_OpRTCall* as_OpRTCall() { return this; } 1299 1300 LIR_Opr tmp() const { return _tmp; } 1301 1302 virtual void verify() const; 1303 }; 1304 1305 1306 class LIR_OpBranch: public LIR_Op { 1307 friend class LIR_OpVisitState; 1308 1309 private: 1310 LIR_Condition _cond; 1311 BasicType _type; 1312 Label* _label; 1313 BlockBegin* _block; // if this is a branch to a block, this is the block 1314 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block 1315 CodeStub* _stub; // if this is a branch to a stub, this is the stub 1316 1317 public: 1318 LIR_OpBranch(LIR_Condition cond, Label* lbl) 1319 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) 1320 , _cond(cond) 1321 , _label(lbl) 1322 , _block(NULL) 1323 , _ublock(NULL) 1324 , _stub(NULL) { } 1325 1326 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block); 1327 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); 1328 1329 // for unordered comparisons 1330 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock); 1331 1332 LIR_Condition cond() const { return _cond; } 1333 BasicType type() const { return _type; } 1334 Label* label() const { return _label; } 1335 BlockBegin* block() const { return _block; } 1336 BlockBegin* ublock() const { return _ublock; } 1337 CodeStub* stub() const { return _stub; } 1338 1339 void change_block(BlockBegin* b); 1340 void change_ublock(BlockBegin* b); 1341 void negate_cond(); 1342 1343 virtual void emit_code(LIR_Assembler* masm); 1344 virtual LIR_OpBranch* as_OpBranch() { return this; } 1345 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1346 }; 1347 1348 1349 class ConversionStub; 1350 1351 class LIR_OpConvert: public LIR_Op1 { 1352 friend class LIR_OpVisitState; 1353 1354 private: 1355 Bytecodes::Code _bytecode; 1356 ConversionStub* _stub; 1357 #ifdef PPC 1358 LIR_Opr _tmp1; 1359 LIR_Opr _tmp2; 1360 #endif 1361 1362 public: 1363 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) 1364 : LIR_Op1(lir_convert, opr, result) 1365 , _stub(stub) 1366 #ifdef PPC 1367 , _tmp1(LIR_OprDesc::illegalOpr()) 1368 , _tmp2(LIR_OprDesc::illegalOpr()) 1369 #endif 1370 , _bytecode(code) {} 1371 1372 #ifdef PPC 1373 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub 1374 ,LIR_Opr tmp1, LIR_Opr tmp2) 1375 : LIR_Op1(lir_convert, opr, result) 1376 , _stub(stub) 1377 , _tmp1(tmp1) 1378 , _tmp2(tmp2) 1379 , _bytecode(code) {} 1380 #endif 1381 1382 Bytecodes::Code bytecode() const { return _bytecode; } 1383 ConversionStub* stub() const { return _stub; } 1384 #ifdef PPC 1385 LIR_Opr tmp1() const { return _tmp1; } 1386 LIR_Opr tmp2() const { return _tmp2; } 1387 #endif 1388 1389 virtual void emit_code(LIR_Assembler* masm); 1390 virtual LIR_OpConvert* as_OpConvert() { return this; } 1391 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1392 1393 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; 1394 }; 1395 1396 1397 // LIR_OpAllocObj 1398 class LIR_OpAllocObj : public LIR_Op1 { 1399 friend class LIR_OpVisitState; 1400 1401 private: 1402 LIR_Opr _tmp1; 1403 LIR_Opr _tmp2; 1404 LIR_Opr _tmp3; 1405 LIR_Opr _tmp4; 1406 int _hdr_size; 1407 int _obj_size; 1408 CodeStub* _stub; 1409 bool _init_check; 1410 1411 public: 1412 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, 1413 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1414 int hdr_size, int obj_size, bool init_check, CodeStub* stub) 1415 : LIR_Op1(lir_alloc_object, klass, result) 1416 , _tmp1(t1) 1417 , _tmp2(t2) 1418 , _tmp3(t3) 1419 , _tmp4(t4) 1420 , _hdr_size(hdr_size) 1421 , _obj_size(obj_size) 1422 , _init_check(init_check) 1423 , _stub(stub) { } 1424 1425 LIR_Opr klass() const { return in_opr(); } 1426 LIR_Opr obj() const { return result_opr(); } 1427 LIR_Opr tmp1() const { return _tmp1; } 1428 LIR_Opr tmp2() const { return _tmp2; } 1429 LIR_Opr tmp3() const { return _tmp3; } 1430 LIR_Opr tmp4() const { return _tmp4; } 1431 int header_size() const { return _hdr_size; } 1432 int object_size() const { return _obj_size; } 1433 bool init_check() const { return _init_check; } 1434 CodeStub* stub() const { return _stub; } 1435 1436 virtual void emit_code(LIR_Assembler* masm); 1437 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } 1438 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1439 }; 1440 1441 1442 // LIR_OpRoundFP 1443 class LIR_OpRoundFP : public LIR_Op1 { 1444 friend class LIR_OpVisitState; 1445 1446 private: 1447 LIR_Opr _tmp; 1448 1449 public: 1450 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) 1451 : LIR_Op1(lir_roundfp, reg, result) 1452 , _tmp(stack_loc_temp) {} 1453 1454 LIR_Opr tmp() const { return _tmp; } 1455 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; } 1456 void print_instr(outputStream* out) const PRODUCT_RETURN; 1457 }; 1458 1459 // LIR_OpTypeCheck 1460 class LIR_OpTypeCheck: public LIR_Op { 1461 friend class LIR_OpVisitState; 1462 1463 private: 1464 LIR_Opr _object; 1465 LIR_Opr _array; 1466 ciKlass* _klass; 1467 LIR_Opr _tmp1; 1468 LIR_Opr _tmp2; 1469 LIR_Opr _tmp3; 1470 bool _fast_check; 1471 CodeEmitInfo* _info_for_patch; 1472 CodeEmitInfo* _info_for_exception; 1473 CodeStub* _stub; 1474 ciMethod* _profiled_method; 1475 int _profiled_bci; 1476 bool _should_profile; 1477 1478 public: 1479 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 1480 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1481 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub); 1482 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, 1483 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); 1484 1485 LIR_Opr object() const { return _object; } 1486 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; } 1487 LIR_Opr tmp1() const { return _tmp1; } 1488 LIR_Opr tmp2() const { return _tmp2; } 1489 LIR_Opr tmp3() const { return _tmp3; } 1490 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; } 1491 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; } 1492 CodeEmitInfo* info_for_patch() const { return _info_for_patch; } 1493 CodeEmitInfo* info_for_exception() const { return _info_for_exception; } 1494 CodeStub* stub() const { return _stub; } 1495 1496 // methodDataOop profiling 1497 void set_profiled_method(ciMethod *method) { _profiled_method = method; } 1498 void set_profiled_bci(int bci) { _profiled_bci = bci; } 1499 void set_should_profile(bool b) { _should_profile = b; } 1500 ciMethod* profiled_method() const { return _profiled_method; } 1501 int profiled_bci() const { return _profiled_bci; } 1502 bool should_profile() const { return _should_profile; } 1503 1504 virtual void emit_code(LIR_Assembler* masm); 1505 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } 1506 void print_instr(outputStream* out) const PRODUCT_RETURN; 1507 }; 1508 1509 // LIR_Op2 1510 class LIR_Op2: public LIR_Op { 1511 friend class LIR_OpVisitState; 1512 1513 int _fpu_stack_size; // for sin/cos implementation on Intel 1514 1515 protected: 1516 LIR_Opr _opr1; 1517 LIR_Opr _opr2; 1518 BasicType _type; 1519 LIR_Opr _tmp; 1520 LIR_Condition _condition; 1521 1522 void verify() const; 1523 1524 public: 1525 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL) 1526 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1527 , _opr1(opr1) 1528 , _opr2(opr2) 1529 , _type(T_ILLEGAL) 1530 , _condition(condition) 1531 , _fpu_stack_size(0) 1532 , _tmp(LIR_OprFact::illegalOpr) { 1533 assert(code == lir_cmp, "code check"); 1534 } 1535 1536 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result) 1537 : LIR_Op(code, result, NULL) 1538 , _opr1(opr1) 1539 , _opr2(opr2) 1540 , _type(T_ILLEGAL) 1541 , _condition(condition) 1542 , _fpu_stack_size(0) 1543 , _tmp(LIR_OprFact::illegalOpr) { 1544 assert(code == lir_cmove, "code check"); 1545 } 1546 1547 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, 1548 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) 1549 : LIR_Op(code, result, info) 1550 , _opr1(opr1) 1551 , _opr2(opr2) 1552 , _type(type) 1553 , _condition(lir_cond_unknown) 1554 , _fpu_stack_size(0) 1555 , _tmp(LIR_OprFact::illegalOpr) { 1556 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); 1557 } 1558 1559 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp) 1560 : LIR_Op(code, result, NULL) 1561 , _opr1(opr1) 1562 , _opr2(opr2) 1563 , _type(T_ILLEGAL) 1564 , _condition(lir_cond_unknown) 1565 , _fpu_stack_size(0) 1566 , _tmp(tmp) { 1567 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); 1568 } 1569 1570 LIR_Opr in_opr1() const { return _opr1; } 1571 LIR_Opr in_opr2() const { return _opr2; } 1572 BasicType type() const { return _type; } 1573 LIR_Opr tmp_opr() const { return _tmp; } 1574 LIR_Condition condition() const { 1575 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition; 1576 } 1577 void set_condition(LIR_Condition condition) { 1578 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; 1579 } 1580 1581 void set_fpu_stack_size(int size) { _fpu_stack_size = size; } 1582 int fpu_stack_size() const { return _fpu_stack_size; } 1583 1584 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } 1585 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } 1586 1587 virtual void emit_code(LIR_Assembler* masm); 1588 virtual LIR_Op2* as_Op2() { return this; } 1589 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1590 }; 1591 1592 class LIR_OpAllocArray : public LIR_Op { 1593 friend class LIR_OpVisitState; 1594 1595 private: 1596 LIR_Opr _klass; 1597 LIR_Opr _len; 1598 LIR_Opr _tmp1; 1599 LIR_Opr _tmp2; 1600 LIR_Opr _tmp3; 1601 LIR_Opr _tmp4; 1602 BasicType _type; 1603 CodeStub* _stub; 1604 1605 public: 1606 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub) 1607 : LIR_Op(lir_alloc_array, result, NULL) 1608 , _klass(klass) 1609 , _len(len) 1610 , _tmp1(t1) 1611 , _tmp2(t2) 1612 , _tmp3(t3) 1613 , _tmp4(t4) 1614 , _type(type) 1615 , _stub(stub) {} 1616 1617 LIR_Opr klass() const { return _klass; } 1618 LIR_Opr len() const { return _len; } 1619 LIR_Opr obj() const { return result_opr(); } 1620 LIR_Opr tmp1() const { return _tmp1; } 1621 LIR_Opr tmp2() const { return _tmp2; } 1622 LIR_Opr tmp3() const { return _tmp3; } 1623 LIR_Opr tmp4() const { return _tmp4; } 1624 BasicType type() const { return _type; } 1625 CodeStub* stub() const { return _stub; } 1626 1627 virtual void emit_code(LIR_Assembler* masm); 1628 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } 1629 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1630 }; 1631 1632 1633 class LIR_Op3: public LIR_Op { 1634 friend class LIR_OpVisitState; 1635 1636 private: 1637 LIR_Opr _opr1; 1638 LIR_Opr _opr2; 1639 LIR_Opr _opr3; 1640 public: 1641 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL) 1642 : LIR_Op(code, result, info) 1643 , _opr1(opr1) 1644 , _opr2(opr2) 1645 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); } 1646 LIR_Opr in_opr1() const { return _opr1; } 1647 LIR_Opr in_opr2() const { return _opr2; } 1648 LIR_Opr in_opr3() const { return _opr3; } 1649 1650 virtual void emit_code(LIR_Assembler* masm); 1651 virtual LIR_Op3* as_Op3() { return this; } 1652 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1653 }; 1654 1655 1656 //-------------------------------- 1657 class LabelObj: public CompilationResourceObj { 1658 private: 1659 Label _label; 1660 public: 1661 LabelObj() {} 1662 Label* label() { return &_label; } 1663 }; 1664 1665 1666 class LIR_OpLock: public LIR_Op { 1667 friend class LIR_OpVisitState; 1668 1669 private: 1670 LIR_Opr _hdr; 1671 LIR_Opr _obj; 1672 LIR_Opr _lock; 1673 LIR_Opr _scratch; 1674 CodeStub* _stub; 1675 public: 1676 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) 1677 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1678 , _hdr(hdr) 1679 , _obj(obj) 1680 , _lock(lock) 1681 , _scratch(scratch) 1682 , _stub(stub) {} 1683 1684 LIR_Opr hdr_opr() const { return _hdr; } 1685 LIR_Opr obj_opr() const { return _obj; } 1686 LIR_Opr lock_opr() const { return _lock; } 1687 LIR_Opr scratch_opr() const { return _scratch; } 1688 CodeStub* stub() const { return _stub; } 1689 1690 virtual void emit_code(LIR_Assembler* masm); 1691 virtual LIR_OpLock* as_OpLock() { return this; } 1692 void print_instr(outputStream* out) const PRODUCT_RETURN; 1693 }; 1694 1695 1696 class LIR_OpDelay: public LIR_Op { 1697 friend class LIR_OpVisitState; 1698 1699 private: 1700 LIR_Op* _op; 1701 1702 public: 1703 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info): 1704 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info), 1705 _op(op) { 1706 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops"); 1707 } 1708 virtual void emit_code(LIR_Assembler* masm); 1709 virtual LIR_OpDelay* as_OpDelay() { return this; } 1710 void print_instr(outputStream* out) const PRODUCT_RETURN; 1711 LIR_Op* delay_op() const { return _op; } 1712 CodeEmitInfo* call_info() const { return info(); } 1713 }; 1714 1715 1716 // LIR_OpCompareAndSwap 1717 class LIR_OpCompareAndSwap : public LIR_Op { 1718 friend class LIR_OpVisitState; 1719 1720 private: 1721 LIR_Opr _addr; 1722 LIR_Opr _cmp_value; 1723 LIR_Opr _new_value; 1724 LIR_Opr _tmp1; 1725 LIR_Opr _tmp2; 1726 1727 public: 1728 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1729 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) 1730 : LIR_Op(code, result, NULL) // no result, no info 1731 , _addr(addr) 1732 , _cmp_value(cmp_value) 1733 , _new_value(new_value) 1734 , _tmp1(t1) 1735 , _tmp2(t2) { } 1736 1737 LIR_Opr addr() const { return _addr; } 1738 LIR_Opr cmp_value() const { return _cmp_value; } 1739 LIR_Opr new_value() const { return _new_value; } 1740 LIR_Opr tmp1() const { return _tmp1; } 1741 LIR_Opr tmp2() const { return _tmp2; } 1742 1743 virtual void emit_code(LIR_Assembler* masm); 1744 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; } 1745 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1746 }; 1747 1748 // LIR_OpProfileCall 1749 class LIR_OpProfileCall : public LIR_Op { 1750 friend class LIR_OpVisitState; 1751 1752 private: 1753 ciMethod* _profiled_method; 1754 int _profiled_bci; 1755 LIR_Opr _mdo; 1756 LIR_Opr _recv; 1757 LIR_Opr _tmp1; 1758 ciKlass* _known_holder; 1759 1760 public: 1761 // Destroys recv 1762 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder) 1763 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info 1764 , _profiled_method(profiled_method) 1765 , _profiled_bci(profiled_bci) 1766 , _mdo(mdo) 1767 , _recv(recv) 1768 , _tmp1(t1) 1769 , _known_holder(known_holder) { } 1770 1771 ciMethod* profiled_method() const { return _profiled_method; } 1772 int profiled_bci() const { return _profiled_bci; } 1773 LIR_Opr mdo() const { return _mdo; } 1774 LIR_Opr recv() const { return _recv; } 1775 LIR_Opr tmp1() const { return _tmp1; } 1776 ciKlass* known_holder() const { return _known_holder; } 1777 1778 virtual void emit_code(LIR_Assembler* masm); 1779 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; } 1780 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1781 }; 1782 1783 class LIR_InsertionBuffer; 1784 1785 //--------------------------------LIR_List--------------------------------------------------- 1786 // Maintains a list of LIR instructions (one instance of LIR_List per basic block) 1787 // The LIR instructions are appended by the LIR_List class itself; 1788 // 1789 // Notes: 1790 // - all offsets are(should be) in bytes 1791 // - local positions are specified with an offset, with offset 0 being local 0 1792 1793 class LIR_List: public CompilationResourceObj { 1794 private: 1795 LIR_OpList _operations; 1796 1797 Compilation* _compilation; 1798 #ifndef PRODUCT 1799 BlockBegin* _block; 1800 #endif 1801 #ifdef ASSERT 1802 const char * _file; 1803 int _line; 1804 #endif 1805 1806 void append(LIR_Op* op) { 1807 if (op->source() == NULL) 1808 op->set_source(_compilation->current_instruction()); 1809 #ifndef PRODUCT 1810 if (PrintIRWithLIR) { 1811 _compilation->maybe_print_current_instruction(); 1812 op->print(); tty->cr(); 1813 } 1814 #endif // PRODUCT 1815 1816 _operations.append(op); 1817 1818 #ifdef ASSERT 1819 op->verify(); 1820 op->set_file_and_line(_file, _line); 1821 _file = NULL; 1822 _line = 0; 1823 #endif 1824 } 1825 1826 public: 1827 LIR_List(Compilation* compilation, BlockBegin* block = NULL); 1828 1829 #ifdef ASSERT 1830 void set_file_and_line(const char * file, int line); 1831 #endif 1832 1833 //---------- accessors --------------- 1834 LIR_OpList* instructions_list() { return &_operations; } 1835 int length() const { return _operations.length(); } 1836 LIR_Op* at(int i) const { return _operations.at(i); } 1837 1838 NOT_PRODUCT(BlockBegin* block() const { return _block; }); 1839 1840 // insert LIR_Ops in buffer to right places in LIR_List 1841 void append(LIR_InsertionBuffer* buffer); 1842 1843 //---------- mutators --------------- 1844 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); } 1845 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); } 1846 void remove_at(int i) { _operations.remove_at(i); } 1847 1848 //---------- printing ------------- 1849 void print_instructions() PRODUCT_RETURN; 1850 1851 1852 //---------- instructions ------------- 1853 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 1854 address dest, LIR_OprList* arguments, 1855 CodeEmitInfo* info) { 1856 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info)); 1857 } 1858 void call_static(ciMethod* method, LIR_Opr result, 1859 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 1860 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info)); 1861 } 1862 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 1863 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 1864 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info)); 1865 } 1866 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 1867 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) { 1868 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info)); 1869 } 1870 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 1871 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 1872 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info)); 1873 } 1874 1875 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); } 1876 void word_align() { append(new LIR_Op0(lir_word_align)); } 1877 void membar() { append(new LIR_Op0(lir_membar)); } 1878 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); } 1879 void membar_release() { append(new LIR_Op0(lir_membar_release)); } 1880 1881 void nop() { append(new LIR_Op0(lir_nop)); } 1882 void build_frame() { append(new LIR_Op0(lir_build_frame)); } 1883 1884 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); } 1885 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); } 1886 1887 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); } 1888 1889 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); } 1890 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); } 1891 1892 // result is a stack location for old backend and vreg for UseLinearScan 1893 // stack_loc_temp is an illegal register for old backend 1894 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); } 1895 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } 1896 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); } 1897 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } 1898 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } 1899 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); } 1900 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); } 1901 1902 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } 1903 1904 void oop2reg (jobject o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } 1905 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); 1906 1907 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } 1908 1909 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } 1910 1911 #ifdef PPC 1912 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); } 1913 #endif 1914 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } 1915 1916 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } 1917 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } 1918 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); } 1919 1920 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); } 1921 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); } 1922 1923 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); } 1924 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { 1925 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); 1926 } 1927 void unwind_exception(LIR_Opr exceptionOop) { 1928 append(new LIR_Op1(lir_unwind, exceptionOop)); 1929 } 1930 1931 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { 1932 append(new LIR_Op2(lir_compare_to, left, right, dst)); 1933 } 1934 1935 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } 1936 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } 1937 1938 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { 1939 append(new LIR_Op2(lir_cmp, condition, left, right, info)); 1940 } 1941 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { 1942 cmp(condition, left, LIR_OprFact::intConst(right), info); 1943 } 1944 1945 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); 1946 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); 1947 1948 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst) { 1949 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst)); 1950 } 1951 1952 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1953 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 1954 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1955 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 1956 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1957 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 1958 1959 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } 1960 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } 1961 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); } 1962 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } 1963 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); } 1964 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); } 1965 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } 1966 1967 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } 1968 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } 1969 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } 1970 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } 1971 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); } 1972 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); } 1973 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); } 1974 1975 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 1976 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 1977 1978 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); 1979 1980 void prefetch(LIR_Address* addr, bool is_store); 1981 1982 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 1983 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 1984 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); 1985 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 1986 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 1987 1988 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 1989 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 1990 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 1991 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 1992 1993 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); 1994 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); 1995 1996 // jump is an unconditional branch 1997 void jump(BlockBegin* block) { 1998 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); 1999 } 2000 void jump(CodeStub* stub) { 2001 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); 2002 } 2003 void branch(LIR_Condition cond, Label* lbl) { append(new LIR_OpBranch(cond, lbl)); } 2004 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { 2005 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); 2006 append(new LIR_OpBranch(cond, type, block)); 2007 } 2008 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) { 2009 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); 2010 append(new LIR_OpBranch(cond, type, stub)); 2011 } 2012 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { 2013 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); 2014 append(new LIR_OpBranch(cond, type, block, unordered)); 2015 } 2016 2017 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2018 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2019 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2020 2021 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2022 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2023 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2024 2025 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } 2026 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less); 2027 2028 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { 2029 append(new LIR_OpRTCall(routine, tmp, result, arguments)); 2030 } 2031 2032 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result, 2033 LIR_OprList* arguments, CodeEmitInfo* info) { 2034 append(new LIR_OpRTCall(routine, tmp, result, arguments, info)); 2035 } 2036 2037 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); } 2038 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub); 2039 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info); 2040 2041 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); } 2042 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); } 2043 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); } 2044 2045 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); } 2046 2047 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); } 2048 2049 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci); 2050 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); 2051 2052 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 2053 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 2054 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 2055 ciMethod* profiled_method, int profiled_bci); 2056 // methodDataOop profiling 2057 void profile_call(ciMethod* method, int bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { 2058 append(new LIR_OpProfileCall(lir_profile_call, method, bci, mdo, recv, t1, cha_klass)); 2059 } 2060 }; 2061 2062 void print_LIR(BlockList* blocks); 2063 2064 class LIR_InsertionBuffer : public CompilationResourceObj { 2065 private: 2066 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized) 2067 2068 // list of insertion points. index and count are stored alternately: 2069 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted 2070 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index 2071 intStack _index_and_count; 2072 2073 // the LIR_Ops to be inserted 2074 LIR_OpList _ops; 2075 2076 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); } 2077 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); } 2078 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); } 2079 2080 #ifdef ASSERT 2081 void verify(); 2082 #endif 2083 public: 2084 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { } 2085 2086 // must be called before using the insertion buffer 2087 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); } 2088 bool initialized() const { return _lir != NULL; } 2089 // called automatically when the buffer is appended to the LIR_List 2090 void finish() { _lir = NULL; } 2091 2092 // accessors 2093 LIR_List* lir_list() const { return _lir; } 2094 int number_of_insertion_points() const { return _index_and_count.length() >> 1; } 2095 int index_at(int i) const { return _index_and_count.at((i << 1)); } 2096 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); } 2097 2098 int number_of_ops() const { return _ops.length(); } 2099 LIR_Op* op_at(int i) const { return _ops.at(i); } 2100 2101 // append an instruction to the buffer 2102 void append(int index, LIR_Op* op); 2103 2104 // instruction 2105 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } 2106 }; 2107 2108 2109 // 2110 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way. 2111 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes 2112 // information about the input, output and temporaries used by the 2113 // op to be recorded. It also records whether the op has call semantics 2114 // and also records all the CodeEmitInfos used by this op. 2115 // 2116 2117 2118 class LIR_OpVisitState: public StackObj { 2119 public: 2120 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode; 2121 2122 enum { 2123 maxNumberOfOperands = 16, 2124 maxNumberOfInfos = 4 2125 }; 2126 2127 private: 2128 LIR_Op* _op; 2129 2130 // optimization: the operands and infos are not stored in a variable-length 2131 // list, but in a fixed-size array to save time of size checks and resizing 2132 int _oprs_len[numModes]; 2133 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands]; 2134 int _info_len; 2135 CodeEmitInfo* _info_new[maxNumberOfInfos]; 2136 2137 bool _has_call; 2138 bool _has_slow_case; 2139 2140 2141 // only include register operands 2142 // addresses are decomposed to the base and index registers 2143 // constants and stack operands are ignored 2144 void append(LIR_Opr& opr, OprMode mode) { 2145 assert(opr->is_valid(), "should not call this otherwise"); 2146 assert(mode >= 0 && mode < numModes, "bad mode"); 2147 2148 if (opr->is_register()) { 2149 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); 2150 _oprs_new[mode][_oprs_len[mode]++] = &opr; 2151 2152 } else if (opr->is_pointer()) { 2153 LIR_Address* address = opr->as_address_ptr(); 2154 if (address != NULL) { 2155 // special handling for addresses: add base and index register of the address 2156 // both are always input operands! 2157 if (address->_base->is_valid()) { 2158 assert(address->_base->is_register(), "must be"); 2159 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow"); 2160 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_base; 2161 } 2162 if (address->_index->is_valid()) { 2163 assert(address->_index->is_register(), "must be"); 2164 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow"); 2165 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_index; 2166 } 2167 2168 } else { 2169 assert(opr->is_constant(), "constant operands are not processed"); 2170 } 2171 } else { 2172 assert(opr->is_stack(), "stack operands are not processed"); 2173 } 2174 } 2175 2176 void append(CodeEmitInfo* info) { 2177 assert(info != NULL, "should not call this otherwise"); 2178 assert(_info_len < maxNumberOfInfos, "array overflow"); 2179 _info_new[_info_len++] = info; 2180 } 2181 2182 public: 2183 LIR_OpVisitState() { reset(); } 2184 2185 LIR_Op* op() const { return _op; } 2186 void set_op(LIR_Op* op) { reset(); _op = op; } 2187 2188 bool has_call() const { return _has_call; } 2189 bool has_slow_case() const { return _has_slow_case; } 2190 2191 void reset() { 2192 _op = NULL; 2193 _has_call = false; 2194 _has_slow_case = false; 2195 2196 _oprs_len[inputMode] = 0; 2197 _oprs_len[tempMode] = 0; 2198 _oprs_len[outputMode] = 0; 2199 _info_len = 0; 2200 } 2201 2202 2203 int opr_count(OprMode mode) const { 2204 assert(mode >= 0 && mode < numModes, "bad mode"); 2205 return _oprs_len[mode]; 2206 } 2207 2208 LIR_Opr opr_at(OprMode mode, int index) const { 2209 assert(mode >= 0 && mode < numModes, "bad mode"); 2210 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); 2211 return *_oprs_new[mode][index]; 2212 } 2213 2214 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const { 2215 assert(mode >= 0 && mode < numModes, "bad mode"); 2216 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); 2217 *_oprs_new[mode][index] = opr; 2218 } 2219 2220 int info_count() const { 2221 return _info_len; 2222 } 2223 2224 CodeEmitInfo* info_at(int index) const { 2225 assert(index < _info_len, "index out of bounds"); 2226 return _info_new[index]; 2227 } 2228 2229 XHandlers* all_xhandler(); 2230 2231 // collects all register operands of the instruction 2232 void visit(LIR_Op* op); 2233 2234 #if ASSERT 2235 // check that an operation has no operands 2236 bool no_operands(LIR_Op* op); 2237 #endif 2238 2239 // LIR_Op visitor functions use these to fill in the state 2240 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); } 2241 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); } 2242 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); } 2243 void do_info(CodeEmitInfo* info) { append(info); } 2244 2245 void do_stub(CodeStub* stub); 2246 void do_call() { _has_call = true; } 2247 void do_slow_case() { _has_slow_case = true; } 2248 void do_slow_case(CodeEmitInfo* info) { 2249 _has_slow_case = true; 2250 append(info); 2251 } 2252 }; 2253 2254 2255 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; }; 2256 2257 #endif // SHARE_VM_C1_C1_LIR_HPP