428 Possible cause is a cache miss (card table base address resides in a 429 rarely accessed area of thread descriptor). 430 */ 431 // TODO-AARCH64 Investigate if mov_slow is faster than ldr from Rthread on AArch64 432 mov_address(card_table_base, (address)ct->byte_map_base(), symbolic_Relocation::card_table_reference); 433 } 434 435 // The 2nd part of the store check. 436 void InterpreterMacroAssembler::store_check_part2(Register obj, Register card_table_base, Register tmp) { 437 assert_different_registers(obj, card_table_base, tmp); 438 439 assert(CardTable::dirty_card_val() == 0, "Dirty card value must be 0 due to optimizations."); 440 #ifdef AARCH64 441 add(card_table_base, card_table_base, AsmOperand(obj, lsr, CardTable::card_shift)); 442 Address card_table_addr(card_table_base); 443 #else 444 Address card_table_addr(card_table_base, obj, lsr, CardTable::card_shift); 445 #endif 446 447 if (UseCondCardMark) { 448 #if INCLUDE_ALL_GCS 449 if (UseConcMarkSweepGC) { 450 membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreLoad), noreg); 451 } 452 #endif 453 Label already_dirty; 454 455 ldrb(tmp, card_table_addr); 456 cbz(tmp, already_dirty); 457 458 set_card(card_table_base, card_table_addr, tmp); 459 bind(already_dirty); 460 461 } else { 462 #if INCLUDE_ALL_GCS 463 if (UseConcMarkSweepGC && CMSPrecleaningEnabled) { 464 membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreStore), noreg); 465 } 466 #endif 467 set_card(card_table_base, card_table_addr, tmp); 468 } 469 } 470 471 void InterpreterMacroAssembler::set_card(Register card_table_base, Address card_table_addr, Register tmp) { 472 #ifdef AARCH64 473 strb(ZR, card_table_addr); 474 #else 475 CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set()); 476 CardTable* ct = ctbs->card_table(); 477 if ((((uintptr_t)ct->byte_map_base() & 0xff) == 0)) { 478 // Card table is aligned so the lowest byte of the table address base is zero. 479 // This works only if the code is not saved for later use, possibly 480 // in a context where the base would no longer be aligned. 481 strb(card_table_base, card_table_addr); 482 } else { | 428 Possible cause is a cache miss (card table base address resides in a 429 rarely accessed area of thread descriptor). 430 */ 431 // TODO-AARCH64 Investigate if mov_slow is faster than ldr from Rthread on AArch64 432 mov_address(card_table_base, (address)ct->byte_map_base(), symbolic_Relocation::card_table_reference); 433 } 434 435 // The 2nd part of the store check. 436 void InterpreterMacroAssembler::store_check_part2(Register obj, Register card_table_base, Register tmp) { 437 assert_different_registers(obj, card_table_base, tmp); 438 439 assert(CardTable::dirty_card_val() == 0, "Dirty card value must be 0 due to optimizations."); 440 #ifdef AARCH64 441 add(card_table_base, card_table_base, AsmOperand(obj, lsr, CardTable::card_shift)); 442 Address card_table_addr(card_table_base); 443 #else 444 Address card_table_addr(card_table_base, obj, lsr, CardTable::card_shift); 445 #endif 446 447 if (UseCondCardMark) { 448 #if INCLUDE_CMSGC 449 if (UseConcMarkSweepGC) { 450 membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreLoad), noreg); 451 } 452 #endif 453 Label already_dirty; 454 455 ldrb(tmp, card_table_addr); 456 cbz(tmp, already_dirty); 457 458 set_card(card_table_base, card_table_addr, tmp); 459 bind(already_dirty); 460 461 } else { 462 #if INCLUDE_CMSGC 463 if (UseConcMarkSweepGC && CMSPrecleaningEnabled) { 464 membar(MacroAssembler::Membar_mask_bits(MacroAssembler::StoreStore), noreg); 465 } 466 #endif 467 set_card(card_table_base, card_table_addr, tmp); 468 } 469 } 470 471 void InterpreterMacroAssembler::set_card(Register card_table_base, Address card_table_addr, Register tmp) { 472 #ifdef AARCH64 473 strb(ZR, card_table_addr); 474 #else 475 CardTableBarrierSet* ctbs = barrier_set_cast<CardTableBarrierSet>(BarrierSet::barrier_set()); 476 CardTable* ct = ctbs->card_table(); 477 if ((((uintptr_t)ct->byte_map_base() & 0xff) == 0)) { 478 // Card table is aligned so the lowest byte of the table address base is zero. 479 // This works only if the code is not saved for later use, possibly 480 // in a context where the base would no longer be aligned. 481 strb(card_table_base, card_table_addr); 482 } else { |