1 /*
   2  * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2016 SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #include "precompiled.hpp"
  27 #include "asm/assembler.inline.hpp"
  28 #include "compiler/disassembler.hpp"
  29 #include "gc/shared/collectedHeap.inline.hpp"
  30 #include "interpreter/interpreter.hpp"
  31 #include "gc/shared/cardTableBarrierSet.hpp"
  32 #include "memory/resourceArea.hpp"
  33 #include "prims/methodHandles.hpp"
  34 #include "runtime/biasedLocking.hpp"
  35 #include "runtime/interfaceSupport.inline.hpp"
  36 #include "runtime/objectMonitor.hpp"
  37 #include "runtime/os.hpp"
  38 #include "runtime/sharedRuntime.hpp"
  39 #include "runtime/stubRoutines.hpp"
  40 #include "utilities/macros.hpp"
  41 
  42 // Convention: Use Z_R0 and Z_R1 instead of Z_scratch_* in all
  43 // assembler_s390.* files.
  44 
  45 // Convert the raw encoding form into the form expected by the
  46 // constructor for Address. This is called by adlc generated code.
  47 Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) {
  48   assert(scale == 0, "Scale should not be used on z/Architecture. The call to make_raw is "
  49          "generated by adlc and this must mirror all features of Operands from machnode.hpp.");
  50   assert(disp_reloc == relocInfo::none, "not implemented on z/Architecture.");
  51 
  52   Address madr(as_Register(base), as_Register(index), in_ByteSize(disp));
  53   return madr;
  54 }
  55 
  56 int AbstractAssembler::code_fill_byte() {
  57   return 0x00; // Illegal instruction 0x00000000.
  58 }
  59 
  60 // Condition code masks. Details see enum branch_condition.
  61 // Although this method is meant for INT CCs, the Overflow/Ordered
  62 // bit in the masks has to be considered. The CC might have been set
  63 // by a float operation, but is evaluated while calculating an integer
  64 // result. See elementary test TestFloat.isNotEqual(FF)Z for example.
  65 Assembler::branch_condition Assembler::inverse_condition(Assembler::branch_condition cc) {
  66   Assembler::branch_condition unordered_bit = (Assembler::branch_condition)(cc & bcondNotOrdered);
  67   Assembler::branch_condition inverse_cc;
  68 
  69   // Some are commented out to avoid duplicate labels.
  70   switch (cc) {
  71     case bcondNever       : inverse_cc = bcondAlways;      break;  //  0 -> 15
  72     case bcondAlways      : inverse_cc = bcondNever;       break;  // 15 ->  0
  73 
  74     case bcondOverflow    : inverse_cc = bcondNotOverflow; break;  //  1 -> 14
  75     case bcondNotOverflow : inverse_cc = bcondOverflow;    break;  // 14 ->  1
  76 
  77     default :
  78       switch ((Assembler::branch_condition)(cc & bcondOrdered)) {
  79         case bcondEqual       : inverse_cc = bcondNotEqual;  break;  //  8 ->  6
  80         // case bcondZero        :
  81         // case bcondAllZero     :
  82 
  83         case bcondNotEqual    : inverse_cc = bcondEqual;     break;  //  6 ->  8
  84         // case bcondNotZero     :
  85         // case bcondMixed       :
  86 
  87         case bcondLow         : inverse_cc = bcondNotLow;    break;  //  4 -> 10
  88         // case bcondNegative    :
  89 
  90         case bcondNotLow      : inverse_cc = bcondLow;       break;  // 10 ->  4
  91         // case bcondNotNegative :
  92 
  93         case bcondHigh        : inverse_cc = bcondNotHigh;   break;  //  2 -> 12
  94         // case bcondPositive    :
  95 
  96         case bcondNotHigh     : inverse_cc = bcondHigh;      break;  // 12 ->  2
  97         // case bcondNotPositive :
  98 
  99         default :
 100           fprintf(stderr, "inverse_condition(%d)\n", (int)cc);
 101           fflush(stderr);
 102           ShouldNotReachHere();
 103           return bcondNever;
 104       }
 105       // If cc is even, inverse_cc must be odd.
 106       if (!unordered_bit) {
 107         inverse_cc = (Assembler::branch_condition)(inverse_cc | bcondNotOrdered);
 108       }
 109       break;
 110   }
 111   return inverse_cc;
 112 }
 113 
 114 Assembler::branch_condition Assembler::inverse_float_condition(Assembler::branch_condition cc) {
 115   Assembler::branch_condition  inverse_cc;
 116 
 117   switch (cc) {
 118     case bcondNever       : inverse_cc = bcondAlways;      break;  //  0
 119     case bcondAlways      : inverse_cc = bcondNever;       break;  // 15
 120 
 121     case bcondNotOrdered  : inverse_cc = bcondOrdered;     break;  // 14
 122     case bcondOrdered     : inverse_cc = bcondNotOrdered;  break;  //  1
 123 
 124     case bcondEqual                      : inverse_cc = (branch_condition)(bcondNotEqual + bcondNotOrdered);  break; //  8
 125     case bcondNotEqual + bcondNotOrdered : inverse_cc = bcondEqual;  break;                                          //  7
 126 
 127     case bcondLow      + bcondNotOrdered : inverse_cc = (branch_condition)(bcondHigh + bcondEqual);      break;      //  5
 128     case bcondNotLow                     : inverse_cc = (branch_condition)(bcondLow  + bcondNotOrdered); break;      // 10
 129 
 130     case bcondHigh                       : inverse_cc = (branch_condition)(bcondLow  + bcondNotOrdered + bcondEqual); break;  //  2
 131     case bcondNotHigh  + bcondNotOrdered : inverse_cc = bcondHigh; break;                                                     // 13
 132 
 133     default :
 134       fprintf(stderr, "inverse_float_condition(%d)\n", (int)cc);
 135       fflush(stderr);
 136       ShouldNotReachHere();
 137       return bcondNever;
 138   }
 139   return inverse_cc;
 140 }
 141 
 142 #ifdef ASSERT
 143 void Assembler::print_dbg_msg(outputStream* out, unsigned long inst, const char* msg, int ilen) {
 144   out->flush();
 145   switch (ilen) {
 146     case 2:  out->print_cr("inst = %4.4x, %s",    (unsigned short)inst, msg); break;
 147     case 4:  out->print_cr("inst = %8.8x, %s\n",    (unsigned int)inst, msg); break;
 148     case 6:  out->print_cr("inst = %12.12lx, %s\n",               inst, msg); break;
 149     default: out->print_cr("inst = %16.16lx, %s\n",               inst, msg); break;
 150   }
 151   out->flush();
 152 }
 153 
 154 void Assembler::dump_code_range(outputStream* out, address pc, const unsigned int range, const char* msg) {
 155   out->cr();
 156   out->print_cr("-------------------------------");
 157   out->print_cr("--  %s", msg);
 158   out->print_cr("-------------------------------");
 159   out->print_cr("Hex dump    of +/-%d bytes around %p, interval [%p,%p)", range, pc, pc-range, pc+range);
 160   os::print_hex_dump(out, pc-range, pc+range, 2);
 161 
 162   out->cr();
 163   out->print_cr("Disassembly of +/-%d bytes around %p, interval [%p,%p)", range, pc, pc-range, pc+range);
 164   Disassembler::decode(pc, pc + range, out);
 165 }
 166 #endif