--- old/src/hotspot/os_cpu/linux_x86/atomic_linux_x86.hpp 2019-11-21 11:17:03.455462042 +0100 +++ new/src/hotspot/os_cpu/linux_x86/atomic_linux_x86.hpp 2019-11-21 11:17:03.079456006 +0100 @@ -169,4 +169,54 @@ #endif // AMD64 +template<> +struct Atomic::PlatformOrderedStore<1, RELEASE_X_FENCE> +{ + template + void operator()(T v, volatile T* p) const { + __asm__ volatile ( "xchgb (%2),%0" + : "=q" (v) + : "0" (v), "r" (p) + : "memory"); + } +}; + +template<> +struct Atomic::PlatformOrderedStore<2, RELEASE_X_FENCE> +{ + template + void operator()(T v, volatile T* p) const { + __asm__ volatile ( "xchgw (%2),%0" + : "=r" (v) + : "0" (v), "r" (p) + : "memory"); + } +}; + +template<> +struct Atomic::PlatformOrderedStore<4, RELEASE_X_FENCE> +{ + template + void operator()(T v, volatile T* p) const { + __asm__ volatile ( "xchgl (%2),%0" + : "=r" (v) + : "0" (v), "r" (p) + : "memory"); + } +}; + +#ifdef AMD64 +template<> +struct Atomic::PlatformOrderedStore<8, RELEASE_X_FENCE> +{ + template + void operator()(T v, volatile T* p) const { + __asm__ volatile ( "xchgq (%2), %0" + : "=r" (v) + : "0" (v), "r" (p) + : "memory"); + } +}; +#endif // AMD64 + #endif // OS_CPU_LINUX_X86_ATOMIC_LINUX_X86_HPP