src/hotspot/os_cpu/linux_x86/orderAccess_linux_x86.hpp

*** 64,119 ****
    // clobbered, so we must protect it around the CPUID.
    __asm__ volatile ("xchg %%esi, %%ebx; cpuid; xchg %%esi, %%ebx " : "+a" (idx) : : "esi", "ecx", "edx", "memory");
  #endif
  }
  
- template<>
- struct OrderAccess::PlatformOrderedStore<1, RELEASE_X_FENCE>
- {
-   template <typename T>
-   void operator()(T v, volatile T* p) const {
-     __asm__ volatile (  "xchgb (%2),%0"
-                       : "=q" (v)
-                       : "0" (v), "r" (p)
-                       : "memory");
-   }
- };
- 
- template<>
- struct OrderAccess::PlatformOrderedStore<2, RELEASE_X_FENCE>
- {
-   template <typename T>
-   void operator()(T v, volatile T* p) const {
-     __asm__ volatile (  "xchgw (%2),%0"
-                       : "=r" (v)
-                       : "0" (v), "r" (p)
-                       : "memory");
-   }
- };
- 
- template<>
- struct OrderAccess::PlatformOrderedStore<4, RELEASE_X_FENCE>
- {
-   template <typename T>
-   void operator()(T v, volatile T* p) const {
-     __asm__ volatile (  "xchgl (%2),%0"
-                       : "=r" (v)
-                       : "0" (v), "r" (p)
-                       : "memory");
-   }
- };
- 
- #ifdef AMD64
- template<>
- struct OrderAccess::PlatformOrderedStore<8, RELEASE_X_FENCE>
- {
-   template <typename T>
-   void operator()(T v, volatile T* p) const {
-     __asm__ volatile (  "xchgq (%2), %0"
-                       : "=r" (v)
-                       : "0" (v), "r" (p)
-                       : "memory");
-   }
- };
- #endif // AMD64
- 
  #endif // OS_CPU_LINUX_X86_ORDERACCESS_LINUX_X86_HPP
--- 64,69 ----