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src/hotspot/os_cpu/linux_ppc/atomic_linux_ppc.hpp

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  79     case memory_order_acq_rel: __asm__ __volatile__ ("lwsync" : : : "memory"); break;
  80     default /*conservative*/ : __asm__ __volatile__ ("sync"   : : : "memory"); break;
  81   }
  82 }
  83 
  84 inline void post_membar(atomic_memory_order order) {
  85   switch (order) {
  86     case memory_order_relaxed:
  87     case memory_order_release: break;
  88     case memory_order_acquire:
  89     case memory_order_acq_rel: __asm__ __volatile__ ("isync"  : : : "memory"); break;
  90     default /*conservative*/ : __asm__ __volatile__ ("sync"   : : : "memory"); break;
  91   }
  92 }
  93 
  94 
  95 template<size_t byte_size>
  96 struct Atomic::PlatformAdd
  97   : Atomic::AddAndFetch<Atomic::PlatformAdd<byte_size> >
  98 {
  99   template<typename I, typename D>
 100   D add_and_fetch(I add_value, D volatile* dest, atomic_memory_order order) const;
 101 };
 102 
 103 template<>
 104 template<typename I, typename D>
 105 inline D Atomic::PlatformAdd<4>::add_and_fetch(I add_value, D volatile* dest,
 106                                                atomic_memory_order order) const {
 107   STATIC_ASSERT(4 == sizeof(I));
 108   STATIC_ASSERT(4 == sizeof(D));
 109 
 110   D result;
 111 
 112   pre_membar(order);
 113 
 114   __asm__ __volatile__ (
 115     "1: lwarx   %0,  0, %2    \n"
 116     "   add     %0, %0, %1    \n"
 117     "   stwcx.  %0,  0, %2    \n"
 118     "   bne-    1b            \n"
 119     : /*%0*/"=&r" (result)
 120     : /*%1*/"r" (add_value), /*%2*/"r" (dest)
 121     : "cc", "memory" );
 122 
 123   post_membar(order);
 124 
 125   return result;
 126 }
 127 
 128 
 129 template<>
 130 template<typename I, typename D>
 131 inline D Atomic::PlatformAdd<8>::add_and_fetch(I add_value, D volatile* dest,
 132                                                atomic_memory_order order) const {
 133   STATIC_ASSERT(8 == sizeof(I));
 134   STATIC_ASSERT(8 == sizeof(D));
 135 
 136   D result;
 137 
 138   pre_membar(order);
 139 
 140   __asm__ __volatile__ (
 141     "1: ldarx   %0,  0, %2    \n"
 142     "   add     %0, %0, %1    \n"
 143     "   stdcx.  %0,  0, %2    \n"
 144     "   bne-    1b            \n"
 145     : /*%0*/"=&r" (result)
 146     : /*%1*/"r" (add_value), /*%2*/"r" (dest)
 147     : "cc", "memory" );
 148 
 149   post_membar(order);
 150 
 151   return result;




  79     case memory_order_acq_rel: __asm__ __volatile__ ("lwsync" : : : "memory"); break;
  80     default /*conservative*/ : __asm__ __volatile__ ("sync"   : : : "memory"); break;
  81   }
  82 }
  83 
  84 inline void post_membar(atomic_memory_order order) {
  85   switch (order) {
  86     case memory_order_relaxed:
  87     case memory_order_release: break;
  88     case memory_order_acquire:
  89     case memory_order_acq_rel: __asm__ __volatile__ ("isync"  : : : "memory"); break;
  90     default /*conservative*/ : __asm__ __volatile__ ("sync"   : : : "memory"); break;
  91   }
  92 }
  93 
  94 
  95 template<size_t byte_size>
  96 struct Atomic::PlatformAdd
  97   : Atomic::AddAndFetch<Atomic::PlatformAdd<byte_size> >
  98 {
  99   template<typename D, typename I>
 100   D add_and_fetch(D volatile* dest, I add_value, atomic_memory_order order) const;
 101 };
 102 
 103 template<>
 104 template<typename D, typename I>
 105 inline D Atomic::PlatformAdd<4>::add_and_fetch(D volatile* dest, I add_value,
 106                                                atomic_memory_order order) const {
 107   STATIC_ASSERT(4 == sizeof(I));
 108   STATIC_ASSERT(4 == sizeof(D));
 109 
 110   D result;
 111 
 112   pre_membar(order);
 113 
 114   __asm__ __volatile__ (
 115     "1: lwarx   %0,  0, %2    \n"
 116     "   add     %0, %0, %1    \n"
 117     "   stwcx.  %0,  0, %2    \n"
 118     "   bne-    1b            \n"
 119     : /*%0*/"=&r" (result)
 120     : /*%1*/"r" (add_value), /*%2*/"r" (dest)
 121     : "cc", "memory" );
 122 
 123   post_membar(order);
 124 
 125   return result;
 126 }
 127 
 128 
 129 template<>
 130 template<typename D, typename I>
 131 inline D Atomic::PlatformAdd<8>::add_and_fetch(D volatile* dest, I add_value,
 132                                                atomic_memory_order order) const {
 133   STATIC_ASSERT(8 == sizeof(I));
 134   STATIC_ASSERT(8 == sizeof(D));
 135 
 136   D result;
 137 
 138   pre_membar(order);
 139 
 140   __asm__ __volatile__ (
 141     "1: ldarx   %0,  0, %2    \n"
 142     "   add     %0, %0, %1    \n"
 143     "   stdcx.  %0,  0, %2    \n"
 144     "   bne-    1b            \n"
 145     : /*%0*/"=&r" (result)
 146     : /*%1*/"r" (add_value), /*%2*/"r" (dest)
 147     : "cc", "memory" );
 148 
 149   post_membar(order);
 150 
 151   return result;


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