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src/hotspot/os_cpu/bsd_zero/atomic_bsd_zero.hpp

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 180 #ifdef M68K
 181   return add_using_helper<int>(m68k_add_and_fetch, dest, add_value);
 182 #else
 183   return __sync_add_and_fetch(dest, add_value);
 184 #endif // M68K
 185 #endif // ARM
 186 }
 187 
 188 template<>
 189 template<typename D, typename !>
 190 inline D Atomic::PlatformAdd<8>::add_and_fetch(D volatile* dest, I add_value,
 191                                                atomic_memory_order order) const {
 192   STATIC_ASSERT(8 == sizeof(I));
 193   STATIC_ASSERT(8 == sizeof(D));
 194 
 195   return __sync_add_and_fetch(dest, add_value);
 196 }
 197 
 198 template<>
 199 template<typename T>
 200 inline T Atomic::PlatformXchg<4>::operator()(T exchange_value,
 201                                              T volatile* dest,
 202                                              atomic_memory_order order) const {
 203   STATIC_ASSERT(4 == sizeof(T));
 204 #ifdef ARM
 205   return xchg_using_helper<int>(arm_lock_test_and_set, exchange_value, dest);
 206 #else
 207 #ifdef M68K
 208   return xchg_using_helper<int>(m68k_lock_test_and_set, exchange_value, dest);
 209 #else
 210   // __sync_lock_test_and_set is a bizarrely named atomic exchange
 211   // operation.  Note that some platforms only support this with the
 212   // limitation that the only valid value to store is the immediate
 213   // constant 1.  There is a test for this in JNI_CreateJavaVM().
 214   T result = __sync_lock_test_and_set (dest, exchange_value);
 215   // All atomic operations are expected to be full memory barriers
 216   // (see atomic.hpp). However, __sync_lock_test_and_set is not
 217   // a full memory barrier, but an acquire barrier. Hence, this added
 218   // barrier.
 219   __sync_synchronize();
 220   return result;
 221 #endif // M68K
 222 #endif // ARM
 223 }
 224 
 225 template<>
 226 template<typename T>
 227 inline T Atomic::PlatformXchg<8>::operator()(T exchange_value,
 228                                              T volatile* dest,
 229                                              atomic_memory_order order) const {
 230   STATIC_ASSERT(8 == sizeof(T));
 231   T result = __sync_lock_test_and_set (dest, exchange_value);
 232   __sync_synchronize();
 233   return result;
 234 }
 235 
 236 // No direct support for cmpxchg of bytes; emulate using int.
 237 template<>
 238 struct Atomic::PlatformCmpxchg<1> : Atomic::CmpxchgByteUsingInt {};
 239 
 240 template<>
 241 template<typename T>
 242 inline T Atomic::PlatformCmpxchg<4>::operator()(T exchange_value,
 243                                                 T volatile* dest,
 244                                                 T compare_value,
 245                                                 atomic_memory_order order) const {
 246   STATIC_ASSERT(4 == sizeof(T));
 247 #ifdef ARM
 248   return cmpxchg_using_helper<int>(arm_compare_and_swap, exchange_value, dest, compare_value);




 180 #ifdef M68K
 181   return add_using_helper<int>(m68k_add_and_fetch, dest, add_value);
 182 #else
 183   return __sync_add_and_fetch(dest, add_value);
 184 #endif // M68K
 185 #endif // ARM
 186 }
 187 
 188 template<>
 189 template<typename D, typename !>
 190 inline D Atomic::PlatformAdd<8>::add_and_fetch(D volatile* dest, I add_value,
 191                                                atomic_memory_order order) const {
 192   STATIC_ASSERT(8 == sizeof(I));
 193   STATIC_ASSERT(8 == sizeof(D));
 194 
 195   return __sync_add_and_fetch(dest, add_value);
 196 }
 197 
 198 template<>
 199 template<typename T>
 200 inline T Atomic::PlatformXchg<4>::operator()(T volatile* dest,
 201                                              T exchange_value,
 202                                              atomic_memory_order order) const {
 203   STATIC_ASSERT(4 == sizeof(T));
 204 #ifdef ARM
 205   return xchg_using_helper<int>(arm_lock_test_and_set, dest, exchange_value);
 206 #else
 207 #ifdef M68K
 208   return xchg_using_helper<int>(m68k_lock_test_and_set, dest, exchange_value);
 209 #else
 210   // __sync_lock_test_and_set is a bizarrely named atomic exchange
 211   // operation.  Note that some platforms only support this with the
 212   // limitation that the only valid value to store is the immediate
 213   // constant 1.  There is a test for this in JNI_CreateJavaVM().
 214   T result = __sync_lock_test_and_set (dest, exchange_value);
 215   // All atomic operations are expected to be full memory barriers
 216   // (see atomic.hpp). However, __sync_lock_test_and_set is not
 217   // a full memory barrier, but an acquire barrier. Hence, this added
 218   // barrier.
 219   __sync_synchronize();
 220   return result;
 221 #endif // M68K
 222 #endif // ARM
 223 }
 224 
 225 template<>
 226 template<typename T>
 227 inline T Atomic::PlatformXchg<8>::operator()(T volatile* dest,
 228                                              T exchange_value,
 229                                              atomic_memory_order order) const {
 230   STATIC_ASSERT(8 == sizeof(T));
 231   T result = __sync_lock_test_and_set (dest, exchange_value);
 232   __sync_synchronize();
 233   return result;
 234 }
 235 
 236 // No direct support for cmpxchg of bytes; emulate using int.
 237 template<>
 238 struct Atomic::PlatformCmpxchg<1> : Atomic::CmpxchgByteUsingInt {};
 239 
 240 template<>
 241 template<typename T>
 242 inline T Atomic::PlatformCmpxchg<4>::operator()(T exchange_value,
 243                                                 T volatile* dest,
 244                                                 T compare_value,
 245                                                 atomic_memory_order order) const {
 246   STATIC_ASSERT(4 == sizeof(T));
 247 #ifdef ARM
 248   return cmpxchg_using_helper<int>(arm_compare_and_swap, exchange_value, dest, compare_value);


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