src/hotspot/cpu/x86/assembler_x86.cpp

*** 7230,7240 ****
    emit_int8((unsigned char)(0xC0 | encode));
    emit_int8((unsigned char)mask);
  }
  
  void Assembler::evpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask, int vector_len) {
!   assert(VM_Version::supports_vpclmulqdq(), "Requires vector carryless multiplication support");
    InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
    attributes.set_is_evex_instruction();
    int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
    emit_int8(0x44);
    emit_int8((unsigned char)(0xC0 | encode));
--- 7230,7240 ----
    emit_int8((unsigned char)(0xC0 | encode));
    emit_int8((unsigned char)mask);
  }
  
  void Assembler::evpclmulqdq(XMMRegister dst, XMMRegister nds, XMMRegister src, int mask, int vector_len) {
!   assert(VM_Version::supports_avx512_vpclmulqdq(), "Requires vector carryless multiplication support");
    InstructionAttr attributes(vector_len, /* vex_w */ false, /* legacy_mode */ false, /* no_mask_reg */ true, /* uses_vl */ true);
    attributes.set_is_evex_instruction();
    int encode = vex_prefix_and_encode(dst->encoding(), nds->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F_3A, &attributes);
    emit_int8(0x44);
    emit_int8((unsigned char)(0xC0 | encode));