src/hotspot/cpu/x86/vm_version_x86.hpp

*** 243,253 ****
                             : 1,
                avx512_vbmi2 : 1,
                             : 1,
                        gfni : 1,
                        vaes : 1,
!                 vpclmulqdq : 1,
                 avx512_vnni : 1,
               avx512_bitalg : 1,
                             : 1,
            avx512_vpopcntdq : 1,
                             : 17;
--- 243,253 ----
                             : 1,
                avx512_vbmi2 : 1,
                             : 1,
                        gfni : 1,
                        vaes : 1,
!          avx512_vpclmulqdq : 1,
                 avx512_vnni : 1,
               avx512_bitalg : 1,
                             : 1,
            avx512_vpopcntdq : 1,
                             : 17;
*** 336,346 ****
  #define CPU_AVX512VL ((uint64_t)UCONST64(0x200000000)) // EVEX instructions with smaller vector length
  #define CPU_SHA ((uint64_t)UCONST64(0x400000000))      // SHA instructions
  #define CPU_FMA ((uint64_t)UCONST64(0x800000000))      // FMA instructions
  #define CPU_VZEROUPPER ((uint64_t)UCONST64(0x1000000000))       // Vzeroupper instruction
  #define CPU_AVX512_VPOPCNTDQ ((uint64_t)UCONST64(0x2000000000)) // Vector popcount
! #define CPU_VPCLMULQDQ ((uint64_t)UCONST64(0x4000000000)) //Vector carryless multiplication
  #define CPU_VAES ((uint64_t)UCONST64(0x8000000000))    // Vector AES instructions
  #define CPU_VNNI ((uint64_t)UCONST64(0x10000000000))   // Vector Neural Network Instructions
  
  #define CPU_FLUSH ((uint64_t)UCONST64(0x20000000000))  // flush instruction
  #define CPU_FLUSHOPT ((uint64_t)UCONST64(0x40000000000)) // flushopt instruction
--- 336,346 ----
  #define CPU_AVX512VL ((uint64_t)UCONST64(0x200000000)) // EVEX instructions with smaller vector length
  #define CPU_SHA ((uint64_t)UCONST64(0x400000000))      // SHA instructions
  #define CPU_FMA ((uint64_t)UCONST64(0x800000000))      // FMA instructions
  #define CPU_VZEROUPPER ((uint64_t)UCONST64(0x1000000000))       // Vzeroupper instruction
  #define CPU_AVX512_VPOPCNTDQ ((uint64_t)UCONST64(0x2000000000)) // Vector popcount
! #define CPU_AVX512_VPCLMULQDQ ((uint64_t)UCONST64(0x4000000000)) //Vector carryless multiplication
  #define CPU_VAES ((uint64_t)UCONST64(0x8000000000))    // Vector AES instructions
  #define CPU_VNNI ((uint64_t)UCONST64(0x10000000000))   // Vector Neural Network Instructions
  
  #define CPU_FLUSH ((uint64_t)UCONST64(0x20000000000))  // flush instruction
  #define CPU_FLUSHOPT ((uint64_t)UCONST64(0x40000000000)) // flushopt instruction
*** 559,570 ****
            result |= CPU_AVX512BW;
          if (_cpuid_info.sef_cpuid7_ebx.bits.avx512vl != 0)
            result |= CPU_AVX512VL;
          if (_cpuid_info.sef_cpuid7_ecx.bits.avx512_vpopcntdq != 0)
            result |= CPU_AVX512_VPOPCNTDQ;
!         if (_cpuid_info.sef_cpuid7_ecx.bits.vpclmulqdq != 0)
!           result |= CPU_VPCLMULQDQ;
          if (_cpuid_info.sef_cpuid7_ecx.bits.vaes != 0)
            result |= CPU_VAES;
          if (_cpuid_info.sef_cpuid7_ecx.bits.avx512_vnni != 0)
            result |= CPU_VNNI;
        }
--- 559,570 ----
            result |= CPU_AVX512BW;
          if (_cpuid_info.sef_cpuid7_ebx.bits.avx512vl != 0)
            result |= CPU_AVX512VL;
          if (_cpuid_info.sef_cpuid7_ecx.bits.avx512_vpopcntdq != 0)
            result |= CPU_AVX512_VPOPCNTDQ;
!         if (_cpuid_info.sef_cpuid7_ecx.bits.avx512_vpclmulqdq != 0)
!           result |= CPU_AVX512_VPCLMULQDQ;
          if (_cpuid_info.sef_cpuid7_ecx.bits.vaes != 0)
            result |= CPU_VAES;
          if (_cpuid_info.sef_cpuid7_ecx.bits.avx512_vnni != 0)
            result |= CPU_VNNI;
        }
*** 853,863 ****
    static bool supports_avxonly()    { return ((supports_avx2() || supports_avx()) && !supports_evex()); }
    static bool supports_sha()        { return (_features & CPU_SHA) != 0; }
    static bool supports_fma()        { return (_features & CPU_FMA) != 0 && supports_avx(); }
    static bool supports_vzeroupper() { return (_features & CPU_VZEROUPPER) != 0; }
    static bool supports_vpopcntdq()  { return (_features & CPU_AVX512_VPOPCNTDQ) != 0; }
!   static bool supports_vpclmulqdq() { return (_features & CPU_VPCLMULQDQ) != 0; }
    static bool supports_vaes()       { return (_features & CPU_VAES) != 0; }
    static bool supports_vnni()       { return (_features & CPU_VNNI) != 0; }
  
    // Intel features
    static bool is_intel_family_core() { return is_intel() &&
--- 853,863 ----
    static bool supports_avxonly()    { return ((supports_avx2() || supports_avx()) && !supports_evex()); }
    static bool supports_sha()        { return (_features & CPU_SHA) != 0; }
    static bool supports_fma()        { return (_features & CPU_FMA) != 0 && supports_avx(); }
    static bool supports_vzeroupper() { return (_features & CPU_VZEROUPPER) != 0; }
    static bool supports_vpopcntdq()  { return (_features & CPU_AVX512_VPOPCNTDQ) != 0; }
!   static bool supports_avx512_vpclmulqdq() { return (_features & CPU_AVX512_VPCLMULQDQ) != 0; }
    static bool supports_vaes()       { return (_features & CPU_VAES) != 0; }
    static bool supports_vnni()       { return (_features & CPU_VNNI) != 0; }
  
    // Intel features
    static bool is_intel_family_core() { return is_intel() &&