1 /*
2 * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #ifndef _WINDOWS
27 #include "alloca.h"
28 #endif
29 #include "asm/macroAssembler.hpp"
30 #include "asm/macroAssembler.inline.hpp"
31 #include "classfile/symbolTable.hpp"
32 #include "code/debugInfoRec.hpp"
33 #include "code/icBuffer.hpp"
34 #include "code/nativeInst.hpp"
35 #include "code/vtableStubs.hpp"
36 #include "gc/shared/gcLocker.hpp"
37 #include "interpreter/interpreter.hpp"
38 #include "logging/log.hpp"
39 #include "memory/resourceArea.hpp"
40 #include "oops/compiledICHolder.hpp"
41 #include "runtime/safepointMechanism.hpp"
42 #include "runtime/sharedRuntime.hpp"
43 #include "runtime/vframeArray.hpp"
44 #include "utilities/align.hpp"
45 #include "utilities/formatBuffer.hpp"
46 #include "vm_version_x86.hpp"
47 #include "vmreg_x86.inline.hpp"
48 #ifdef COMPILER1
49 #include "c1/c1_Runtime1.hpp"
50 #endif
51 #ifdef COMPILER2
52 #include "opto/runtime.hpp"
53 #endif
54 #if INCLUDE_JVMCI
55 #include "jvmci/jvmciJavaClasses.hpp"
56 #endif
57
58 #define __ masm->
59
60 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
61
62 class SimpleRuntimeFrame {
63
64 public:
65
66 // Most of the runtime stubs have this simple frame layout.
67 // This class exists to make the layout shared in one place.
68 // Offsets are for compiler stack slots, which are jints.
69 enum layout {
70 // The frame sender code expects that rbp will be in the "natural" place and
71 // will override any oopMap setting for it. We must therefore force the layout
72 // so that it agrees with the frame sender code.
73 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
74 rbp_off2,
75 return_off, return_off2,
76 framesize
77 };
78 };
79
80 class RegisterSaver {
81 // Capture info about frame layout. Layout offsets are in jint
82 // units because compiler frame slots are jints.
83 #define XSAVE_AREA_BEGIN 160
84 #define XSAVE_AREA_YMM_BEGIN 576
85 #define XSAVE_AREA_ZMM_BEGIN 1152
86 #define XSAVE_AREA_UPPERBANK 1664
87 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
88 #define DEF_YMM_OFFS(regnum) ymm ## regnum ## _off = ymm_off + (regnum)*16/BytesPerInt, ymm ## regnum ## H_off
89 #define DEF_ZMM_OFFS(regnum) zmm ## regnum ## _off = zmm_off + (regnum-16)*64/BytesPerInt, zmm ## regnum ## H_off
90 enum layout {
91 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
92 xmm_off = fpu_state_off + XSAVE_AREA_BEGIN/BytesPerInt, // offset in fxsave save area
93 DEF_XMM_OFFS(0),
94 DEF_XMM_OFFS(1),
95 // 2..15 are implied in range usage
96 ymm_off = xmm_off + (XSAVE_AREA_YMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
97 DEF_YMM_OFFS(0),
98 DEF_YMM_OFFS(1),
99 // 2..15 are implied in range usage
100 zmm_high = xmm_off + (XSAVE_AREA_ZMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
101 zmm_off = xmm_off + (XSAVE_AREA_UPPERBANK - XSAVE_AREA_BEGIN)/BytesPerInt,
102 DEF_ZMM_OFFS(16),
103 DEF_ZMM_OFFS(17),
104 // 18..31 are implied in range usage
105 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
106 fpu_stateH_end,
107 r15_off, r15H_off,
108 r14_off, r14H_off,
109 r13_off, r13H_off,
110 r12_off, r12H_off,
111 r11_off, r11H_off,
112 r10_off, r10H_off,
113 r9_off, r9H_off,
114 r8_off, r8H_off,
115 rdi_off, rdiH_off,
116 rsi_off, rsiH_off,
117 ignore_off, ignoreH_off, // extra copy of rbp
118 rsp_off, rspH_off,
119 rbx_off, rbxH_off,
120 rdx_off, rdxH_off,
121 rcx_off, rcxH_off,
122 rax_off, raxH_off,
123 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
124 align_off, alignH_off,
125 flags_off, flagsH_off,
126 // The frame sender code expects that rbp will be in the "natural" place and
127 // will override any oopMap setting for it. We must therefore force the layout
128 // so that it agrees with the frame sender code.
129 rbp_off, rbpH_off, // copy of rbp we will restore
130 return_off, returnH_off, // slot for return address
131 reg_save_size // size in compiler stack slots
132 };
133
134 public:
135 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false);
136 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
137
138 // Offsets into the register save area
139 // Used by deoptimization when it is managing result register
140 // values on its own
141
142 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; }
143 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; }
144 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; }
145 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; }
146 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
147
148 // During deoptimization only the result registers need to be restored,
149 // all the other values have already been extracted.
150 static void restore_result_registers(MacroAssembler* masm);
151 };
152
153 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) {
154 int off = 0;
155 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
156 if (UseAVX < 3) {
157 num_xmm_regs = num_xmm_regs/2;
158 }
159 #if COMPILER2_OR_JVMCI
160 if (save_vectors) {
161 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
162 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
163 }
164 #else
165 assert(!save_vectors, "vectors are generated only by C2 and JVMCI");
166 #endif
167
168 // Always make the frame size 16-byte aligned, both vector and non vector stacks are always allocated
169 int frame_size_in_bytes = align_up(reg_save_size*BytesPerInt, num_xmm_regs);
170 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
171 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
172 // CodeBlob frame size is in words.
173 int frame_size_in_words = frame_size_in_bytes / wordSize;
174 *total_frame_words = frame_size_in_words;
175
176 // Save registers, fpu state, and flags.
177 // We assume caller has already pushed the return address onto the
178 // stack, so rsp is 8-byte aligned here.
179 // We push rpb twice in this sequence because we want the real rbp
180 // to be under the return like a normal enter.
181
182 __ enter(); // rsp becomes 16-byte aligned here
183 __ push_CPU_state(); // Push a multiple of 16 bytes
184
185 // push cpu state handles this on EVEX enabled targets
186 if (save_vectors) {
187 // Save upper half of YMM registers(0..15)
188 int base_addr = XSAVE_AREA_YMM_BEGIN;
189 for (int n = 0; n < 16; n++) {
190 __ vextractf128_high(Address(rsp, base_addr+n*16), as_XMMRegister(n));
191 }
192 if (VM_Version::supports_evex()) {
193 // Save upper half of ZMM registers(0..15)
194 base_addr = XSAVE_AREA_ZMM_BEGIN;
195 for (int n = 0; n < 16; n++) {
196 __ vextractf64x4_high(Address(rsp, base_addr+n*32), as_XMMRegister(n));
197 }
198 // Save full ZMM registers(16..num_xmm_regs)
199 base_addr = XSAVE_AREA_UPPERBANK;
200 off = 0;
201 int vector_len = Assembler::AVX_512bit;
202 for (int n = 16; n < num_xmm_regs; n++) {
203 __ evmovdqul(Address(rsp, base_addr+(off++*64)), as_XMMRegister(n), vector_len);
204 }
205 }
206 } else {
207 if (VM_Version::supports_evex()) {
208 // Save upper bank of ZMM registers(16..31) for double/float usage
209 int base_addr = XSAVE_AREA_UPPERBANK;
210 off = 0;
211 for (int n = 16; n < num_xmm_regs; n++) {
212 __ movsd(Address(rsp, base_addr+(off++*64)), as_XMMRegister(n));
213 }
214 }
215 }
216 __ vzeroupper();
217 if (frame::arg_reg_save_area_bytes != 0) {
218 // Allocate argument register save area
219 __ subptr(rsp, frame::arg_reg_save_area_bytes);
220 }
221
222 // Set an oopmap for the call site. This oopmap will map all
223 // oop-registers and debug-info registers as callee-saved. This
224 // will allow deoptimization at this safepoint to find all possible
225 // debug-info recordings, as well as let GC find all oops.
226
227 OopMapSet *oop_maps = new OopMapSet();
228 OopMap* map = new OopMap(frame_size_in_slots, 0);
229
230 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x))
231
232 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg());
233 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg());
234 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg());
235 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg());
236 // rbp location is known implicitly by the frame sender code, needs no oopmap
237 // and the location where rbp was saved by is ignored
238 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg());
239 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg());
240 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg());
241 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg());
242 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg());
243 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg());
244 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg());
245 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg());
246 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg());
247 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg());
248 // For both AVX and EVEX we will use the legacy FXSAVE area for xmm0..xmm15,
249 // on EVEX enabled targets, we get it included in the xsave area
250 off = xmm0_off;
251 int delta = xmm1_off - off;
252 for (int n = 0; n < 16; n++) {
253 XMMRegister xmm_name = as_XMMRegister(n);
254 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
255 off += delta;
256 }
257 if(UseAVX > 2) {
258 // Obtain xmm16..xmm31 from the XSAVE area on EVEX enabled targets
259 off = zmm16_off;
260 delta = zmm17_off - off;
261 for (int n = 16; n < num_xmm_regs; n++) {
262 XMMRegister zmm_name = as_XMMRegister(n);
263 map->set_callee_saved(STACK_OFFSET(off), zmm_name->as_VMReg());
264 off += delta;
265 }
266 }
267
268 #if COMPILER2_OR_JVMCI
269 if (save_vectors) {
270 off = ymm0_off;
271 int delta = ymm1_off - off;
272 for (int n = 0; n < 16; n++) {
273 XMMRegister ymm_name = as_XMMRegister(n);
274 map->set_callee_saved(STACK_OFFSET(off), ymm_name->as_VMReg()->next(4));
275 off += delta;
276 }
277 }
278 #endif // COMPILER2_OR_JVMCI
279
280 // %%% These should all be a waste but we'll keep things as they were for now
281 if (true) {
282 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next());
283 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next());
284 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next());
285 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next());
286 // rbp location is known implicitly by the frame sender code, needs no oopmap
287 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next());
288 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next());
289 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next());
290 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next());
291 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next());
292 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next());
293 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next());
294 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next());
295 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next());
296 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next());
297 // For both AVX and EVEX we will use the legacy FXSAVE area for xmm0..xmm15,
298 // on EVEX enabled targets, we get it included in the xsave area
299 off = xmm0H_off;
300 delta = xmm1H_off - off;
301 for (int n = 0; n < 16; n++) {
302 XMMRegister xmm_name = as_XMMRegister(n);
303 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg()->next());
304 off += delta;
305 }
306 if (UseAVX > 2) {
307 // Obtain xmm16..xmm31 from the XSAVE area on EVEX enabled targets
308 off = zmm16H_off;
309 delta = zmm17H_off - off;
310 for (int n = 16; n < num_xmm_regs; n++) {
311 XMMRegister zmm_name = as_XMMRegister(n);
312 map->set_callee_saved(STACK_OFFSET(off), zmm_name->as_VMReg()->next());
313 off += delta;
314 }
315 }
316 }
317
318 return map;
319 }
320
321 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
322 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
323 if (UseAVX < 3) {
324 num_xmm_regs = num_xmm_regs/2;
325 }
326 if (frame::arg_reg_save_area_bytes != 0) {
327 // Pop arg register save area
328 __ addptr(rsp, frame::arg_reg_save_area_bytes);
329 }
330
331 #if COMPILER2_OR_JVMCI
332 if (restore_vectors) {
333 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
334 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
335 }
336 #else
337 assert(!restore_vectors, "vectors are generated only by C2");
338 #endif
339
340 __ vzeroupper();
341
342 // On EVEX enabled targets everything is handled in pop fpu state
343 if (restore_vectors) {
344 // Restore upper half of YMM registers (0..15)
345 int base_addr = XSAVE_AREA_YMM_BEGIN;
346 for (int n = 0; n < 16; n++) {
347 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, base_addr+n*16));
348 }
349 if (VM_Version::supports_evex()) {
350 // Restore upper half of ZMM registers (0..15)
351 base_addr = XSAVE_AREA_ZMM_BEGIN;
352 for (int n = 0; n < 16; n++) {
353 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, base_addr+n*32));
354 }
355 // Restore full ZMM registers(16..num_xmm_regs)
356 base_addr = XSAVE_AREA_UPPERBANK;
357 int vector_len = Assembler::AVX_512bit;
358 int off = 0;
359 for (int n = 16; n < num_xmm_regs; n++) {
360 __ evmovdqul(as_XMMRegister(n), Address(rsp, base_addr+(off++*64)), vector_len);
361 }
362 }
363 } else {
364 if (VM_Version::supports_evex()) {
365 // Restore upper bank of ZMM registers(16..31) for double/float usage
366 int base_addr = XSAVE_AREA_UPPERBANK;
367 int off = 0;
368 for (int n = 16; n < num_xmm_regs; n++) {
369 __ movsd(as_XMMRegister(n), Address(rsp, base_addr+(off++*64)));
370 }
371 }
372 }
373
374 // Recover CPU state
375 __ pop_CPU_state();
376 // Get the rbp described implicitly by the calling convention (no oopMap)
377 __ pop(rbp);
378 }
379
380 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
381
382 // Just restore result register. Only used by deoptimization. By
383 // now any callee save register that needs to be restored to a c2
384 // caller of the deoptee has been extracted into the vframeArray
385 // and will be stuffed into the c2i adapter we create for later
386 // restoration so only result registers need to be restored here.
387
388 // Restore fp result register
389 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
390 // Restore integer result register
391 __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
392 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
393
394 // Pop all of the register save are off the stack except the return address
395 __ addptr(rsp, return_offset_in_bytes());
396 }
397
398 // Is vector's size (in bytes) bigger than a size saved by default?
399 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions.
400 bool SharedRuntime::is_wide_vector(int size) {
401 return size > 16;
402 }
403
404 size_t SharedRuntime::trampoline_size() {
405 return 16;
406 }
407
408 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
409 __ jump(RuntimeAddress(destination));
410 }
411
412 // The java_calling_convention describes stack locations as ideal slots on
413 // a frame with no abi restrictions. Since we must observe abi restrictions
414 // (like the placement of the register window) the slots must be biased by
415 // the following value.
416 static int reg2offset_in(VMReg r) {
417 // Account for saved rbp and return address
418 // This should really be in_preserve_stack_slots
419 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
420 }
421
422 static int reg2offset_out(VMReg r) {
423 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
424 }
425
426 // ---------------------------------------------------------------------------
427 // Read the array of BasicTypes from a signature, and compute where the
428 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
429 // quantities. Values less than VMRegImpl::stack0 are registers, those above
430 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
431 // as framesizes are fixed.
432 // VMRegImpl::stack0 refers to the first slot 0(sp).
433 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
434 // up to RegisterImpl::number_of_registers) are the 64-bit
435 // integer registers.
436
437 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
438 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
439 // units regardless of build. Of course for i486 there is no 64 bit build
440
441 // The Java calling convention is a "shifted" version of the C ABI.
442 // By skipping the first C ABI register we can call non-static jni methods
443 // with small numbers of arguments without having to shuffle the arguments
444 // at all. Since we control the java ABI we ought to at least get some
445 // advantage out of it.
446
447 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
448 VMRegPair *regs,
449 int total_args_passed,
450 int is_outgoing) {
451
452 // Create the mapping between argument positions and
453 // registers.
454 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
455 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
456 };
457 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
458 j_farg0, j_farg1, j_farg2, j_farg3,
459 j_farg4, j_farg5, j_farg6, j_farg7
460 };
461
462
463 uint int_args = 0;
464 uint fp_args = 0;
465 uint stk_args = 0; // inc by 2 each time
466
467 for (int i = 0; i < total_args_passed; i++) {
468 switch (sig_bt[i]) {
469 case T_BOOLEAN:
470 case T_CHAR:
471 case T_BYTE:
472 case T_SHORT:
473 case T_INT:
474 if (int_args < Argument::n_int_register_parameters_j) {
475 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
476 } else {
477 regs[i].set1(VMRegImpl::stack2reg(stk_args));
478 stk_args += 2;
479 }
480 break;
481 case T_VOID:
482 // halves of T_LONG or T_DOUBLE
483 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
484 regs[i].set_bad();
485 break;
486 case T_LONG:
487 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
488 // fall through
489 case T_OBJECT:
490 case T_ARRAY:
491 case T_ADDRESS:
492 case T_VALUETYPEPTR:
493 if (int_args < Argument::n_int_register_parameters_j) {
494 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
495 } else {
496 regs[i].set2(VMRegImpl::stack2reg(stk_args));
497 stk_args += 2;
498 }
499 break;
500 case T_FLOAT:
501 if (fp_args < Argument::n_float_register_parameters_j) {
502 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
503 } else {
504 regs[i].set1(VMRegImpl::stack2reg(stk_args));
505 stk_args += 2;
506 }
507 break;
508 case T_DOUBLE:
509 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
510 if (fp_args < Argument::n_float_register_parameters_j) {
511 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
512 } else {
513 regs[i].set2(VMRegImpl::stack2reg(stk_args));
514 stk_args += 2;
515 }
516 break;
517 default:
518 ShouldNotReachHere();
519 break;
520 }
521 }
522
523 return align_up(stk_args, 2);
524 }
525
526 // Same as java_calling_convention() but for multiple return
527 // values. There's no way to store them on the stack so if we don't
528 // have enough registers, multiple values can't be returned.
529 const uint SharedRuntime::java_return_convention_max_int = Argument::n_int_register_parameters_j+1;
530 const uint SharedRuntime::java_return_convention_max_float = Argument::n_float_register_parameters_j;
531 int SharedRuntime::java_return_convention(const BasicType *sig_bt,
532 VMRegPair *regs,
533 int total_args_passed) {
534 // Create the mapping between argument positions and
535 // registers.
536 static const Register INT_ArgReg[java_return_convention_max_int] = {
537 rax, j_rarg5, j_rarg4, j_rarg3, j_rarg2, j_rarg1, j_rarg0
538 };
539 static const XMMRegister FP_ArgReg[java_return_convention_max_float] = {
540 j_farg0, j_farg1, j_farg2, j_farg3,
541 j_farg4, j_farg5, j_farg6, j_farg7
542 };
543
544
545 uint int_args = 0;
546 uint fp_args = 0;
547
548 for (int i = 0; i < total_args_passed; i++) {
549 switch (sig_bt[i]) {
550 case T_BOOLEAN:
551 case T_CHAR:
552 case T_BYTE:
553 case T_SHORT:
554 case T_INT:
555 if (int_args < Argument::n_int_register_parameters_j+1) {
556 regs[i].set1(INT_ArgReg[int_args]->as_VMReg());
557 int_args++;
558 } else {
559 return -1;
560 }
561 break;
562 case T_VOID:
563 // halves of T_LONG or T_DOUBLE
564 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
565 regs[i].set_bad();
566 break;
567 case T_LONG:
568 assert(sig_bt[i + 1] == T_VOID, "expecting half");
569 // fall through
570 case T_OBJECT:
571 case T_ARRAY:
572 case T_ADDRESS:
573 case T_METADATA:
574 case T_VALUETYPEPTR:
575 if (int_args < Argument::n_int_register_parameters_j+1) {
576 regs[i].set2(INT_ArgReg[int_args]->as_VMReg());
577 int_args++;
578 } else {
579 return -1;
580 }
581 break;
582 case T_FLOAT:
583 if (fp_args < Argument::n_float_register_parameters_j) {
584 regs[i].set1(FP_ArgReg[fp_args]->as_VMReg());
585 fp_args++;
586 } else {
587 return -1;
588 }
589 break;
590 case T_DOUBLE:
591 assert(sig_bt[i + 1] == T_VOID, "expecting half");
592 if (fp_args < Argument::n_float_register_parameters_j) {
593 regs[i].set2(FP_ArgReg[fp_args]->as_VMReg());
594 fp_args++;
595 } else {
596 return -1;
597 }
598 break;
599 default:
600 ShouldNotReachHere();
601 break;
602 }
603 }
604
605 return int_args + fp_args;
606 }
607
608 // Patch the callers callsite with entry to compiled code if it exists.
609 static void patch_callers_callsite(MacroAssembler *masm) {
610 Label L;
611 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
612 __ jcc(Assembler::equal, L);
613
614 // Save the current stack pointer
615 __ mov(r13, rsp);
616 // Schedule the branch target address early.
617 // Call into the VM to patch the caller, then jump to compiled callee
618 // rax isn't live so capture return address while we easily can
619 __ movptr(rax, Address(rsp, 0));
620
621 // align stack so push_CPU_state doesn't fault
622 __ andptr(rsp, -(StackAlignmentInBytes));
623 __ push_CPU_state();
624 __ vzeroupper();
625 // VM needs caller's callsite
626 // VM needs target method
627 // This needs to be a long call since we will relocate this adapter to
628 // the codeBuffer and it may not reach
629
630 // Allocate argument register save area
631 if (frame::arg_reg_save_area_bytes != 0) {
632 __ subptr(rsp, frame::arg_reg_save_area_bytes);
633 }
634 __ mov(c_rarg0, rbx);
635 __ mov(c_rarg1, rax);
636 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
637
638 // De-allocate argument register save area
639 if (frame::arg_reg_save_area_bytes != 0) {
640 __ addptr(rsp, frame::arg_reg_save_area_bytes);
641 }
642
643 __ vzeroupper();
644 __ pop_CPU_state();
645 // restore sp
646 __ mov(rsp, r13);
647 __ bind(L);
648 }
649
650 // For each value type argument, sig includes the list of fields of
651 // the value type. This utility function computes the number of
652 // arguments for the call if value types are passed by reference (the
653 // calling convention the interpreter expects).
654 static int compute_total_args_passed_int(const GrowableArray<SigEntry>& sig_extended) {
655 int total_args_passed = 0;
656 if (ValueTypePassFieldsAsArgs) {
657 for (int i = 0; i < sig_extended.length(); i++) {
658 BasicType bt = sig_extended.at(i)._bt;
659 if (bt == T_VALUETYPE) {
660 // In sig_extended, a value type argument starts with:
661 // T_VALUETYPE, followed by the types of the fields of the
662 // value type and T_VOID to mark the end of the value
663 // type. Value types are flattened so, for instance, in the
664 // case of a value type with an int field and a value type
665 // field that itself has 2 fields, an int and a long:
666 // T_VALUETYPE T_INT T_VALUETYPE T_INT T_LONG T_VOID (second
667 // slot for the T_LONG) T_VOID (inner T_VALUETYPE) T_VOID
668 // (outer T_VALUETYPE)
669 total_args_passed++;
670 int vt = 1;
671 do {
672 i++;
673 BasicType bt = sig_extended.at(i)._bt;
674 BasicType prev_bt = sig_extended.at(i-1)._bt;
675 if (bt == T_VALUETYPE) {
676 vt++;
677 } else if (bt == T_VOID &&
678 prev_bt != T_LONG &&
679 prev_bt != T_DOUBLE) {
680 vt--;
681 }
682 } while (vt != 0);
683 } else {
684 total_args_passed++;
685 }
686 }
687 } else {
688 total_args_passed = sig_extended.length();
689 }
690 return total_args_passed;
691 }
692
693
694 static void gen_c2i_adapter_helper(MacroAssembler* masm,
695 BasicType bt,
696 BasicType prev_bt,
697 size_t size_in_bytes,
698 const VMRegPair& reg_pair,
699 const Address& to,
700 int extraspace,
701 bool is_oop) {
702 assert(bt != T_VALUETYPE || !ValueTypePassFieldsAsArgs, "no value type here");
703 if (bt == T_VOID) {
704 assert(prev_bt == T_LONG || prev_bt == T_DOUBLE, "missing half");
705 return;
706 }
707
708 // Say 4 args:
709 // i st_off
710 // 0 32 T_LONG
711 // 1 24 T_VOID
712 // 2 16 T_OBJECT
713 // 3 8 T_BOOL
714 // - 0 return address
715 //
716 // However to make thing extra confusing. Because we can fit a long/double in
717 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
718 // leaves one slot empty and only stores to a single slot. In this case the
719 // slot that is occupied is the T_VOID slot. See I said it was confusing.
720
721 bool wide = (size_in_bytes == wordSize);
722 VMReg r_1 = reg_pair.first();
723 VMReg r_2 = reg_pair.second();
724 assert(r_2->is_valid() == wide, "invalid size");
725 if (!r_1->is_valid()) {
726 assert(!r_2->is_valid(), "must be invalid");
727 return;
728 }
729
730 if (!r_1->is_XMMRegister()) {
731 Register val = rax;
732 assert_different_registers(to.base(), val);
733 if(r_1->is_stack()) {
734 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
735 __ load_sized_value(val, Address(rsp, ld_off), size_in_bytes, /* is_signed */ false);
736 } else {
737 val = r_1->as_Register();
738 }
739 if (is_oop) {
740 __ store_heap_oop(to, val);
741 } else {
742 __ store_sized_value(to, val, size_in_bytes);
743 }
744 } else {
745 if (wide) {
746 __ movdbl(to, r_1->as_XMMRegister());
747 } else {
748 __ movflt(to, r_1->as_XMMRegister());
749 }
750 }
751 }
752
753 static void gen_c2i_adapter(MacroAssembler *masm,
754 const GrowableArray<SigEntry>& sig_extended,
755 const VMRegPair *regs,
756 Label& skip_fixup,
757 address start,
758 OopMapSet*& oop_maps,
759 int& frame_complete,
760 int& frame_size_in_words) {
761 // Before we get into the guts of the C2I adapter, see if we should be here
762 // at all. We've come from compiled code and are attempting to jump to the
763 // interpreter, which means the caller made a static call to get here
764 // (vcalls always get a compiled target if there is one). Check for a
765 // compiled target. If there is one, we need to patch the caller's call.
766 patch_callers_callsite(masm);
767
768 __ bind(skip_fixup);
769
770 bool has_value_argument = false;
771 if (ValueTypePassFieldsAsArgs) {
772 // Is there a value type argument?
773 for (int i = 0; i < sig_extended.length() && !has_value_argument; i++) {
774 has_value_argument = (sig_extended.at(i)._bt == T_VALUETYPE);
775 }
776 if (has_value_argument) {
777 // There is at least a value type argument: we're coming from
778 // compiled code so we have no buffers to back the value
779 // types. Allocate the buffers here with a runtime call.
780 oop_maps = new OopMapSet();
781 OopMap* map = NULL;
782
783 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
784
785 frame_complete = __ offset();
786
787 __ set_last_Java_frame(noreg, noreg, NULL);
788
789 __ mov(c_rarg0, r15_thread);
790 __ mov(c_rarg1, rbx);
791
792 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::allocate_value_types)));
793
794 oop_maps->add_gc_map((int)(__ pc() - start), map);
795 __ reset_last_Java_frame(false);
796
797 RegisterSaver::restore_live_registers(masm);
798
799 Label no_exception;
800 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
801 __ jcc(Assembler::equal, no_exception);
802
803 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
804 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
805 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
806
807 __ bind(no_exception);
808
809 // We get an array of objects from the runtime call
810 __ get_vm_result(r13, r15_thread); // Use r13 as temporary because r10 is trashed by movptr()
811 __ get_vm_result_2(rbx, r15_thread); // TODO: required to keep the callee Method live?
812 __ mov(r10, r13);
813 }
814 }
815
816 // Since all args are passed on the stack, total_args_passed *
817 // Interpreter::stackElementSize is the space we need. Plus 1 because
818 // we also account for the return address location since
819 // we store it first rather than hold it in rax across all the shuffling
820 int total_args_passed = compute_total_args_passed_int(sig_extended);
821 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize;
822
823 // stack is aligned, keep it that way
824 extraspace = align_up(extraspace, 2*wordSize);
825
826 // Get return address
827 __ pop(rax);
828
829 // set senderSP value
830 __ mov(r13, rsp);
831
832 __ subptr(rsp, extraspace);
833
834 // Store the return address in the expected location
835 __ movptr(Address(rsp, 0), rax);
836
837 // Now write the args into the outgoing interpreter space
838
839 // next_arg_comp is the next argument from the compiler point of
840 // view (value type fields are passed in registers/on the stack). In
841 // sig_extended, a value type argument starts with: T_VALUETYPE,
842 // followed by the types of the fields of the value type and T_VOID
843 // to mark the end of the value type. ignored counts the number of
844 // T_VALUETYPE/T_VOID. next_vt_arg is the next value type argument:
845 // used to get the buffer for that argument from the pool of buffers
846 // we allocated above and want to pass to the
847 // interpreter. next_arg_int is the next argument from the
848 // interpreter point of view (value types are passed by reference).
849 bool has_oop_field = false;
850 for (int next_arg_comp = 0, ignored = 0, next_vt_arg = 0, next_arg_int = 0;
851 next_arg_comp < sig_extended.length(); next_arg_comp++) {
852 assert(ignored <= next_arg_comp, "shouldn't skip over more slot than there are arguments");
853 assert(next_arg_int < total_args_passed, "more arguments for the interpreter than expected?");
854 BasicType bt = sig_extended.at(next_arg_comp)._bt;
855 int st_off = (total_args_passed - next_arg_int) * Interpreter::stackElementSize;
856 if (!ValueTypePassFieldsAsArgs || bt != T_VALUETYPE) {
857 int next_off = st_off - Interpreter::stackElementSize;
858 const int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : st_off;
859 const VMRegPair reg_pair = regs[next_arg_comp-ignored];
860 size_t size_in_bytes = reg_pair.second()->is_valid() ? 8 : 4;
861 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended.at(next_arg_comp-1)._bt : T_ILLEGAL,
862 size_in_bytes, reg_pair, Address(rsp, offset), extraspace, false);
863 next_arg_int++;
864 #ifdef ASSERT
865 if (bt == T_LONG || bt == T_DOUBLE) {
866 // Overwrite the unused slot with known junk
867 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
868 __ movptr(Address(rsp, st_off), rax);
869 }
870 #endif /* ASSERT */
871 } else {
872 ignored++;
873 // get the buffer from the just allocated pool of buffers
874 int index = arrayOopDesc::base_offset_in_bytes(T_OBJECT) + next_vt_arg * type2aelembytes(T_VALUETYPE);
875 __ load_heap_oop(r11, Address(r10, index));
876 next_vt_arg++; next_arg_int++;
877 int vt = 1;
878 // write fields we get from compiled code in registers/stack
879 // slots to the buffer: we know we are done with that value type
880 // argument when we hit the T_VOID that acts as an end of value
881 // type delimiter for this value type. Value types are flattened
882 // so we might encounter embedded value types. Each entry in
883 // sig_extended contains a field offset in the buffer.
884 do {
885 next_arg_comp++;
886 BasicType bt = sig_extended.at(next_arg_comp)._bt;
887 BasicType prev_bt = sig_extended.at(next_arg_comp-1)._bt;
888 if (bt == T_VALUETYPE) {
889 vt++;
890 ignored++;
891 } else if (bt == T_VOID &&
892 prev_bt != T_LONG &&
893 prev_bt != T_DOUBLE) {
894 vt--;
895 ignored++;
896 } else {
897 int off = sig_extended.at(next_arg_comp)._offset;
898 assert(off > 0, "offset in object should be positive");
899 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
900 bool is_oop = (bt == T_OBJECT || bt == T_VALUETYPEPTR || bt == T_ARRAY);
901 has_oop_field = has_oop_field || is_oop;
902 gen_c2i_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended.at(next_arg_comp-1)._bt : T_ILLEGAL,
903 size_in_bytes, regs[next_arg_comp-ignored], Address(r11, off), extraspace, is_oop);
904 }
905 } while (vt != 0);
906 // pass the buffer to the interpreter
907 __ movptr(Address(rsp, st_off), r11);
908 }
909 }
910
911 // If a value type was allocated and initialized, apply post barrier to all oop fields
912 if (has_value_argument && has_oop_field) {
913 __ push(r13); // save senderSP
914 __ push(rbx); // save callee
915 // Allocate argument register save area
916 if (frame::arg_reg_save_area_bytes != 0) {
917 __ subptr(rsp, frame::arg_reg_save_area_bytes);
918 }
919 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::apply_post_barriers), r15_thread, r10);
920 // De-allocate argument register save area
921 if (frame::arg_reg_save_area_bytes != 0) {
922 __ addptr(rsp, frame::arg_reg_save_area_bytes);
923 }
924 __ pop(rbx); // restore callee
925 __ pop(r13); // restore sender SP
926 }
927
928 // Schedule the branch target address early.
929 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
930 __ jmp(rcx);
931 }
932
933 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
934 address code_start, address code_end,
935 Label& L_ok) {
936 Label L_fail;
937 __ lea(temp_reg, ExternalAddress(code_start));
938 __ cmpptr(pc_reg, temp_reg);
939 __ jcc(Assembler::belowEqual, L_fail);
940 __ lea(temp_reg, ExternalAddress(code_end));
941 __ cmpptr(pc_reg, temp_reg);
942 __ jcc(Assembler::below, L_ok);
943 __ bind(L_fail);
944 }
945
946 static void gen_i2c_adapter_helper(MacroAssembler* masm,
947 BasicType bt,
948 BasicType prev_bt,
949 size_t size_in_bytes,
950 const VMRegPair& reg_pair,
951 const Address& from,
952 bool is_oop) {
953 assert(bt != T_VALUETYPE || !ValueTypePassFieldsAsArgs, "no value type here");
954 if (bt == T_VOID) {
955 // Longs and doubles are passed in native word order, but misaligned
956 // in the 32-bit build.
957 assert(prev_bt == T_LONG || prev_bt == T_DOUBLE, "missing half");
958 return;
959 }
960 assert(!reg_pair.second()->is_valid() || reg_pair.first()->next() == reg_pair.second(),
961 "scrambled load targets?");
962
963 bool wide = (size_in_bytes == wordSize);
964 VMReg r_1 = reg_pair.first();
965 VMReg r_2 = reg_pair.second();
966 assert(r_2->is_valid() == wide, "invalid size");
967 if (!r_1->is_valid()) {
968 assert(!r_2->is_valid(), "must be invalid");
969 return;
970 }
971
972 bool is_signed = (bt != T_CHAR) && (bt != T_BOOLEAN);
973 if (!r_1->is_XMMRegister()) {
974 // We can use r13 as a temp here because compiled code doesn't need r13 as an input
975 // and if we end up going thru a c2i because of a miss a reasonable value of r13
976 // will be generated.
977 Register dst = r_1->is_stack() ? r13 : r_1->as_Register();
978 if (is_oop) {
979 __ load_heap_oop(dst, from);
980 } else {
981 __ load_sized_value(dst, from, size_in_bytes, is_signed);
982 }
983 if (r_1->is_stack()) {
984 // Convert stack slot to an SP offset (+ wordSize to account for return address)
985 int st_off = reg_pair.first()->reg2stack() * VMRegImpl::stack_slot_size + wordSize;
986 __ movq(Address(rsp, st_off), dst);
987 }
988 } else {
989 if (wide) {
990 __ movdbl(r_1->as_XMMRegister(), from);
991 } else {
992 __ movflt(r_1->as_XMMRegister(), from);
993 }
994 }
995 }
996
997 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
998 int comp_args_on_stack,
999 const GrowableArray<SigEntry>& sig_extended,
1000 const VMRegPair *regs) {
1001
1002 // Note: r13 contains the senderSP on entry. We must preserve it since
1003 // we may do a i2c -> c2i transition if we lose a race where compiled
1004 // code goes non-entrant while we get args ready.
1005 // In addition we use r13 to locate all the interpreter args as
1006 // we must align the stack to 16 bytes on an i2c entry else we
1007 // lose alignment we expect in all compiled code and register
1008 // save code can segv when fxsave instructions find improperly
1009 // aligned stack pointer.
1010
1011 // Adapters can be frameless because they do not require the caller
1012 // to perform additional cleanup work, such as correcting the stack pointer.
1013 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
1014 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
1015 // even if a callee has modified the stack pointer.
1016 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
1017 // routinely repairs its caller's stack pointer (from sender_sp, which is set
1018 // up via the senderSP register).
1019 // In other words, if *either* the caller or callee is interpreted, we can
1020 // get the stack pointer repaired after a call.
1021 // This is why c2i and i2c adapters cannot be indefinitely composed.
1022 // In particular, if a c2i adapter were to somehow call an i2c adapter,
1023 // both caller and callee would be compiled methods, and neither would
1024 // clean up the stack pointer changes performed by the two adapters.
1025 // If this happens, control eventually transfers back to the compiled
1026 // caller, but with an uncorrected stack, causing delayed havoc.
1027
1028 Label value_arg_is_null;
1029 bool has_null_check = false;
1030 if (EnableValhalla) {
1031 for (int i = 0; i < sig_extended.length(); i++) {
1032 BasicType bt = sig_extended.at(i)._bt;
1033 if (bt == T_VALUETYPEPTR) {
1034 // Add null check for value type argument
1035 int ld_off = (sig_extended.length() - i) * Interpreter::stackElementSize;
1036 __ cmpptr(Address(rsp, ld_off), 0);
1037 __ jcc(Assembler::equal, value_arg_is_null);
1038 has_null_check = true;
1039 }
1040 }
1041 }
1042
1043 // Pick up the return address
1044 __ movptr(rax, Address(rsp, 0));
1045
1046 if (VerifyAdapterCalls &&
1047 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
1048 // So, let's test for cascading c2i/i2c adapters right now.
1049 // assert(Interpreter::contains($return_addr) ||
1050 // StubRoutines::contains($return_addr),
1051 // "i2c adapter must return to an interpreter frame");
1052 __ block_comment("verify_i2c { ");
1053 Label L_ok;
1054 if (Interpreter::code() != NULL)
1055 range_check(masm, rax, r11,
1056 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
1057 L_ok);
1058 if (StubRoutines::code1() != NULL)
1059 range_check(masm, rax, r11,
1060 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
1061 L_ok);
1062 if (StubRoutines::code2() != NULL)
1063 range_check(masm, rax, r11,
1064 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
1065 L_ok);
1066 const char* msg = "i2c adapter must return to an interpreter frame";
1067 __ block_comment(msg);
1068 __ stop(msg);
1069 __ bind(L_ok);
1070 __ block_comment("} verify_i2ce ");
1071 }
1072
1073 // Must preserve original SP for loading incoming arguments because
1074 // we need to align the outgoing SP for compiled code.
1075 __ movptr(r11, rsp);
1076
1077 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
1078 // in registers, we will occasionally have no stack args.
1079 int comp_words_on_stack = 0;
1080 if (comp_args_on_stack) {
1081 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
1082 // registers are below. By subtracting stack0, we either get a negative
1083 // number (all values in registers) or the maximum stack slot accessed.
1084
1085 // Convert 4-byte c2 stack slots to words.
1086 comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
1087 // Round up to miminum stack alignment, in wordSize
1088 comp_words_on_stack = align_up(comp_words_on_stack, 2);
1089 __ subptr(rsp, comp_words_on_stack * wordSize);
1090 }
1091
1092
1093 // Ensure compiled code always sees stack at proper alignment
1094 __ andptr(rsp, -16);
1095
1096 // push the return address and misalign the stack that youngest frame always sees
1097 // as far as the placement of the call instruction
1098 __ push(rax);
1099
1100 // Put saved SP in another register
1101 const Register saved_sp = rax;
1102 __ movptr(saved_sp, r11);
1103
1104 // Will jump to the compiled code just as if compiled code was doing it.
1105 // Pre-load the register-jump target early, to schedule it better.
1106 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset())));
1107
1108 #if INCLUDE_JVMCI
1109 if (EnableJVMCI || UseAOT) {
1110 // check if this call should be routed towards a specific entry point
1111 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
1112 Label no_alternative_target;
1113 __ jcc(Assembler::equal, no_alternative_target);
1114 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
1115 __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
1116 __ bind(no_alternative_target);
1117 }
1118 #endif // INCLUDE_JVMCI
1119
1120 int total_args_passed = compute_total_args_passed_int(sig_extended);
1121 // Now generate the shuffle code. Pick up all register args and move the
1122 // rest through the floating point stack top.
1123
1124 // next_arg_comp is the next argument from the compiler point of
1125 // view (value type fields are passed in registers/on the stack). In
1126 // sig_extended, a value type argument starts with: T_VALUETYPE,
1127 // followed by the types of the fields of the value type and T_VOID
1128 // to mark the end of the value type. ignored counts the number of
1129 // T_VALUETYPE/T_VOID. next_arg_int is the next argument from the
1130 // interpreter point of view (value types are passed by reference).
1131 for (int next_arg_comp = 0, ignored = 0, next_arg_int = 0; next_arg_comp < sig_extended.length(); next_arg_comp++) {
1132 assert(ignored <= next_arg_comp, "shouldn't skip over more slot than there are arguments");
1133 assert(next_arg_int < total_args_passed, "more arguments from the interpreter than expected?");
1134 BasicType bt = sig_extended.at(next_arg_comp)._bt;
1135 int ld_off = (total_args_passed - next_arg_int)*Interpreter::stackElementSize;
1136 if (!ValueTypePassFieldsAsArgs || bt != T_VALUETYPE) {
1137 // Load in argument order going down.
1138 // Point to interpreter value (vs. tag)
1139 int next_off = ld_off - Interpreter::stackElementSize;
1140 int offset = (bt == T_LONG || bt == T_DOUBLE) ? next_off : ld_off;
1141 const VMRegPair reg_pair = regs[next_arg_comp-ignored];
1142 size_t size_in_bytes = reg_pair.second()->is_valid() ? 8 : 4;
1143 gen_i2c_adapter_helper(masm, bt, next_arg_comp > 0 ? sig_extended.at(next_arg_comp-1)._bt : T_ILLEGAL,
1144 size_in_bytes, reg_pair, Address(saved_sp, offset), false);
1145 next_arg_int++;
1146 } else {
1147 next_arg_int++;
1148 ignored++;
1149 // get the buffer for that value type
1150 __ movptr(r10, Address(saved_sp, ld_off));
1151 int vt = 1;
1152 // load fields to registers/stack slots from the buffer: we know
1153 // we are done with that value type argument when we hit the
1154 // T_VOID that acts as an end of value type delimiter for this
1155 // value type. Value types are flattened so we might encounter
1156 // embedded value types. Each entry in sig_extended contains a
1157 // field offset in the buffer.
1158 do {
1159 next_arg_comp++;
1160 BasicType bt = sig_extended.at(next_arg_comp)._bt;
1161 BasicType prev_bt = sig_extended.at(next_arg_comp-1)._bt;
1162 if (bt == T_VALUETYPE) {
1163 vt++;
1164 ignored++;
1165 } else if (bt == T_VOID &&
1166 prev_bt != T_LONG &&
1167 prev_bt != T_DOUBLE) {
1168 vt--;
1169 ignored++;
1170 } else {
1171 int off = sig_extended.at(next_arg_comp)._offset;
1172 assert(off > 0, "offset in object should be positive");
1173 size_t size_in_bytes = is_java_primitive(bt) ? type2aelembytes(bt) : wordSize;
1174 bool is_oop = (bt == T_OBJECT || bt == T_VALUETYPEPTR || bt == T_ARRAY);
1175 gen_i2c_adapter_helper(masm, bt, prev_bt, size_in_bytes, regs[next_arg_comp - ignored], Address(r10, off), is_oop);
1176 }
1177 } while (vt != 0);
1178 }
1179 }
1180
1181 // 6243940 We might end up in handle_wrong_method if
1182 // the callee is deoptimized as we race thru here. If that
1183 // happens we don't want to take a safepoint because the
1184 // caller frame will look interpreted and arguments are now
1185 // "compiled" so it is much better to make this transition
1186 // invisible to the stack walking code. Unfortunately if
1187 // we try and find the callee by normal means a safepoint
1188 // is possible. So we stash the desired callee in the thread
1189 // and the vm will find there should this case occur.
1190
1191 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
1192
1193 // put Method* where a c2i would expect should we end up there
1194 // only needed because of c2 resolve stubs return Method* as a result in
1195 // rax
1196 __ mov(rax, rbx);
1197 __ jmp(r11);
1198
1199 if (has_null_check) {
1200 __ bind(value_arg_is_null);
1201 // TODO For now, we just call the interpreter if a value type argument is NULL
1202 __ movptr(r11, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
1203 __ jmp(r11);
1204 }
1205 }
1206
1207 // ---------------------------------------------------------------
1208 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
1209 int comp_args_on_stack,
1210 const GrowableArray<SigEntry>& sig_extended,
1211 const VMRegPair *regs,
1212 AdapterFingerPrint* fingerprint,
1213 AdapterBlob*& new_adapter) {
1214 address i2c_entry = __ pc();
1215
1216 gen_i2c_adapter(masm, comp_args_on_stack, sig_extended, regs);
1217
1218 // -------------------------------------------------------------------------
1219 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls
1220 // to the interpreter. The args start out packed in the compiled layout. They
1221 // need to be unpacked into the interpreter layout. This will almost always
1222 // require some stack space. We grow the current (compiled) stack, then repack
1223 // the args. We finally end in a jump to the generic interpreter entry point.
1224 // On exit from the interpreter, the interpreter will restore our SP (lest the
1225 // compiled code, which relys solely on SP and not RBP, get sick).
1226
1227 address c2i_unverified_entry = __ pc();
1228 Label skip_fixup;
1229 Label ok;
1230
1231 Register holder = rax;
1232 Register receiver = j_rarg0;
1233 Register temp = rbx;
1234
1235 {
1236 __ load_klass(temp, receiver);
1237 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
1238 __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset()));
1239 __ jcc(Assembler::equal, ok);
1240 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1241
1242 __ bind(ok);
1243 // Method might have been compiled since the call site was patched to
1244 // interpreted if that is the case treat it as a miss so we can get
1245 // the call site corrected.
1246 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
1247 __ jcc(Assembler::equal, skip_fixup);
1248 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1249 }
1250
1251 address c2i_entry = __ pc();
1252
1253 OopMapSet* oop_maps = NULL;
1254 int frame_complete = CodeOffsets::frame_never_safe;
1255 int frame_size_in_words = 0;
1256 gen_c2i_adapter(masm, sig_extended, regs, skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words);
1257
1258 __ flush();
1259 new_adapter = AdapterBlob::create(masm->code(), frame_complete, frame_size_in_words, oop_maps);
1260
1261 // If value types are passed as fields, save the extended signature as symbol in
1262 // the AdapterHandlerEntry to be used by nmethod::preserve_callee_argument_oops().
1263 Symbol* extended_signature = NULL;
1264 if (ValueTypePassFieldsAsArgs) {
1265 bool has_value_argument = false;
1266 Thread* THREAD = Thread::current();
1267 ResourceMark rm(THREAD);
1268 int length = sig_extended.length();
1269 char* sig_str = NEW_RESOURCE_ARRAY(char, 2*length + 3);
1270 int idx = 0;
1271 sig_str[idx++] = '(';
1272 for (int index = 0; index < length; index++) {
1273 BasicType bt = sig_extended.at(index)._bt;
1274 if (bt == T_VALUETYPE) {
1275 has_value_argument = true;
1276 } else if (bt == T_VALUETYPEPTR) {
1277 // non-flattened value type field
1278 sig_str[idx++] = type2char(T_VALUETYPE);
1279 sig_str[idx++] = ';';
1280 } else if (bt == T_VOID) {
1281 // Ignore
1282 } else {
1283 if (bt == T_ARRAY) {
1284 bt = T_OBJECT; // We don't know the element type, treat as Object
1285 }
1286 sig_str[idx++] = type2char(bt);
1287 if (bt == T_OBJECT) {
1288 sig_str[idx++] = ';';
1289 }
1290 }
1291 }
1292 sig_str[idx++] = ')';
1293 sig_str[idx++] = '\0';
1294 if (has_value_argument) {
1295 // Extended signature is only required if a value type argument is passed
1296 extended_signature = SymbolTable::new_permanent_symbol(sig_str, THREAD);
1297 }
1298 }
1299
1300 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, extended_signature);
1301 }
1302
1303 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
1304 VMRegPair *regs,
1305 VMRegPair *regs2,
1306 int total_args_passed) {
1307 assert(regs2 == NULL, "not needed on x86");
1308 // We return the amount of VMRegImpl stack slots we need to reserve for all
1309 // the arguments NOT counting out_preserve_stack_slots.
1310
1311 // NOTE: These arrays will have to change when c1 is ported
1312 #ifdef _WIN64
1313 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
1314 c_rarg0, c_rarg1, c_rarg2, c_rarg3
1315 };
1316 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
1317 c_farg0, c_farg1, c_farg2, c_farg3
1318 };
1319 #else
1320 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
1321 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
1322 };
1323 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
1324 c_farg0, c_farg1, c_farg2, c_farg3,
1325 c_farg4, c_farg5, c_farg6, c_farg7
1326 };
1327 #endif // _WIN64
1328
1329
1330 uint int_args = 0;
1331 uint fp_args = 0;
1332 uint stk_args = 0; // inc by 2 each time
1333
1334 for (int i = 0; i < total_args_passed; i++) {
1335 switch (sig_bt[i]) {
1336 case T_BOOLEAN:
1337 case T_CHAR:
1338 case T_BYTE:
1339 case T_SHORT:
1340 case T_INT:
1341 if (int_args < Argument::n_int_register_parameters_c) {
1342 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
1343 #ifdef _WIN64
1344 fp_args++;
1345 // Allocate slots for callee to stuff register args the stack.
1346 stk_args += 2;
1347 #endif
1348 } else {
1349 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1350 stk_args += 2;
1351 }
1352 break;
1353 case T_LONG:
1354 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1355 // fall through
1356 case T_OBJECT:
1357 case T_ARRAY:
1358 case T_ADDRESS:
1359 case T_METADATA:
1360 if (int_args < Argument::n_int_register_parameters_c) {
1361 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
1362 #ifdef _WIN64
1363 fp_args++;
1364 stk_args += 2;
1365 #endif
1366 } else {
1367 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1368 stk_args += 2;
1369 }
1370 break;
1371 case T_FLOAT:
1372 if (fp_args < Argument::n_float_register_parameters_c) {
1373 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
1374 #ifdef _WIN64
1375 int_args++;
1376 // Allocate slots for callee to stuff register args the stack.
1377 stk_args += 2;
1378 #endif
1379 } else {
1380 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1381 stk_args += 2;
1382 }
1383 break;
1384 case T_DOUBLE:
1385 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1386 if (fp_args < Argument::n_float_register_parameters_c) {
1387 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
1388 #ifdef _WIN64
1389 int_args++;
1390 // Allocate slots for callee to stuff register args the stack.
1391 stk_args += 2;
1392 #endif
1393 } else {
1394 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1395 stk_args += 2;
1396 }
1397 break;
1398 case T_VOID: // Halves of longs and doubles
1399 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
1400 regs[i].set_bad();
1401 break;
1402 default:
1403 ShouldNotReachHere();
1404 break;
1405 }
1406 }
1407 #ifdef _WIN64
1408 // windows abi requires that we always allocate enough stack space
1409 // for 4 64bit registers to be stored down.
1410 if (stk_args < 8) {
1411 stk_args = 8;
1412 }
1413 #endif // _WIN64
1414
1415 return stk_args;
1416 }
1417
1418 // On 64 bit we will store integer like items to the stack as
1419 // 64 bits items (sparc abi) even though java would only store
1420 // 32bits for a parameter. On 32bit it will simply be 32 bits
1421 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
1422 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1423 if (src.first()->is_stack()) {
1424 if (dst.first()->is_stack()) {
1425 // stack to stack
1426 __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
1427 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1428 } else {
1429 // stack to reg
1430 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1431 }
1432 } else if (dst.first()->is_stack()) {
1433 // reg to stack
1434 // Do we really have to sign extend???
1435 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
1436 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1437 } else {
1438 // Do we really have to sign extend???
1439 // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
1440 if (dst.first() != src.first()) {
1441 __ movq(dst.first()->as_Register(), src.first()->as_Register());
1442 }
1443 }
1444 }
1445
1446 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1447 if (src.first()->is_stack()) {
1448 if (dst.first()->is_stack()) {
1449 // stack to stack
1450 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1451 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1452 } else {
1453 // stack to reg
1454 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1455 }
1456 } else if (dst.first()->is_stack()) {
1457 // reg to stack
1458 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1459 } else {
1460 if (dst.first() != src.first()) {
1461 __ movq(dst.first()->as_Register(), src.first()->as_Register());
1462 }
1463 }
1464 }
1465
1466 // An oop arg. Must pass a handle not the oop itself
1467 static void object_move(MacroAssembler* masm,
1468 OopMap* map,
1469 int oop_handle_offset,
1470 int framesize_in_slots,
1471 VMRegPair src,
1472 VMRegPair dst,
1473 bool is_receiver,
1474 int* receiver_offset) {
1475
1476 // must pass a handle. First figure out the location we use as a handle
1477
1478 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
1479
1480 // See if oop is NULL if it is we need no handle
1481
1482 if (src.first()->is_stack()) {
1483
1484 // Oop is already on the stack as an argument
1485 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1486 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1487 if (is_receiver) {
1488 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1489 }
1490
1491 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1492 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1493 // conditionally move a NULL
1494 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
1495 } else {
1496
1497 // Oop is in an a register we must store it to the space we reserve
1498 // on the stack for oop_handles and pass a handle if oop is non-NULL
1499
1500 const Register rOop = src.first()->as_Register();
1501 int oop_slot;
1502 if (rOop == j_rarg0)
1503 oop_slot = 0;
1504 else if (rOop == j_rarg1)
1505 oop_slot = 1;
1506 else if (rOop == j_rarg2)
1507 oop_slot = 2;
1508 else if (rOop == j_rarg3)
1509 oop_slot = 3;
1510 else if (rOop == j_rarg4)
1511 oop_slot = 4;
1512 else {
1513 assert(rOop == j_rarg5, "wrong register");
1514 oop_slot = 5;
1515 }
1516
1517 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
1518 int offset = oop_slot*VMRegImpl::stack_slot_size;
1519
1520 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1521 // Store oop in handle area, may be NULL
1522 __ movptr(Address(rsp, offset), rOop);
1523 if (is_receiver) {
1524 *receiver_offset = offset;
1525 }
1526
1527 __ cmpptr(rOop, (int32_t)NULL_WORD);
1528 __ lea(rHandle, Address(rsp, offset));
1529 // conditionally move a NULL from the handle area where it was just stored
1530 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
1531 }
1532
1533 // If arg is on the stack then place it otherwise it is already in correct reg.
1534 if (dst.first()->is_stack()) {
1535 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1536 }
1537 }
1538
1539 // A float arg may have to do float reg int reg conversion
1540 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1541 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1542
1543 // The calling conventions assures us that each VMregpair is either
1544 // all really one physical register or adjacent stack slots.
1545 // This greatly simplifies the cases here compared to sparc.
1546
1547 if (src.first()->is_stack()) {
1548 if (dst.first()->is_stack()) {
1549 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1550 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1551 } else {
1552 // stack to reg
1553 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1554 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
1555 }
1556 } else if (dst.first()->is_stack()) {
1557 // reg to stack
1558 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1559 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1560 } else {
1561 // reg to reg
1562 // In theory these overlap but the ordering is such that this is likely a nop
1563 if ( src.first() != dst.first()) {
1564 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1565 }
1566 }
1567 }
1568
1569 // A long move
1570 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1571
1572 // The calling conventions assures us that each VMregpair is either
1573 // all really one physical register or adjacent stack slots.
1574 // This greatly simplifies the cases here compared to sparc.
1575
1576 if (src.is_single_phys_reg() ) {
1577 if (dst.is_single_phys_reg()) {
1578 if (dst.first() != src.first()) {
1579 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1580 }
1581 } else {
1582 assert(dst.is_single_reg(), "not a stack pair");
1583 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1584 }
1585 } else if (dst.is_single_phys_reg()) {
1586 assert(src.is_single_reg(), "not a stack pair");
1587 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
1588 } else {
1589 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1590 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1591 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1592 }
1593 }
1594
1595 // A double move
1596 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1597
1598 // The calling conventions assures us that each VMregpair is either
1599 // all really one physical register or adjacent stack slots.
1600 // This greatly simplifies the cases here compared to sparc.
1601
1602 if (src.is_single_phys_reg() ) {
1603 if (dst.is_single_phys_reg()) {
1604 // In theory these overlap but the ordering is such that this is likely a nop
1605 if ( src.first() != dst.first()) {
1606 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1607 }
1608 } else {
1609 assert(dst.is_single_reg(), "not a stack pair");
1610 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1611 }
1612 } else if (dst.is_single_phys_reg()) {
1613 assert(src.is_single_reg(), "not a stack pair");
1614 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
1615 } else {
1616 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1617 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1618 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1619 }
1620 }
1621
1622
1623 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1624 // We always ignore the frame_slots arg and just use the space just below frame pointer
1625 // which by this time is free to use
1626 switch (ret_type) {
1627 case T_FLOAT:
1628 __ movflt(Address(rbp, -wordSize), xmm0);
1629 break;
1630 case T_DOUBLE:
1631 __ movdbl(Address(rbp, -wordSize), xmm0);
1632 break;
1633 case T_VOID: break;
1634 default: {
1635 __ movptr(Address(rbp, -wordSize), rax);
1636 }
1637 }
1638 }
1639
1640 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1641 // We always ignore the frame_slots arg and just use the space just below frame pointer
1642 // which by this time is free to use
1643 switch (ret_type) {
1644 case T_FLOAT:
1645 __ movflt(xmm0, Address(rbp, -wordSize));
1646 break;
1647 case T_DOUBLE:
1648 __ movdbl(xmm0, Address(rbp, -wordSize));
1649 break;
1650 case T_VOID: break;
1651 default: {
1652 __ movptr(rax, Address(rbp, -wordSize));
1653 }
1654 }
1655 }
1656
1657 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1658 for ( int i = first_arg ; i < arg_count ; i++ ) {
1659 if (args[i].first()->is_Register()) {
1660 __ push(args[i].first()->as_Register());
1661 } else if (args[i].first()->is_XMMRegister()) {
1662 __ subptr(rsp, 2*wordSize);
1663 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
1664 }
1665 }
1666 }
1667
1668 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1669 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1670 if (args[i].first()->is_Register()) {
1671 __ pop(args[i].first()->as_Register());
1672 } else if (args[i].first()->is_XMMRegister()) {
1673 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
1674 __ addptr(rsp, 2*wordSize);
1675 }
1676 }
1677 }
1678
1679
1680 static void save_or_restore_arguments(MacroAssembler* masm,
1681 const int stack_slots,
1682 const int total_in_args,
1683 const int arg_save_area,
1684 OopMap* map,
1685 VMRegPair* in_regs,
1686 BasicType* in_sig_bt) {
1687 // if map is non-NULL then the code should store the values,
1688 // otherwise it should load them.
1689 int slot = arg_save_area;
1690 // Save down double word first
1691 for ( int i = 0; i < total_in_args; i++) {
1692 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1693 int offset = slot * VMRegImpl::stack_slot_size;
1694 slot += VMRegImpl::slots_per_word;
1695 assert(slot <= stack_slots, "overflow");
1696 if (map != NULL) {
1697 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1698 } else {
1699 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1700 }
1701 }
1702 if (in_regs[i].first()->is_Register() &&
1703 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1704 int offset = slot * VMRegImpl::stack_slot_size;
1705 if (map != NULL) {
1706 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register());
1707 if (in_sig_bt[i] == T_ARRAY) {
1708 map->set_oop(VMRegImpl::stack2reg(slot));;
1709 }
1710 } else {
1711 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset));
1712 }
1713 slot += VMRegImpl::slots_per_word;
1714 }
1715 }
1716 // Save or restore single word registers
1717 for ( int i = 0; i < total_in_args; i++) {
1718 if (in_regs[i].first()->is_Register()) {
1719 int offset = slot * VMRegImpl::stack_slot_size;
1720 slot++;
1721 assert(slot <= stack_slots, "overflow");
1722
1723 // Value is in an input register pass we must flush it to the stack
1724 const Register reg = in_regs[i].first()->as_Register();
1725 switch (in_sig_bt[i]) {
1726 case T_BOOLEAN:
1727 case T_CHAR:
1728 case T_BYTE:
1729 case T_SHORT:
1730 case T_INT:
1731 if (map != NULL) {
1732 __ movl(Address(rsp, offset), reg);
1733 } else {
1734 __ movl(reg, Address(rsp, offset));
1735 }
1736 break;
1737 case T_ARRAY:
1738 case T_LONG:
1739 // handled above
1740 break;
1741 case T_OBJECT:
1742 default: ShouldNotReachHere();
1743 }
1744 } else if (in_regs[i].first()->is_XMMRegister()) {
1745 if (in_sig_bt[i] == T_FLOAT) {
1746 int offset = slot * VMRegImpl::stack_slot_size;
1747 slot++;
1748 assert(slot <= stack_slots, "overflow");
1749 if (map != NULL) {
1750 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1751 } else {
1752 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1753 }
1754 }
1755 } else if (in_regs[i].first()->is_stack()) {
1756 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1757 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1758 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1759 }
1760 }
1761 }
1762 }
1763
1764
1765 // Check GCLocker::needs_gc and enter the runtime if it's true. This
1766 // keeps a new JNI critical region from starting until a GC has been
1767 // forced. Save down any oops in registers and describe them in an
1768 // OopMap.
1769 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1770 int stack_slots,
1771 int total_c_args,
1772 int total_in_args,
1773 int arg_save_area,
1774 OopMapSet* oop_maps,
1775 VMRegPair* in_regs,
1776 BasicType* in_sig_bt) {
1777 __ block_comment("check GCLocker::needs_gc");
1778 Label cont;
1779 __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1780 __ jcc(Assembler::equal, cont);
1781
1782 // Save down any incoming oops and call into the runtime to halt for a GC
1783
1784 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1785 save_or_restore_arguments(masm, stack_slots, total_in_args,
1786 arg_save_area, map, in_regs, in_sig_bt);
1787
1788 address the_pc = __ pc();
1789 oop_maps->add_gc_map( __ offset(), map);
1790 __ set_last_Java_frame(rsp, noreg, the_pc);
1791
1792 __ block_comment("block_for_jni_critical");
1793 __ movptr(c_rarg0, r15_thread);
1794 __ mov(r12, rsp); // remember sp
1795 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1796 __ andptr(rsp, -16); // align stack as required by ABI
1797 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1798 __ mov(rsp, r12); // restore sp
1799 __ reinit_heapbase();
1800
1801 __ reset_last_Java_frame(false);
1802
1803 save_or_restore_arguments(masm, stack_slots, total_in_args,
1804 arg_save_area, NULL, in_regs, in_sig_bt);
1805 __ bind(cont);
1806 #ifdef ASSERT
1807 if (StressCriticalJNINatives) {
1808 // Stress register saving
1809 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1810 save_or_restore_arguments(masm, stack_slots, total_in_args,
1811 arg_save_area, map, in_regs, in_sig_bt);
1812 // Destroy argument registers
1813 for (int i = 0; i < total_in_args - 1; i++) {
1814 if (in_regs[i].first()->is_Register()) {
1815 const Register reg = in_regs[i].first()->as_Register();
1816 __ xorptr(reg, reg);
1817 } else if (in_regs[i].first()->is_XMMRegister()) {
1818 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1819 } else if (in_regs[i].first()->is_FloatRegister()) {
1820 ShouldNotReachHere();
1821 } else if (in_regs[i].first()->is_stack()) {
1822 // Nothing to do
1823 } else {
1824 ShouldNotReachHere();
1825 }
1826 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1827 i++;
1828 }
1829 }
1830
1831 save_or_restore_arguments(masm, stack_slots, total_in_args,
1832 arg_save_area, NULL, in_regs, in_sig_bt);
1833 }
1834 #endif
1835 }
1836
1837 // Unpack an array argument into a pointer to the body and the length
1838 // if the array is non-null, otherwise pass 0 for both.
1839 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1840 Register tmp_reg = rax;
1841 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1842 "possible collision");
1843 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1844 "possible collision");
1845
1846 __ block_comment("unpack_array_argument {");
1847
1848 // Pass the length, ptr pair
1849 Label is_null, done;
1850 VMRegPair tmp;
1851 tmp.set_ptr(tmp_reg->as_VMReg());
1852 if (reg.first()->is_stack()) {
1853 // Load the arg up from the stack
1854 move_ptr(masm, reg, tmp);
1855 reg = tmp;
1856 }
1857 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1858 __ jccb(Assembler::equal, is_null);
1859 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1860 move_ptr(masm, tmp, body_arg);
1861 // load the length relative to the body.
1862 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1863 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1864 move32_64(masm, tmp, length_arg);
1865 __ jmpb(done);
1866 __ bind(is_null);
1867 // Pass zeros
1868 __ xorptr(tmp_reg, tmp_reg);
1869 move_ptr(masm, tmp, body_arg);
1870 move32_64(masm, tmp, length_arg);
1871 __ bind(done);
1872
1873 __ block_comment("} unpack_array_argument");
1874 }
1875
1876
1877 // Different signatures may require very different orders for the move
1878 // to avoid clobbering other arguments. There's no simple way to
1879 // order them safely. Compute a safe order for issuing stores and
1880 // break any cycles in those stores. This code is fairly general but
1881 // it's not necessary on the other platforms so we keep it in the
1882 // platform dependent code instead of moving it into a shared file.
1883 // (See bugs 7013347 & 7145024.)
1884 // Note that this code is specific to LP64.
1885 class ComputeMoveOrder: public StackObj {
1886 class MoveOperation: public ResourceObj {
1887 friend class ComputeMoveOrder;
1888 private:
1889 VMRegPair _src;
1890 VMRegPair _dst;
1891 int _src_index;
1892 int _dst_index;
1893 bool _processed;
1894 MoveOperation* _next;
1895 MoveOperation* _prev;
1896
1897 static int get_id(VMRegPair r) {
1898 return r.first()->value();
1899 }
1900
1901 public:
1902 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst):
1903 _src(src)
1904 , _src_index(src_index)
1905 , _dst(dst)
1906 , _dst_index(dst_index)
1907 , _next(NULL)
1908 , _prev(NULL)
1909 , _processed(false) {
1910 }
1911
1912 VMRegPair src() const { return _src; }
1913 int src_id() const { return get_id(src()); }
1914 int src_index() const { return _src_index; }
1915 VMRegPair dst() const { return _dst; }
1916 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; }
1917 int dst_index() const { return _dst_index; }
1918 int dst_id() const { return get_id(dst()); }
1919 MoveOperation* next() const { return _next; }
1920 MoveOperation* prev() const { return _prev; }
1921 void set_processed() { _processed = true; }
1922 bool is_processed() const { return _processed; }
1923
1924 // insert
1925 void break_cycle(VMRegPair temp_register) {
1926 // create a new store following the last store
1927 // to move from the temp_register to the original
1928 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst());
1929
1930 // break the cycle of links and insert new_store at the end
1931 // break the reverse link.
1932 MoveOperation* p = prev();
1933 assert(p->next() == this, "must be");
1934 _prev = NULL;
1935 p->_next = new_store;
1936 new_store->_prev = p;
1937
1938 // change the original store to save it's value in the temp.
1939 set_dst(-1, temp_register);
1940 }
1941
1942 void link(GrowableArray<MoveOperation*>& killer) {
1943 // link this store in front the store that it depends on
1944 MoveOperation* n = killer.at_grow(src_id(), NULL);
1945 if (n != NULL) {
1946 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet");
1947 _next = n;
1948 n->_prev = this;
1949 }
1950 }
1951 };
1952
1953 private:
1954 GrowableArray<MoveOperation*> edges;
1955
1956 public:
1957 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs,
1958 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) {
1959 // Move operations where the dest is the stack can all be
1960 // scheduled first since they can't interfere with the other moves.
1961 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1962 if (in_sig_bt[i] == T_ARRAY) {
1963 c_arg--;
1964 if (out_regs[c_arg].first()->is_stack() &&
1965 out_regs[c_arg + 1].first()->is_stack()) {
1966 arg_order.push(i);
1967 arg_order.push(c_arg);
1968 } else {
1969 if (out_regs[c_arg].first()->is_stack() ||
1970 in_regs[i].first() == out_regs[c_arg].first()) {
1971 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]);
1972 } else {
1973 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1974 }
1975 }
1976 } else if (in_sig_bt[i] == T_VOID) {
1977 arg_order.push(i);
1978 arg_order.push(c_arg);
1979 } else {
1980 if (out_regs[c_arg].first()->is_stack() ||
1981 in_regs[i].first() == out_regs[c_arg].first()) {
1982 arg_order.push(i);
1983 arg_order.push(c_arg);
1984 } else {
1985 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1986 }
1987 }
1988 }
1989 // Break any cycles in the register moves and emit the in the
1990 // proper order.
1991 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg);
1992 for (int i = 0; i < stores->length(); i++) {
1993 arg_order.push(stores->at(i)->src_index());
1994 arg_order.push(stores->at(i)->dst_index());
1995 }
1996 }
1997
1998 // Collected all the move operations
1999 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) {
2000 if (src.first() == dst.first()) return;
2001 edges.append(new MoveOperation(src_index, src, dst_index, dst));
2002 }
2003
2004 // Walk the edges breaking cycles between moves. The result list
2005 // can be walked in order to produce the proper set of loads
2006 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) {
2007 // Record which moves kill which values
2008 GrowableArray<MoveOperation*> killer;
2009 for (int i = 0; i < edges.length(); i++) {
2010 MoveOperation* s = edges.at(i);
2011 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer");
2012 killer.at_put_grow(s->dst_id(), s, NULL);
2013 }
2014 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL,
2015 "make sure temp isn't in the registers that are killed");
2016
2017 // create links between loads and stores
2018 for (int i = 0; i < edges.length(); i++) {
2019 edges.at(i)->link(killer);
2020 }
2021
2022 // at this point, all the move operations are chained together
2023 // in a doubly linked list. Processing it backwards finds
2024 // the beginning of the chain, forwards finds the end. If there's
2025 // a cycle it can be broken at any point, so pick an edge and walk
2026 // backward until the list ends or we end where we started.
2027 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>();
2028 for (int e = 0; e < edges.length(); e++) {
2029 MoveOperation* s = edges.at(e);
2030 if (!s->is_processed()) {
2031 MoveOperation* start = s;
2032 // search for the beginning of the chain or cycle
2033 while (start->prev() != NULL && start->prev() != s) {
2034 start = start->prev();
2035 }
2036 if (start->prev() == s) {
2037 start->break_cycle(temp_register);
2038 }
2039 // walk the chain forward inserting to store list
2040 while (start != NULL) {
2041 stores->append(start);
2042 start->set_processed();
2043 start = start->next();
2044 }
2045 }
2046 }
2047 return stores;
2048 }
2049 };
2050
2051 static void verify_oop_args(MacroAssembler* masm,
2052 const methodHandle& method,
2053 const BasicType* sig_bt,
2054 const VMRegPair* regs) {
2055 Register temp_reg = rbx; // not part of any compiled calling seq
2056 if (VerifyOops) {
2057 for (int i = 0; i < method->size_of_parameters(); i++) {
2058 if (sig_bt[i] == T_OBJECT ||
2059 sig_bt[i] == T_ARRAY) {
2060 VMReg r = regs[i].first();
2061 assert(r->is_valid(), "bad oop arg");
2062 if (r->is_stack()) {
2063 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
2064 __ verify_oop(temp_reg);
2065 } else {
2066 __ verify_oop(r->as_Register());
2067 }
2068 }
2069 }
2070 }
2071 }
2072
2073 static void gen_special_dispatch(MacroAssembler* masm,
2074 const methodHandle& method,
2075 const BasicType* sig_bt,
2076 const VMRegPair* regs) {
2077 verify_oop_args(masm, method, sig_bt, regs);
2078 vmIntrinsics::ID iid = method->intrinsic_id();
2079
2080 // Now write the args into the outgoing interpreter space
2081 bool has_receiver = false;
2082 Register receiver_reg = noreg;
2083 int member_arg_pos = -1;
2084 Register member_reg = noreg;
2085 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
2086 if (ref_kind != 0) {
2087 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
2088 member_reg = rbx; // known to be free at this point
2089 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
2090 } else if (iid == vmIntrinsics::_invokeBasic) {
2091 has_receiver = true;
2092 } else {
2093 fatal("unexpected intrinsic id %d", iid);
2094 }
2095
2096 if (member_reg != noreg) {
2097 // Load the member_arg into register, if necessary.
2098 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
2099 VMReg r = regs[member_arg_pos].first();
2100 if (r->is_stack()) {
2101 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
2102 } else {
2103 // no data motion is needed
2104 member_reg = r->as_Register();
2105 }
2106 }
2107
2108 if (has_receiver) {
2109 // Make sure the receiver is loaded into a register.
2110 assert(method->size_of_parameters() > 0, "oob");
2111 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
2112 VMReg r = regs[0].first();
2113 assert(r->is_valid(), "bad receiver arg");
2114 if (r->is_stack()) {
2115 // Porting note: This assumes that compiled calling conventions always
2116 // pass the receiver oop in a register. If this is not true on some
2117 // platform, pick a temp and load the receiver from stack.
2118 fatal("receiver always in a register");
2119 receiver_reg = j_rarg0; // known to be free at this point
2120 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
2121 } else {
2122 // no data motion is needed
2123 receiver_reg = r->as_Register();
2124 }
2125 }
2126
2127 // Figure out which address we are really jumping to:
2128 MethodHandles::generate_method_handle_dispatch(masm, iid,
2129 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
2130 }
2131
2132 // ---------------------------------------------------------------------------
2133 // Generate a native wrapper for a given method. The method takes arguments
2134 // in the Java compiled code convention, marshals them to the native
2135 // convention (handlizes oops, etc), transitions to native, makes the call,
2136 // returns to java state (possibly blocking), unhandlizes any result and
2137 // returns.
2138 //
2139 // Critical native functions are a shorthand for the use of
2140 // GetPrimtiveArrayCritical and disallow the use of any other JNI
2141 // functions. The wrapper is expected to unpack the arguments before
2142 // passing them to the callee and perform checks before and after the
2143 // native call to ensure that they GCLocker
2144 // lock_critical/unlock_critical semantics are followed. Some other
2145 // parts of JNI setup are skipped like the tear down of the JNI handle
2146 // block and the check for pending exceptions it's impossible for them
2147 // to be thrown.
2148 //
2149 // They are roughly structured like this:
2150 // if (GCLocker::needs_gc())
2151 // SharedRuntime::block_for_jni_critical();
2152 // tranistion to thread_in_native
2153 // unpack arrray arguments and call native entry point
2154 // check for safepoint in progress
2155 // check if any thread suspend flags are set
2156 // call into JVM and possible unlock the JNI critical
2157 // if a GC was suppressed while in the critical native.
2158 // transition back to thread_in_Java
2159 // return to caller
2160 //
2161 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
2162 const methodHandle& method,
2163 int compile_id,
2164 BasicType* in_sig_bt,
2165 VMRegPair* in_regs,
2166 BasicType ret_type) {
2167 if (method->is_method_handle_intrinsic()) {
2168 vmIntrinsics::ID iid = method->intrinsic_id();
2169 intptr_t start = (intptr_t)__ pc();
2170 int vep_offset = ((intptr_t)__ pc()) - start;
2171 gen_special_dispatch(masm,
2172 method,
2173 in_sig_bt,
2174 in_regs);
2175 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
2176 __ flush();
2177 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
2178 return nmethod::new_native_nmethod(method,
2179 compile_id,
2180 masm->code(),
2181 vep_offset,
2182 frame_complete,
2183 stack_slots / VMRegImpl::slots_per_word,
2184 in_ByteSize(-1),
2185 in_ByteSize(-1),
2186 (OopMapSet*)NULL);
2187 }
2188 bool is_critical_native = true;
2189 address native_func = method->critical_native_function();
2190 if (native_func == NULL) {
2191 native_func = method->native_function();
2192 is_critical_native = false;
2193 }
2194 assert(native_func != NULL, "must have function");
2195
2196 // An OopMap for lock (and class if static)
2197 OopMapSet *oop_maps = new OopMapSet();
2198 intptr_t start = (intptr_t)__ pc();
2199
2200 // We have received a description of where all the java arg are located
2201 // on entry to the wrapper. We need to convert these args to where
2202 // the jni function will expect them. To figure out where they go
2203 // we convert the java signature to a C signature by inserting
2204 // the hidden arguments as arg[0] and possibly arg[1] (static method)
2205
2206 const int total_in_args = method->size_of_parameters();
2207 int total_c_args = total_in_args;
2208 if (!is_critical_native) {
2209 total_c_args += 1;
2210 if (method->is_static()) {
2211 total_c_args++;
2212 }
2213 } else {
2214 for (int i = 0; i < total_in_args; i++) {
2215 if (in_sig_bt[i] == T_ARRAY) {
2216 total_c_args++;
2217 }
2218 }
2219 }
2220
2221 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
2222 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
2223 BasicType* in_elem_bt = NULL;
2224
2225 int argc = 0;
2226 if (!is_critical_native) {
2227 out_sig_bt[argc++] = T_ADDRESS;
2228 if (method->is_static()) {
2229 out_sig_bt[argc++] = T_OBJECT;
2230 }
2231
2232 for (int i = 0; i < total_in_args ; i++ ) {
2233 out_sig_bt[argc++] = in_sig_bt[i];
2234 }
2235 } else {
2236 Thread* THREAD = Thread::current();
2237 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
2238 SignatureStream ss(method->signature());
2239 for (int i = 0; i < total_in_args ; i++ ) {
2240 if (in_sig_bt[i] == T_ARRAY) {
2241 // Arrays are passed as int, elem* pair
2242 out_sig_bt[argc++] = T_INT;
2243 out_sig_bt[argc++] = T_ADDRESS;
2244 Symbol* atype = ss.as_symbol(CHECK_NULL);
2245 const char* at = atype->as_C_string();
2246 if (strlen(at) == 2) {
2247 assert(at[0] == '[', "must be");
2248 switch (at[1]) {
2249 case 'B': in_elem_bt[i] = T_BYTE; break;
2250 case 'C': in_elem_bt[i] = T_CHAR; break;
2251 case 'D': in_elem_bt[i] = T_DOUBLE; break;
2252 case 'F': in_elem_bt[i] = T_FLOAT; break;
2253 case 'I': in_elem_bt[i] = T_INT; break;
2254 case 'J': in_elem_bt[i] = T_LONG; break;
2255 case 'S': in_elem_bt[i] = T_SHORT; break;
2256 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
2257 default: ShouldNotReachHere();
2258 }
2259 }
2260 } else {
2261 out_sig_bt[argc++] = in_sig_bt[i];
2262 in_elem_bt[i] = T_VOID;
2263 }
2264 if (in_sig_bt[i] != T_VOID) {
2265 assert(in_sig_bt[i] == ss.type(), "must match");
2266 ss.next();
2267 }
2268 }
2269 }
2270
2271 // Now figure out where the args must be stored and how much stack space
2272 // they require.
2273 int out_arg_slots;
2274 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
2275
2276 // Compute framesize for the wrapper. We need to handlize all oops in
2277 // incoming registers
2278
2279 // Calculate the total number of stack slots we will need.
2280
2281 // First count the abi requirement plus all of the outgoing args
2282 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2283
2284 // Now the space for the inbound oop handle area
2285 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers
2286 if (is_critical_native) {
2287 // Critical natives may have to call out so they need a save area
2288 // for register arguments.
2289 int double_slots = 0;
2290 int single_slots = 0;
2291 for ( int i = 0; i < total_in_args; i++) {
2292 if (in_regs[i].first()->is_Register()) {
2293 const Register reg = in_regs[i].first()->as_Register();
2294 switch (in_sig_bt[i]) {
2295 case T_BOOLEAN:
2296 case T_BYTE:
2297 case T_SHORT:
2298 case T_CHAR:
2299 case T_INT: single_slots++; break;
2300 case T_ARRAY: // specific to LP64 (7145024)
2301 case T_LONG: double_slots++; break;
2302 default: ShouldNotReachHere();
2303 }
2304 } else if (in_regs[i].first()->is_XMMRegister()) {
2305 switch (in_sig_bt[i]) {
2306 case T_FLOAT: single_slots++; break;
2307 case T_DOUBLE: double_slots++; break;
2308 default: ShouldNotReachHere();
2309 }
2310 } else if (in_regs[i].first()->is_FloatRegister()) {
2311 ShouldNotReachHere();
2312 }
2313 }
2314 total_save_slots = double_slots * 2 + single_slots;
2315 // align the save area
2316 if (double_slots != 0) {
2317 stack_slots = align_up(stack_slots, 2);
2318 }
2319 }
2320
2321 int oop_handle_offset = stack_slots;
2322 stack_slots += total_save_slots;
2323
2324 // Now any space we need for handlizing a klass if static method
2325
2326 int klass_slot_offset = 0;
2327 int klass_offset = -1;
2328 int lock_slot_offset = 0;
2329 bool is_static = false;
2330
2331 if (method->is_static()) {
2332 klass_slot_offset = stack_slots;
2333 stack_slots += VMRegImpl::slots_per_word;
2334 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
2335 is_static = true;
2336 }
2337
2338 // Plus a lock if needed
2339
2340 if (method->is_synchronized()) {
2341 lock_slot_offset = stack_slots;
2342 stack_slots += VMRegImpl::slots_per_word;
2343 }
2344
2345 // Now a place (+2) to save return values or temp during shuffling
2346 // + 4 for return address (which we own) and saved rbp
2347 stack_slots += 6;
2348
2349 // Ok The space we have allocated will look like:
2350 //
2351 //
2352 // FP-> | |
2353 // |---------------------|
2354 // | 2 slots for moves |
2355 // |---------------------|
2356 // | lock box (if sync) |
2357 // |---------------------| <- lock_slot_offset
2358 // | klass (if static) |
2359 // |---------------------| <- klass_slot_offset
2360 // | oopHandle area |
2361 // |---------------------| <- oop_handle_offset (6 java arg registers)
2362 // | outbound memory |
2363 // | based arguments |
2364 // | |
2365 // |---------------------|
2366 // | |
2367 // SP-> | out_preserved_slots |
2368 //
2369 //
2370
2371
2372 // Now compute actual number of stack words we need rounding to make
2373 // stack properly aligned.
2374 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
2375
2376 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2377
2378 // First thing make an ic check to see if we should even be here
2379
2380 // We are free to use all registers as temps without saving them and
2381 // restoring them except rbp. rbp is the only callee save register
2382 // as far as the interpreter and the compiler(s) are concerned.
2383
2384
2385 const Register ic_reg = rax;
2386 const Register receiver = j_rarg0;
2387
2388 Label hit;
2389 Label exception_pending;
2390
2391 assert_different_registers(ic_reg, receiver, rscratch1);
2392 __ verify_oop(receiver);
2393 __ load_klass(rscratch1, receiver);
2394 __ cmpq(ic_reg, rscratch1);
2395 __ jcc(Assembler::equal, hit);
2396
2397 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2398
2399 // Verified entry point must be aligned
2400 __ align(8);
2401
2402 __ bind(hit);
2403
2404 int vep_offset = ((intptr_t)__ pc()) - start;
2405
2406 #ifdef COMPILER1
2407 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
2408 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
2409 inline_check_hashcode_from_object_header(masm, method, j_rarg0 /*obj_reg*/, rax /*result*/);
2410 }
2411 #endif // COMPILER1
2412
2413 // The instruction at the verified entry point must be 5 bytes or longer
2414 // because it can be patched on the fly by make_non_entrant. The stack bang
2415 // instruction fits that requirement.
2416
2417 // Generate stack overflow check
2418
2419 if (UseStackBanging) {
2420 __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
2421 } else {
2422 // need a 5 byte instruction to allow MT safe patching to non-entrant
2423 __ fat_nop();
2424 }
2425
2426 // Generate a new frame for the wrapper.
2427 __ enter();
2428 // -2 because return address is already present and so is saved rbp
2429 __ subptr(rsp, stack_size - 2*wordSize);
2430
2431 // Frame is now completed as far as size and linkage.
2432 int frame_complete = ((intptr_t)__ pc()) - start;
2433
2434 if (UseRTMLocking) {
2435 // Abort RTM transaction before calling JNI
2436 // because critical section will be large and will be
2437 // aborted anyway. Also nmethod could be deoptimized.
2438 __ xabort(0);
2439 }
2440
2441 #ifdef ASSERT
2442 {
2443 Label L;
2444 __ mov(rax, rsp);
2445 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
2446 __ cmpptr(rax, rsp);
2447 __ jcc(Assembler::equal, L);
2448 __ stop("improperly aligned stack");
2449 __ bind(L);
2450 }
2451 #endif /* ASSERT */
2452
2453
2454 // We use r14 as the oop handle for the receiver/klass
2455 // It is callee save so it survives the call to native
2456
2457 const Register oop_handle_reg = r14;
2458
2459 if (is_critical_native) {
2460 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args,
2461 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
2462 }
2463
2464 //
2465 // We immediately shuffle the arguments so that any vm call we have to
2466 // make from here on out (sync slow path, jvmti, etc.) we will have
2467 // captured the oops from our caller and have a valid oopMap for
2468 // them.
2469
2470 // -----------------
2471 // The Grand Shuffle
2472
2473 // The Java calling convention is either equal (linux) or denser (win64) than the
2474 // c calling convention. However the because of the jni_env argument the c calling
2475 // convention always has at least one more (and two for static) arguments than Java.
2476 // Therefore if we move the args from java -> c backwards then we will never have
2477 // a register->register conflict and we don't have to build a dependency graph
2478 // and figure out how to break any cycles.
2479 //
2480
2481 // Record esp-based slot for receiver on stack for non-static methods
2482 int receiver_offset = -1;
2483
2484 // This is a trick. We double the stack slots so we can claim
2485 // the oops in the caller's frame. Since we are sure to have
2486 // more args than the caller doubling is enough to make
2487 // sure we can capture all the incoming oop args from the
2488 // caller.
2489 //
2490 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2491
2492 // Mark location of rbp (someday)
2493 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
2494
2495 // Use eax, ebx as temporaries during any memory-memory moves we have to do
2496 // All inbound args are referenced based on rbp and all outbound args via rsp.
2497
2498
2499 #ifdef ASSERT
2500 bool reg_destroyed[RegisterImpl::number_of_registers];
2501 bool freg_destroyed[XMMRegisterImpl::number_of_registers];
2502 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
2503 reg_destroyed[r] = false;
2504 }
2505 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
2506 freg_destroyed[f] = false;
2507 }
2508
2509 #endif /* ASSERT */
2510
2511 // This may iterate in two different directions depending on the
2512 // kind of native it is. The reason is that for regular JNI natives
2513 // the incoming and outgoing registers are offset upwards and for
2514 // critical natives they are offset down.
2515 GrowableArray<int> arg_order(2 * total_in_args);
2516 VMRegPair tmp_vmreg;
2517 tmp_vmreg.set2(rbx->as_VMReg());
2518
2519 if (!is_critical_native) {
2520 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
2521 arg_order.push(i);
2522 arg_order.push(c_arg);
2523 }
2524 } else {
2525 // Compute a valid move order, using tmp_vmreg to break any cycles
2526 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
2527 }
2528
2529 int temploc = -1;
2530 for (int ai = 0; ai < arg_order.length(); ai += 2) {
2531 int i = arg_order.at(ai);
2532 int c_arg = arg_order.at(ai + 1);
2533 __ block_comment(err_msg("move %d -> %d", i, c_arg));
2534 if (c_arg == -1) {
2535 assert(is_critical_native, "should only be required for critical natives");
2536 // This arg needs to be moved to a temporary
2537 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
2538 in_regs[i] = tmp_vmreg;
2539 temploc = i;
2540 continue;
2541 } else if (i == -1) {
2542 assert(is_critical_native, "should only be required for critical natives");
2543 // Read from the temporary location
2544 assert(temploc != -1, "must be valid");
2545 i = temploc;
2546 temploc = -1;
2547 }
2548 #ifdef ASSERT
2549 if (in_regs[i].first()->is_Register()) {
2550 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
2551 } else if (in_regs[i].first()->is_XMMRegister()) {
2552 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
2553 }
2554 if (out_regs[c_arg].first()->is_Register()) {
2555 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2556 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2557 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2558 }
2559 #endif /* ASSERT */
2560 switch (in_sig_bt[i]) {
2561 case T_ARRAY:
2562 if (is_critical_native) {
2563 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
2564 c_arg++;
2565 #ifdef ASSERT
2566 if (out_regs[c_arg].first()->is_Register()) {
2567 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2568 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2569 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2570 }
2571 #endif
2572 break;
2573 }
2574 case T_OBJECT:
2575 assert(!is_critical_native, "no oop arguments");
2576 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
2577 ((i == 0) && (!is_static)),
2578 &receiver_offset);
2579 break;
2580 case T_VOID:
2581 break;
2582
2583 case T_FLOAT:
2584 float_move(masm, in_regs[i], out_regs[c_arg]);
2585 break;
2586
2587 case T_DOUBLE:
2588 assert( i + 1 < total_in_args &&
2589 in_sig_bt[i + 1] == T_VOID &&
2590 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
2591 double_move(masm, in_regs[i], out_regs[c_arg]);
2592 break;
2593
2594 case T_LONG :
2595 long_move(masm, in_regs[i], out_regs[c_arg]);
2596 break;
2597
2598 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2599
2600 default:
2601 move32_64(masm, in_regs[i], out_regs[c_arg]);
2602 }
2603 }
2604
2605 int c_arg;
2606
2607 // Pre-load a static method's oop into r14. Used both by locking code and
2608 // the normal JNI call code.
2609 if (!is_critical_native) {
2610 // point c_arg at the first arg that is already loaded in case we
2611 // need to spill before we call out
2612 c_arg = total_c_args - total_in_args;
2613
2614 if (method->is_static()) {
2615
2616 // load oop into a register
2617 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
2618
2619 // Now handlize the static class mirror it's known not-null.
2620 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
2621 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2622
2623 // Now get the handle
2624 __ lea(oop_handle_reg, Address(rsp, klass_offset));
2625 // store the klass handle as second argument
2626 __ movptr(c_rarg1, oop_handle_reg);
2627 // and protect the arg if we must spill
2628 c_arg--;
2629 }
2630 } else {
2631 // For JNI critical methods we need to save all registers in save_args.
2632 c_arg = 0;
2633 }
2634
2635 // Change state to native (we save the return address in the thread, since it might not
2636 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
2637 // points into the right code segment. It does not have to be the correct return pc.
2638 // We use the same pc/oopMap repeatedly when we call out
2639
2640 intptr_t the_pc = (intptr_t) __ pc();
2641 oop_maps->add_gc_map(the_pc - start, map);
2642
2643 __ set_last_Java_frame(rsp, noreg, (address)the_pc);
2644
2645
2646 // We have all of the arguments setup at this point. We must not touch any register
2647 // argument registers at this point (what if we save/restore them there are no oop?
2648
2649 {
2650 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2651 // protect the args we've loaded
2652 save_args(masm, total_c_args, c_arg, out_regs);
2653 __ mov_metadata(c_rarg1, method());
2654 __ call_VM_leaf(
2655 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2656 r15_thread, c_rarg1);
2657 restore_args(masm, total_c_args, c_arg, out_regs);
2658 }
2659
2660 // RedefineClasses() tracing support for obsolete method entry
2661 if (log_is_enabled(Trace, redefine, class, obsolete)) {
2662 // protect the args we've loaded
2663 save_args(masm, total_c_args, c_arg, out_regs);
2664 __ mov_metadata(c_rarg1, method());
2665 __ call_VM_leaf(
2666 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2667 r15_thread, c_rarg1);
2668 restore_args(masm, total_c_args, c_arg, out_regs);
2669 }
2670
2671 // Lock a synchronized method
2672
2673 // Register definitions used by locking and unlocking
2674
2675 const Register swap_reg = rax; // Must use rax for cmpxchg instruction
2676 const Register obj_reg = rbx; // Will contain the oop
2677 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
2678 const Register old_hdr = r13; // value of old header at unlock time
2679
2680 Label slow_path_lock;
2681 Label lock_done;
2682
2683 if (method->is_synchronized()) {
2684 assert(!is_critical_native, "unhandled");
2685
2686
2687 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
2688
2689 // Get the handle (the 2nd argument)
2690 __ mov(oop_handle_reg, c_rarg1);
2691
2692 // Get address of the box
2693
2694 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2695
2696 // Load the oop from the handle
2697 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2698
2699 if (UseBiasedLocking) {
2700 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
2701 }
2702
2703 // Load immediate 1 into swap_reg %rax
2704 __ movl(swap_reg, 1);
2705
2706 // Load (object->mark() | 1) into swap_reg %rax
2707 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2708 if (EnableValhalla && !UseBiasedLocking) {
2709 // For slow path is_always_locked, using biased, which is never natural for !UseBiasLocking
2710 __ andptr(swap_reg, ~markOopDesc::biased_lock_bit_in_place);
2711 }
2712
2713 // Save (object->mark() | 1) into BasicLock's displaced header
2714 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2715
2716 if (os::is_MP()) {
2717 __ lock();
2718 }
2719
2720 // src -> dest iff dest == rax else rax <- dest
2721 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2722 __ jcc(Assembler::equal, lock_done);
2723
2724 // Hmm should this move to the slow path code area???
2725
2726 // Test if the oopMark is an obvious stack pointer, i.e.,
2727 // 1) (mark & 3) == 0, and
2728 // 2) rsp <= mark < mark + os::pagesize()
2729 // These 3 tests can be done by evaluating the following
2730 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2731 // assuming both stack pointer and pagesize have their
2732 // least significant 2 bits clear.
2733 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
2734
2735 __ subptr(swap_reg, rsp);
2736 __ andptr(swap_reg, 3 - os::vm_page_size());
2737
2738 // Save the test result, for recursive case, the result is zero
2739 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2740 __ jcc(Assembler::notEqual, slow_path_lock);
2741
2742 // Slow path will re-enter here
2743
2744 __ bind(lock_done);
2745 }
2746
2747
2748 // Finally just about ready to make the JNI call
2749
2750
2751 // get JNIEnv* which is first argument to native
2752 if (!is_critical_native) {
2753 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
2754 }
2755
2756 // Now set thread in native
2757 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
2758
2759 __ call(RuntimeAddress(native_func));
2760
2761 // Verify or restore cpu control state after JNI call
2762 __ restore_cpu_control_state_after_jni();
2763
2764 // Unpack native results.
2765 switch (ret_type) {
2766 case T_BOOLEAN: __ c2bool(rax); break;
2767 case T_CHAR : __ movzwl(rax, rax); break;
2768 case T_BYTE : __ sign_extend_byte (rax); break;
2769 case T_SHORT : __ sign_extend_short(rax); break;
2770 case T_INT : /* nothing to do */ break;
2771 case T_DOUBLE :
2772 case T_FLOAT :
2773 // Result is in xmm0 we'll save as needed
2774 break;
2775 case T_ARRAY: // Really a handle
2776 case T_OBJECT: // Really a handle
2777 break; // can't de-handlize until after safepoint check
2778 case T_VOID: break;
2779 case T_LONG: break;
2780 default : ShouldNotReachHere();
2781 }
2782
2783 // Switch thread to "native transition" state before reading the synchronization state.
2784 // This additional state is necessary because reading and testing the synchronization
2785 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2786 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2787 // VM thread changes sync state to synchronizing and suspends threads for GC.
2788 // Thread A is resumed to finish this native method, but doesn't block here since it
2789 // didn't see any synchronization is progress, and escapes.
2790 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2791
2792 if(os::is_MP()) {
2793 if (UseMembar) {
2794 // Force this write out before the read below
2795 __ membar(Assembler::Membar_mask_bits(
2796 Assembler::LoadLoad | Assembler::LoadStore |
2797 Assembler::StoreLoad | Assembler::StoreStore));
2798 } else {
2799 // Write serialization page so VM thread can do a pseudo remote membar.
2800 // We use the current thread pointer to calculate a thread specific
2801 // offset to write to within the page. This minimizes bus traffic
2802 // due to cache line collision.
2803 __ serialize_memory(r15_thread, rcx);
2804 }
2805 }
2806
2807 Label after_transition;
2808
2809 // check for safepoint operation in progress and/or pending suspend requests
2810 {
2811 Label Continue;
2812 Label slow_path;
2813
2814 __ safepoint_poll(slow_path, r15_thread, rscratch1);
2815
2816 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
2817 __ jcc(Assembler::equal, Continue);
2818 __ bind(slow_path);
2819
2820 // Don't use call_VM as it will see a possible pending exception and forward it
2821 // and never return here preventing us from clearing _last_native_pc down below.
2822 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2823 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2824 // by hand.
2825 //
2826 __ vzeroupper();
2827 save_native_result(masm, ret_type, stack_slots);
2828 __ mov(c_rarg0, r15_thread);
2829 __ mov(r12, rsp); // remember sp
2830 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2831 __ andptr(rsp, -16); // align stack as required by ABI
2832 if (!is_critical_native) {
2833 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2834 } else {
2835 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)));
2836 }
2837 __ mov(rsp, r12); // restore sp
2838 __ reinit_heapbase();
2839 // Restore any method result value
2840 restore_native_result(masm, ret_type, stack_slots);
2841
2842 if (is_critical_native) {
2843 // The call above performed the transition to thread_in_Java so
2844 // skip the transition logic below.
2845 __ jmpb(after_transition);
2846 }
2847
2848 __ bind(Continue);
2849 }
2850
2851 // change thread state
2852 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
2853 __ bind(after_transition);
2854
2855 Label reguard;
2856 Label reguard_done;
2857 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2858 __ jcc(Assembler::equal, reguard);
2859 __ bind(reguard_done);
2860
2861 // native result if any is live
2862
2863 // Unlock
2864 Label unlock_done;
2865 Label slow_path_unlock;
2866 if (method->is_synchronized()) {
2867
2868 // Get locked oop from the handle we passed to jni
2869 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2870
2871 Label done;
2872
2873 if (UseBiasedLocking) {
2874 __ biased_locking_exit(obj_reg, old_hdr, done);
2875 }
2876
2877 // Simple recursive lock?
2878
2879 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
2880 __ jcc(Assembler::equal, done);
2881
2882 // Must save rax if if it is live now because cmpxchg must use it
2883 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2884 save_native_result(masm, ret_type, stack_slots);
2885 }
2886
2887
2888 // get address of the stack lock
2889 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2890 // get old displaced header
2891 __ movptr(old_hdr, Address(rax, 0));
2892
2893 // Atomic swap old header if oop still contains the stack lock
2894 if (os::is_MP()) {
2895 __ lock();
2896 }
2897 __ cmpxchgptr(old_hdr, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2898 __ jcc(Assembler::notEqual, slow_path_unlock);
2899
2900 // slow path re-enters here
2901 __ bind(unlock_done);
2902 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2903 restore_native_result(masm, ret_type, stack_slots);
2904 }
2905
2906 __ bind(done);
2907
2908 }
2909 {
2910 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2911 save_native_result(masm, ret_type, stack_slots);
2912 __ mov_metadata(c_rarg1, method());
2913 __ call_VM_leaf(
2914 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2915 r15_thread, c_rarg1);
2916 restore_native_result(masm, ret_type, stack_slots);
2917 }
2918
2919 __ reset_last_Java_frame(false);
2920
2921 // Unbox oop result, e.g. JNIHandles::resolve value.
2922 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2923 __ resolve_jobject(rax /* value */,
2924 r15_thread /* thread */,
2925 rcx /* tmp */);
2926 }
2927
2928 if (CheckJNICalls) {
2929 // clear_pending_jni_exception_check
2930 __ movptr(Address(r15_thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2931 }
2932
2933 if (!is_critical_native) {
2934 // reset handle block
2935 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
2936 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
2937 }
2938
2939 // pop our frame
2940
2941 __ leave();
2942
2943 if (!is_critical_native) {
2944 // Any exception pending?
2945 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2946 __ jcc(Assembler::notEqual, exception_pending);
2947 }
2948
2949 // Return
2950
2951 __ ret(0);
2952
2953 // Unexpected paths are out of line and go here
2954
2955 if (!is_critical_native) {
2956 // forward the exception
2957 __ bind(exception_pending);
2958
2959 // and forward the exception
2960 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2961 }
2962
2963 // Slow path locking & unlocking
2964 if (method->is_synchronized()) {
2965
2966 // BEGIN Slow path lock
2967 __ bind(slow_path_lock);
2968
2969 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2970 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2971
2972 // protect the args we've loaded
2973 save_args(masm, total_c_args, c_arg, out_regs);
2974
2975 __ mov(c_rarg0, obj_reg);
2976 __ mov(c_rarg1, lock_reg);
2977 __ mov(c_rarg2, r15_thread);
2978
2979 // Not a leaf but we have last_Java_frame setup as we want
2980 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2981 restore_args(masm, total_c_args, c_arg, out_regs);
2982
2983 #ifdef ASSERT
2984 { Label L;
2985 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2986 __ jcc(Assembler::equal, L);
2987 __ stop("no pending exception allowed on exit from monitorenter");
2988 __ bind(L);
2989 }
2990 #endif
2991 __ jmp(lock_done);
2992
2993 // END Slow path lock
2994
2995 // BEGIN Slow path unlock
2996 __ bind(slow_path_unlock);
2997
2998 // If we haven't already saved the native result we must save it now as xmm registers
2999 // are still exposed.
3000 __ vzeroupper();
3001 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
3002 save_native_result(masm, ret_type, stack_slots);
3003 }
3004
3005 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
3006
3007 __ mov(c_rarg0, obj_reg);
3008 __ mov(c_rarg2, r15_thread);
3009 __ mov(r12, rsp); // remember sp
3010 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
3011 __ andptr(rsp, -16); // align stack as required by ABI
3012
3013 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
3014 // NOTE that obj_reg == rbx currently
3015 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
3016 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
3017
3018 // args are (oop obj, BasicLock* lock, JavaThread* thread)
3019 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
3020 __ mov(rsp, r12); // restore sp
3021 __ reinit_heapbase();
3022 #ifdef ASSERT
3023 {
3024 Label L;
3025 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
3026 __ jcc(Assembler::equal, L);
3027 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
3028 __ bind(L);
3029 }
3030 #endif /* ASSERT */
3031
3032 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
3033
3034 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
3035 restore_native_result(masm, ret_type, stack_slots);
3036 }
3037 __ jmp(unlock_done);
3038
3039 // END Slow path unlock
3040
3041 } // synchronized
3042
3043 // SLOW PATH Reguard the stack if needed
3044
3045 __ bind(reguard);
3046 __ vzeroupper();
3047 save_native_result(masm, ret_type, stack_slots);
3048 __ mov(r12, rsp); // remember sp
3049 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
3050 __ andptr(rsp, -16); // align stack as required by ABI
3051 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
3052 __ mov(rsp, r12); // restore sp
3053 __ reinit_heapbase();
3054 restore_native_result(masm, ret_type, stack_slots);
3055 // and continue
3056 __ jmp(reguard_done);
3057
3058
3059
3060 __ flush();
3061
3062 nmethod *nm = nmethod::new_native_nmethod(method,
3063 compile_id,
3064 masm->code(),
3065 vep_offset,
3066 frame_complete,
3067 stack_slots / VMRegImpl::slots_per_word,
3068 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
3069 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
3070 oop_maps);
3071
3072 if (is_critical_native) {
3073 nm->set_lazy_critical_native(true);
3074 }
3075
3076 return nm;
3077
3078 }
3079
3080 // this function returns the adjust size (in number of words) to a c2i adapter
3081 // activation for use during deoptimization
3082 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
3083 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
3084 }
3085
3086
3087 uint SharedRuntime::out_preserve_stack_slots() {
3088 return 0;
3089 }
3090
3091 //------------------------------generate_deopt_blob----------------------------
3092 void SharedRuntime::generate_deopt_blob() {
3093 // Allocate space for the code
3094 ResourceMark rm;
3095 // Setup code generation tools
3096 int pad = 0;
3097 #if INCLUDE_JVMCI
3098 if (EnableJVMCI || UseAOT) {
3099 pad += 512; // Increase the buffer size when compiling for JVMCI
3100 }
3101 #endif
3102 CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
3103 MacroAssembler* masm = new MacroAssembler(&buffer);
3104 int frame_size_in_words;
3105 OopMap* map = NULL;
3106 OopMapSet *oop_maps = new OopMapSet();
3107
3108 // -------------
3109 // This code enters when returning to a de-optimized nmethod. A return
3110 // address has been pushed on the the stack, and return values are in
3111 // registers.
3112 // If we are doing a normal deopt then we were called from the patched
3113 // nmethod from the point we returned to the nmethod. So the return
3114 // address on the stack is wrong by NativeCall::instruction_size
3115 // We will adjust the value so it looks like we have the original return
3116 // address on the stack (like when we eagerly deoptimized).
3117 // In the case of an exception pending when deoptimizing, we enter
3118 // with a return address on the stack that points after the call we patched
3119 // into the exception handler. We have the following register state from,
3120 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
3121 // rax: exception oop
3122 // rbx: exception handler
3123 // rdx: throwing pc
3124 // So in this case we simply jam rdx into the useless return address and
3125 // the stack looks just like we want.
3126 //
3127 // At this point we need to de-opt. We save the argument return
3128 // registers. We call the first C routine, fetch_unroll_info(). This
3129 // routine captures the return values and returns a structure which
3130 // describes the current frame size and the sizes of all replacement frames.
3131 // The current frame is compiled code and may contain many inlined
3132 // functions, each with their own JVM state. We pop the current frame, then
3133 // push all the new frames. Then we call the C routine unpack_frames() to
3134 // populate these frames. Finally unpack_frames() returns us the new target
3135 // address. Notice that callee-save registers are BLOWN here; they have
3136 // already been captured in the vframeArray at the time the return PC was
3137 // patched.
3138 address start = __ pc();
3139 Label cont;
3140
3141 // Prolog for non exception case!
3142
3143 // Save everything in sight.
3144 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3145
3146 // Normal deoptimization. Save exec mode for unpack_frames.
3147 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
3148 __ jmp(cont);
3149
3150 int reexecute_offset = __ pc() - start;
3151 #if INCLUDE_JVMCI && !defined(COMPILER1)
3152 if (EnableJVMCI && UseJVMCICompiler) {
3153 // JVMCI does not use this kind of deoptimization
3154 __ should_not_reach_here();
3155 }
3156 #endif
3157
3158 // Reexecute case
3159 // return address is the pc describes what bci to do re-execute at
3160
3161 // No need to update map as each call to save_live_registers will produce identical oopmap
3162 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3163
3164 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
3165 __ jmp(cont);
3166
3167 #if INCLUDE_JVMCI
3168 Label after_fetch_unroll_info_call;
3169 int implicit_exception_uncommon_trap_offset = 0;
3170 int uncommon_trap_offset = 0;
3171
3172 if (EnableJVMCI || UseAOT) {
3173 implicit_exception_uncommon_trap_offset = __ pc() - start;
3174
3175 __ pushptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
3176 __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())), (int32_t)NULL_WORD);
3177
3178 uncommon_trap_offset = __ pc() - start;
3179
3180 // Save everything in sight.
3181 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3182 // fetch_unroll_info needs to call last_java_frame()
3183 __ set_last_Java_frame(noreg, noreg, NULL);
3184
3185 __ movl(c_rarg1, Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())));
3186 __ movl(Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())), -1);
3187
3188 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute);
3189 __ mov(c_rarg0, r15_thread);
3190 __ movl(c_rarg2, r14); // exec mode
3191 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3192 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
3193
3194 __ reset_last_Java_frame(false);
3195
3196 __ jmp(after_fetch_unroll_info_call);
3197 } // EnableJVMCI
3198 #endif // INCLUDE_JVMCI
3199
3200 int exception_offset = __ pc() - start;
3201
3202 // Prolog for exception case
3203
3204 // all registers are dead at this entry point, except for rax, and
3205 // rdx which contain the exception oop and exception pc
3206 // respectively. Set them in TLS and fall thru to the
3207 // unpack_with_exception_in_tls entry point.
3208
3209 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
3210 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
3211
3212 int exception_in_tls_offset = __ pc() - start;
3213
3214 // new implementation because exception oop is now passed in JavaThread
3215
3216 // Prolog for exception case
3217 // All registers must be preserved because they might be used by LinearScan
3218 // Exceptiop oop and throwing PC are passed in JavaThread
3219 // tos: stack at point of call to method that threw the exception (i.e. only
3220 // args are on the stack, no return address)
3221
3222 // make room on stack for the return address
3223 // It will be patched later with the throwing pc. The correct value is not
3224 // available now because loading it from memory would destroy registers.
3225 __ push(0);
3226
3227 // Save everything in sight.
3228 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3229
3230 // Now it is safe to overwrite any register
3231
3232 // Deopt during an exception. Save exec mode for unpack_frames.
3233 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
3234
3235 // load throwing pc from JavaThread and patch it as the return address
3236 // of the current frame. Then clear the field in JavaThread
3237
3238 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3239 __ movptr(Address(rbp, wordSize), rdx);
3240 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
3241
3242 #ifdef ASSERT
3243 // verify that there is really an exception oop in JavaThread
3244 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3245 __ verify_oop(rax);
3246
3247 // verify that there is no pending exception
3248 Label no_pending_exception;
3249 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3250 __ testptr(rax, rax);
3251 __ jcc(Assembler::zero, no_pending_exception);
3252 __ stop("must not have pending exception here");
3253 __ bind(no_pending_exception);
3254 #endif
3255
3256 __ bind(cont);
3257
3258 // Call C code. Need thread and this frame, but NOT official VM entry
3259 // crud. We cannot block on this call, no GC can happen.
3260 //
3261 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
3262
3263 // fetch_unroll_info needs to call last_java_frame().
3264
3265 __ set_last_Java_frame(noreg, noreg, NULL);
3266 #ifdef ASSERT
3267 { Label L;
3268 __ cmpptr(Address(r15_thread,
3269 JavaThread::last_Java_fp_offset()),
3270 (int32_t)0);
3271 __ jcc(Assembler::equal, L);
3272 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
3273 __ bind(L);
3274 }
3275 #endif // ASSERT
3276 __ mov(c_rarg0, r15_thread);
3277 __ movl(c_rarg1, r14); // exec_mode
3278 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
3279
3280 // Need to have an oopmap that tells fetch_unroll_info where to
3281 // find any register it might need.
3282 oop_maps->add_gc_map(__ pc() - start, map);
3283
3284 __ reset_last_Java_frame(false);
3285
3286 #if INCLUDE_JVMCI
3287 if (EnableJVMCI || UseAOT) {
3288 __ bind(after_fetch_unroll_info_call);
3289 }
3290 #endif
3291
3292 // Load UnrollBlock* into rdi
3293 __ mov(rdi, rax);
3294
3295 __ movl(r14, Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
3296 Label noException;
3297 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending?
3298 __ jcc(Assembler::notEqual, noException);
3299 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3300 // QQQ this is useless it was NULL above
3301 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3302 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
3303 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
3304
3305 __ verify_oop(rax);
3306
3307 // Overwrite the result registers with the exception results.
3308 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3309 // I think this is useless
3310 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
3311
3312 __ bind(noException);
3313
3314 // Only register save data is on the stack.
3315 // Now restore the result registers. Everything else is either dead
3316 // or captured in the vframeArray.
3317 RegisterSaver::restore_result_registers(masm);
3318
3319 // All of the register save area has been popped of the stack. Only the
3320 // return address remains.
3321
3322 // Pop all the frames we must move/replace.
3323 //
3324 // Frame picture (youngest to oldest)
3325 // 1: self-frame (no frame link)
3326 // 2: deopting frame (no frame link)
3327 // 3: caller of deopting frame (could be compiled/interpreted).
3328 //
3329 // Note: by leaving the return address of self-frame on the stack
3330 // and using the size of frame 2 to adjust the stack
3331 // when we are done the return to frame 3 will still be on the stack.
3332
3333 // Pop deoptimized frame
3334 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3335 __ addptr(rsp, rcx);
3336
3337 // rsp should be pointing at the return address to the caller (3)
3338
3339 // Pick up the initial fp we should save
3340 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3341 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3342
3343 #ifdef ASSERT
3344 // Compilers generate code that bang the stack by as much as the
3345 // interpreter would need. So this stack banging should never
3346 // trigger a fault. Verify that it does not on non product builds.
3347 if (UseStackBanging) {
3348 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3349 __ bang_stack_size(rbx, rcx);
3350 }
3351 #endif
3352
3353 // Load address of array of frame pcs into rcx
3354 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3355
3356 // Trash the old pc
3357 __ addptr(rsp, wordSize);
3358
3359 // Load address of array of frame sizes into rsi
3360 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3361
3362 // Load counter into rdx
3363 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3364
3365 // Now adjust the caller's stack to make up for the extra locals
3366 // but record the original sp so that we can save it in the skeletal interpreter
3367 // frame and the stack walking of interpreter_sender will get the unextended sp
3368 // value and not the "real" sp value.
3369
3370 const Register sender_sp = r8;
3371
3372 __ mov(sender_sp, rsp);
3373 __ movl(rbx, Address(rdi,
3374 Deoptimization::UnrollBlock::
3375 caller_adjustment_offset_in_bytes()));
3376 __ subptr(rsp, rbx);
3377
3378 // Push interpreter frames in a loop
3379 Label loop;
3380 __ bind(loop);
3381 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3382 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand
3383 __ pushptr(Address(rcx, 0)); // Save return address
3384 __ enter(); // Save old & set new ebp
3385 __ subptr(rsp, rbx); // Prolog
3386 // This value is corrected by layout_activation_impl
3387 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3388 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
3389 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
3390 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3391 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3392 __ decrementl(rdx); // Decrement counter
3393 __ jcc(Assembler::notZero, loop);
3394 __ pushptr(Address(rcx, 0)); // Save final return address
3395
3396 // Re-push self-frame
3397 __ enter(); // Save old & set new ebp
3398
3399 // Allocate a full sized register save area.
3400 // Return address and rbp are in place, so we allocate two less words.
3401 __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
3402
3403 // Restore frame locals after moving the frame
3404 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
3405 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3406
3407 // Call C code. Need thread but NOT official VM entry
3408 // crud. We cannot block on this call, no GC can happen. Call should
3409 // restore return values to their stack-slots with the new SP.
3410 //
3411 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
3412
3413 // Use rbp because the frames look interpreted now
3414 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3415 // Don't need the precise return PC here, just precise enough to point into this code blob.
3416 address the_pc = __ pc();
3417 __ set_last_Java_frame(noreg, rbp, the_pc);
3418
3419 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI
3420 __ mov(c_rarg0, r15_thread);
3421 __ movl(c_rarg1, r14); // second arg: exec_mode
3422 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3423 // Revert SP alignment after call since we're going to do some SP relative addressing below
3424 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset()));
3425
3426 // Set an oopmap for the call site
3427 // Use the same PC we used for the last java frame
3428 oop_maps->add_gc_map(the_pc - start,
3429 new OopMap( frame_size_in_words, 0 ));
3430
3431 // Clear fp AND pc
3432 __ reset_last_Java_frame(true);
3433
3434 // Collect return values
3435 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
3436 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
3437 // I think this is useless (throwing pc?)
3438 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
3439
3440 // Pop self-frame.
3441 __ leave(); // Epilog
3442
3443 // Jump to interpreter
3444 __ ret(0);
3445
3446 // Make sure all code is generated
3447 masm->flush();
3448
3449 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
3450 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3451 #if INCLUDE_JVMCI
3452 if (EnableJVMCI || UseAOT) {
3453 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
3454 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
3455 }
3456 #endif
3457 }
3458
3459 #ifdef COMPILER2
3460 //------------------------------generate_uncommon_trap_blob--------------------
3461 void SharedRuntime::generate_uncommon_trap_blob() {
3462 // Allocate space for the code
3463 ResourceMark rm;
3464 // Setup code generation tools
3465 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
3466 MacroAssembler* masm = new MacroAssembler(&buffer);
3467
3468 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3469
3470 address start = __ pc();
3471
3472 if (UseRTMLocking) {
3473 // Abort RTM transaction before possible nmethod deoptimization.
3474 __ xabort(0);
3475 }
3476
3477 // Push self-frame. We get here with a return address on the
3478 // stack, so rsp is 8-byte aligned until we allocate our frame.
3479 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
3480
3481 // No callee saved registers. rbp is assumed implicitly saved
3482 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3483
3484 // compiler left unloaded_class_index in j_rarg0 move to where the
3485 // runtime expects it.
3486 __ movl(c_rarg1, j_rarg0);
3487
3488 __ set_last_Java_frame(noreg, noreg, NULL);
3489
3490 // Call C code. Need thread but NOT official VM entry
3491 // crud. We cannot block on this call, no GC can happen. Call should
3492 // capture callee-saved registers as well as return values.
3493 // Thread is in rdi already.
3494 //
3495 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
3496
3497 __ mov(c_rarg0, r15_thread);
3498 __ movl(c_rarg2, Deoptimization::Unpack_uncommon_trap);
3499 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3500
3501 // Set an oopmap for the call site
3502 OopMapSet* oop_maps = new OopMapSet();
3503 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
3504
3505 // location of rbp is known implicitly by the frame sender code
3506
3507 oop_maps->add_gc_map(__ pc() - start, map);
3508
3509 __ reset_last_Java_frame(false);
3510
3511 // Load UnrollBlock* into rdi
3512 __ mov(rdi, rax);
3513
3514 #ifdef ASSERT
3515 { Label L;
3516 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
3517 (int32_t)Deoptimization::Unpack_uncommon_trap);
3518 __ jcc(Assembler::equal, L);
3519 __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
3520 __ bind(L);
3521 }
3522 #endif
3523
3524 // Pop all the frames we must move/replace.
3525 //
3526 // Frame picture (youngest to oldest)
3527 // 1: self-frame (no frame link)
3528 // 2: deopting frame (no frame link)
3529 // 3: caller of deopting frame (could be compiled/interpreted).
3530
3531 // Pop self-frame. We have no frame, and must rely only on rax and rsp.
3532 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
3533
3534 // Pop deoptimized frame (int)
3535 __ movl(rcx, Address(rdi,
3536 Deoptimization::UnrollBlock::
3537 size_of_deoptimized_frame_offset_in_bytes()));
3538 __ addptr(rsp, rcx);
3539
3540 // rsp should be pointing at the return address to the caller (3)
3541
3542 // Pick up the initial fp we should save
3543 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3544 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3545
3546 #ifdef ASSERT
3547 // Compilers generate code that bang the stack by as much as the
3548 // interpreter would need. So this stack banging should never
3549 // trigger a fault. Verify that it does not on non product builds.
3550 if (UseStackBanging) {
3551 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3552 __ bang_stack_size(rbx, rcx);
3553 }
3554 #endif
3555
3556 // Load address of array of frame pcs into rcx (address*)
3557 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3558
3559 // Trash the return pc
3560 __ addptr(rsp, wordSize);
3561
3562 // Load address of array of frame sizes into rsi (intptr_t*)
3563 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes()));
3564
3565 // Counter
3566 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int)
3567
3568 // Now adjust the caller's stack to make up for the extra locals but
3569 // record the original sp so that we can save it in the skeletal
3570 // interpreter frame and the stack walking of interpreter_sender
3571 // will get the unextended sp value and not the "real" sp value.
3572
3573 const Register sender_sp = r8;
3574
3575 __ mov(sender_sp, rsp);
3576 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int)
3577 __ subptr(rsp, rbx);
3578
3579 // Push interpreter frames in a loop
3580 Label loop;
3581 __ bind(loop);
3582 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3583 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand
3584 __ pushptr(Address(rcx, 0)); // Save return address
3585 __ enter(); // Save old & set new rbp
3586 __ subptr(rsp, rbx); // Prolog
3587 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
3588 sender_sp); // Make it walkable
3589 // This value is corrected by layout_activation_impl
3590 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3591 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
3592 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3593 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3594 __ decrementl(rdx); // Decrement counter
3595 __ jcc(Assembler::notZero, loop);
3596 __ pushptr(Address(rcx, 0)); // Save final return address
3597
3598 // Re-push self-frame
3599 __ enter(); // Save old & set new rbp
3600 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
3601 // Prolog
3602
3603 // Use rbp because the frames look interpreted now
3604 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3605 // Don't need the precise return PC here, just precise enough to point into this code blob.
3606 address the_pc = __ pc();
3607 __ set_last_Java_frame(noreg, rbp, the_pc);
3608
3609 // Call C code. Need thread but NOT official VM entry
3610 // crud. We cannot block on this call, no GC can happen. Call should
3611 // restore return values to their stack-slots with the new SP.
3612 // Thread is in rdi already.
3613 //
3614 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
3615
3616 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI
3617 __ mov(c_rarg0, r15_thread);
3618 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
3619 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3620
3621 // Set an oopmap for the call site
3622 // Use the same PC we used for the last java frame
3623 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3624
3625 // Clear fp AND pc
3626 __ reset_last_Java_frame(true);
3627
3628 // Pop self-frame.
3629 __ leave(); // Epilog
3630
3631 // Jump to interpreter
3632 __ ret(0);
3633
3634 // Make sure all code is generated
3635 masm->flush();
3636
3637 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
3638 SimpleRuntimeFrame::framesize >> 1);
3639 }
3640 #endif // COMPILER2
3641
3642
3643 //------------------------------generate_handler_blob------
3644 //
3645 // Generate a special Compile2Runtime blob that saves all registers,
3646 // and setup oopmap.
3647 //
3648 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3649 assert(StubRoutines::forward_exception_entry() != NULL,
3650 "must be generated before");
3651
3652 ResourceMark rm;
3653 OopMapSet *oop_maps = new OopMapSet();
3654 OopMap* map;
3655
3656 // Allocate space for the code. Setup code generation tools.
3657 CodeBuffer buffer("handler_blob", 2048, 1024);
3658 MacroAssembler* masm = new MacroAssembler(&buffer);
3659
3660 address start = __ pc();
3661 address call_pc = NULL;
3662 int frame_size_in_words;
3663 bool cause_return = (poll_type == POLL_AT_RETURN);
3664 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3665
3666 if (UseRTMLocking) {
3667 // Abort RTM transaction before calling runtime
3668 // because critical section will be large and will be
3669 // aborted anyway. Also nmethod could be deoptimized.
3670 __ xabort(0);
3671 }
3672
3673 // Make room for return address (or push it again)
3674 if (!cause_return) {
3675 __ push(rbx);
3676 }
3677
3678 // Save registers, fpu state, and flags
3679 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors);
3680
3681 // The following is basically a call_VM. However, we need the precise
3682 // address of the call in order to generate an oopmap. Hence, we do all the
3683 // work outselves.
3684
3685 __ set_last_Java_frame(noreg, noreg, NULL);
3686
3687 // The return address must always be correct so that frame constructor never
3688 // sees an invalid pc.
3689
3690 if (!cause_return) {
3691 // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
3692 // Additionally, rbx is a callee saved register and we can look at it later to determine
3693 // if someone changed the return address for us!
3694 __ movptr(rbx, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
3695 __ movptr(Address(rbp, wordSize), rbx);
3696 }
3697
3698 // Do the call
3699 __ mov(c_rarg0, r15_thread);
3700 __ call(RuntimeAddress(call_ptr));
3701
3702 // Set an oopmap for the call site. This oopmap will map all
3703 // oop-registers and debug-info registers as callee-saved. This
3704 // will allow deoptimization at this safepoint to find all possible
3705 // debug-info recordings, as well as let GC find all oops.
3706
3707 oop_maps->add_gc_map( __ pc() - start, map);
3708
3709 Label noException;
3710
3711 __ reset_last_Java_frame(false);
3712
3713 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3714 __ jcc(Assembler::equal, noException);
3715
3716 // Exception pending
3717
3718 RegisterSaver::restore_live_registers(masm, save_vectors);
3719
3720 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3721
3722 // No exception case
3723 __ bind(noException);
3724
3725 Label no_adjust, bail, no_prefix, not_special;
3726 if (SafepointMechanism::uses_thread_local_poll() && !cause_return) {
3727 // If our stashed return pc was modified by the runtime we avoid touching it
3728 __ cmpptr(rbx, Address(rbp, wordSize));
3729 __ jccb(Assembler::notEqual, no_adjust);
3730
3731 // Skip over the poll instruction.
3732 // See NativeInstruction::is_safepoint_poll()
3733 // Possible encodings:
3734 // 85 00 test %eax,(%rax)
3735 // 85 01 test %eax,(%rcx)
3736 // 85 02 test %eax,(%rdx)
3737 // 85 03 test %eax,(%rbx)
3738 // 85 06 test %eax,(%rsi)
3739 // 85 07 test %eax,(%rdi)
3740 //
3741 // 41 85 00 test %eax,(%r8)
3742 // 41 85 01 test %eax,(%r9)
3743 // 41 85 02 test %eax,(%r10)
3744 // 41 85 03 test %eax,(%r11)
3745 // 41 85 06 test %eax,(%r14)
3746 // 41 85 07 test %eax,(%r15)
3747 //
3748 // 85 04 24 test %eax,(%rsp)
3749 // 41 85 04 24 test %eax,(%r12)
3750 // 85 45 00 test %eax,0x0(%rbp)
3751 // 41 85 45 00 test %eax,0x0(%r13)
3752
3753 __ cmpb(Address(rbx, 0), NativeTstRegMem::instruction_rex_b_prefix);
3754 __ jcc(Assembler::notEqual, no_prefix);
3755 __ addptr(rbx, 1);
3756 __ bind(no_prefix);
3757 #ifdef ASSERT
3758 __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
3759 #endif
3760 // r12/r13/rsp/rbp base encoding takes 3 bytes with the following register values:
3761 // r12/rsp 0x04
3762 // r13/rbp 0x05
3763 __ movzbq(rcx, Address(rbx, 1));
3764 __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
3765 __ subptr(rcx, 4); // looking for 0x00 .. 0x01
3766 __ cmpptr(rcx, 1);
3767 __ jcc(Assembler::above, not_special);
3768 __ addptr(rbx, 1);
3769 __ bind(not_special);
3770 #ifdef ASSERT
3771 // Verify the correct encoding of the poll we're about to skip.
3772 __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
3773 __ jcc(Assembler::notEqual, bail);
3774 // Mask out the modrm bits
3775 __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
3776 // rax encodes to 0, so if the bits are nonzero it's incorrect
3777 __ jcc(Assembler::notZero, bail);
3778 #endif
3779 // Adjust return pc forward to step over the safepoint poll instruction
3780 __ addptr(rbx, 2);
3781 __ movptr(Address(rbp, wordSize), rbx);
3782 }
3783
3784 __ bind(no_adjust);
3785 // Normal exit, restore registers and exit.
3786 RegisterSaver::restore_live_registers(masm, save_vectors);
3787 __ ret(0);
3788
3789 #ifdef ASSERT
3790 __ bind(bail);
3791 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
3792 #endif
3793
3794 // Make sure all code is generated
3795 masm->flush();
3796
3797 // Fill-out other meta info
3798 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3799 }
3800
3801 //
3802 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3803 //
3804 // Generate a stub that calls into vm to find out the proper destination
3805 // of a java call. All the argument registers are live at this point
3806 // but since this is generic code we don't know what they are and the caller
3807 // must do any gc of the args.
3808 //
3809 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3810 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3811
3812 // allocate space for the code
3813 ResourceMark rm;
3814
3815 CodeBuffer buffer(name, 1000, 512);
3816 MacroAssembler* masm = new MacroAssembler(&buffer);
3817
3818 int frame_size_in_words;
3819
3820 OopMapSet *oop_maps = new OopMapSet();
3821 OopMap* map = NULL;
3822
3823 int start = __ offset();
3824
3825 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3826
3827 int frame_complete = __ offset();
3828
3829 __ set_last_Java_frame(noreg, noreg, NULL);
3830
3831 __ mov(c_rarg0, r15_thread);
3832
3833 __ call(RuntimeAddress(destination));
3834
3835
3836 // Set an oopmap for the call site.
3837 // We need this not only for callee-saved registers, but also for volatile
3838 // registers that the compiler might be keeping live across a safepoint.
3839
3840 oop_maps->add_gc_map( __ offset() - start, map);
3841
3842 // rax contains the address we are going to jump to assuming no exception got installed
3843
3844 // clear last_Java_sp
3845 __ reset_last_Java_frame(false);
3846 // check for pending exceptions
3847 Label pending;
3848 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3849 __ jcc(Assembler::notEqual, pending);
3850
3851 // get the returned Method*
3852 __ get_vm_result_2(rbx, r15_thread);
3853 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
3854
3855 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3856
3857 RegisterSaver::restore_live_registers(masm);
3858
3859 // We are back the the original state on entry and ready to go.
3860
3861 __ jmp(rax);
3862
3863 // Pending exception after the safepoint
3864
3865 __ bind(pending);
3866
3867 RegisterSaver::restore_live_registers(masm);
3868
3869 // exception pending => remove activation and forward to exception handler
3870
3871 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
3872
3873 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3874 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3875
3876 // -------------
3877 // make sure all code is generated
3878 masm->flush();
3879
3880 // return the blob
3881 // frame_size_words or bytes??
3882 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3883 }
3884
3885
3886 //------------------------------Montgomery multiplication------------------------
3887 //
3888
3889 #ifndef _WINDOWS
3890
3891 #define ASM_SUBTRACT
3892
3893 #ifdef ASM_SUBTRACT
3894 // Subtract 0:b from carry:a. Return carry.
3895 static unsigned long
3896 sub(unsigned long a[], unsigned long b[], unsigned long carry, long len) {
3897 long i = 0, cnt = len;
3898 unsigned long tmp;
3899 asm volatile("clc; "
3900 "0: ; "
3901 "mov (%[b], %[i], 8), %[tmp]; "
3902 "sbb %[tmp], (%[a], %[i], 8); "
3903 "inc %[i]; dec %[cnt]; "
3904 "jne 0b; "
3905 "mov %[carry], %[tmp]; sbb $0, %[tmp]; "
3906 : [i]"+r"(i), [cnt]"+r"(cnt), [tmp]"=&r"(tmp)
3907 : [a]"r"(a), [b]"r"(b), [carry]"r"(carry)
3908 : "memory");
3909 return tmp;
3910 }
3911 #else // ASM_SUBTRACT
3912 typedef int __attribute__((mode(TI))) int128;
3913
3914 // Subtract 0:b from carry:a. Return carry.
3915 static unsigned long
3916 sub(unsigned long a[], unsigned long b[], unsigned long carry, int len) {
3917 int128 tmp = 0;
3918 int i;
3919 for (i = 0; i < len; i++) {
3920 tmp += a[i];
3921 tmp -= b[i];
3922 a[i] = tmp;
3923 tmp >>= 64;
3924 assert(-1 <= tmp && tmp <= 0, "invariant");
3925 }
3926 return tmp + carry;
3927 }
3928 #endif // ! ASM_SUBTRACT
3929
3930 // Multiply (unsigned) Long A by Long B, accumulating the double-
3931 // length result into the accumulator formed of T0, T1, and T2.
3932 #define MACC(A, B, T0, T1, T2) \
3933 do { \
3934 unsigned long hi, lo; \
3935 __asm__ ("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4" \
3936 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \
3937 : "r"(A), "a"(B) : "cc"); \
3938 } while(0)
3939
3940 // As above, but add twice the double-length result into the
3941 // accumulator.
3942 #define MACC2(A, B, T0, T1, T2) \
3943 do { \
3944 unsigned long hi, lo; \
3945 __asm__ ("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4; " \
3946 "add %%rax, %2; adc %%rdx, %3; adc $0, %4" \
3947 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \
3948 : "r"(A), "a"(B) : "cc"); \
3949 } while(0)
3950
3951 // Fast Montgomery multiplication. The derivation of the algorithm is
3952 // in A Cryptographic Library for the Motorola DSP56000,
3953 // Dusse and Kaliski, Proc. EUROCRYPT 90, pp. 230-237.
3954
3955 static void __attribute__((noinline))
3956 montgomery_multiply(unsigned long a[], unsigned long b[], unsigned long n[],
3957 unsigned long m[], unsigned long inv, int len) {
3958 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3959 int i;
3960
3961 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3962
3963 for (i = 0; i < len; i++) {
3964 int j;
3965 for (j = 0; j < i; j++) {
3966 MACC(a[j], b[i-j], t0, t1, t2);
3967 MACC(m[j], n[i-j], t0, t1, t2);
3968 }
3969 MACC(a[i], b[0], t0, t1, t2);
3970 m[i] = t0 * inv;
3971 MACC(m[i], n[0], t0, t1, t2);
3972
3973 assert(t0 == 0, "broken Montgomery multiply");
3974
3975 t0 = t1; t1 = t2; t2 = 0;
3976 }
3977
3978 for (i = len; i < 2*len; i++) {
3979 int j;
3980 for (j = i-len+1; j < len; j++) {
3981 MACC(a[j], b[i-j], t0, t1, t2);
3982 MACC(m[j], n[i-j], t0, t1, t2);
3983 }
3984 m[i-len] = t0;
3985 t0 = t1; t1 = t2; t2 = 0;
3986 }
3987
3988 while (t0)
3989 t0 = sub(m, n, t0, len);
3990 }
3991
3992 // Fast Montgomery squaring. This uses asymptotically 25% fewer
3993 // multiplies so it should be up to 25% faster than Montgomery
3994 // multiplication. However, its loop control is more complex and it
3995 // may actually run slower on some machines.
3996
3997 static void __attribute__((noinline))
3998 montgomery_square(unsigned long a[], unsigned long n[],
3999 unsigned long m[], unsigned long inv, int len) {
4000 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
4001 int i;
4002
4003 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
4004
4005 for (i = 0; i < len; i++) {
4006 int j;
4007 int end = (i+1)/2;
4008 for (j = 0; j < end; j++) {
4009 MACC2(a[j], a[i-j], t0, t1, t2);
4010 MACC(m[j], n[i-j], t0, t1, t2);
4011 }
4012 if ((i & 1) == 0) {
4013 MACC(a[j], a[j], t0, t1, t2);
4014 }
4015 for (; j < i; j++) {
4016 MACC(m[j], n[i-j], t0, t1, t2);
4017 }
4018 m[i] = t0 * inv;
4019 MACC(m[i], n[0], t0, t1, t2);
4020
4021 assert(t0 == 0, "broken Montgomery square");
4022
4023 t0 = t1; t1 = t2; t2 = 0;
4024 }
4025
4026 for (i = len; i < 2*len; i++) {
4027 int start = i-len+1;
4028 int end = start + (len - start)/2;
4029 int j;
4030 for (j = start; j < end; j++) {
4031 MACC2(a[j], a[i-j], t0, t1, t2);
4032 MACC(m[j], n[i-j], t0, t1, t2);
4033 }
4034 if ((i & 1) == 0) {
4035 MACC(a[j], a[j], t0, t1, t2);
4036 }
4037 for (; j < len; j++) {
4038 MACC(m[j], n[i-j], t0, t1, t2);
4039 }
4040 m[i-len] = t0;
4041 t0 = t1; t1 = t2; t2 = 0;
4042 }
4043
4044 while (t0)
4045 t0 = sub(m, n, t0, len);
4046 }
4047
4048 // Swap words in a longword.
4049 static unsigned long swap(unsigned long x) {
4050 return (x << 32) | (x >> 32);
4051 }
4052
4053 // Copy len longwords from s to d, word-swapping as we go. The
4054 // destination array is reversed.
4055 static void reverse_words(unsigned long *s, unsigned long *d, int len) {
4056 d += len;
4057 while(len-- > 0) {
4058 d--;
4059 *d = swap(*s);
4060 s++;
4061 }
4062 }
4063
4064 // The threshold at which squaring is advantageous was determined
4065 // experimentally on an i7-3930K (Ivy Bridge) CPU @ 3.5GHz.
4066 #define MONTGOMERY_SQUARING_THRESHOLD 64
4067
4068 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints,
4069 jint len, jlong inv,
4070 jint *m_ints) {
4071 assert(len % 2 == 0, "array length in montgomery_multiply must be even");
4072 int longwords = len/2;
4073
4074 // Make very sure we don't use so much space that the stack might
4075 // overflow. 512 jints corresponds to an 16384-bit integer and
4076 // will use here a total of 8k bytes of stack space.
4077 int total_allocation = longwords * sizeof (unsigned long) * 4;
4078 guarantee(total_allocation <= 8192, "must be");
4079 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
4080
4081 // Local scratch arrays
4082 unsigned long
4083 *a = scratch + 0 * longwords,
4084 *b = scratch + 1 * longwords,
4085 *n = scratch + 2 * longwords,
4086 *m = scratch + 3 * longwords;
4087
4088 reverse_words((unsigned long *)a_ints, a, longwords);
4089 reverse_words((unsigned long *)b_ints, b, longwords);
4090 reverse_words((unsigned long *)n_ints, n, longwords);
4091
4092 ::montgomery_multiply(a, b, n, m, (unsigned long)inv, longwords);
4093
4094 reverse_words(m, (unsigned long *)m_ints, longwords);
4095 }
4096
4097 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints,
4098 jint len, jlong inv,
4099 jint *m_ints) {
4100 assert(len % 2 == 0, "array length in montgomery_square must be even");
4101 int longwords = len/2;
4102
4103 // Make very sure we don't use so much space that the stack might
4104 // overflow. 512 jints corresponds to an 16384-bit integer and
4105 // will use here a total of 6k bytes of stack space.
4106 int total_allocation = longwords * sizeof (unsigned long) * 3;
4107 guarantee(total_allocation <= 8192, "must be");
4108 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
4109
4110 // Local scratch arrays
4111 unsigned long
4112 *a = scratch + 0 * longwords,
4113 *n = scratch + 1 * longwords,
4114 *m = scratch + 2 * longwords;
4115
4116 reverse_words((unsigned long *)a_ints, a, longwords);
4117 reverse_words((unsigned long *)n_ints, n, longwords);
4118
4119 if (len >= MONTGOMERY_SQUARING_THRESHOLD) {
4120 ::montgomery_square(a, n, m, (unsigned long)inv, longwords);
4121 } else {
4122 ::montgomery_multiply(a, a, n, m, (unsigned long)inv, longwords);
4123 }
4124
4125 reverse_words(m, (unsigned long *)m_ints, longwords);
4126 }
4127
4128 #endif // WINDOWS
4129
4130 #ifdef COMPILER2
4131 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
4132 //
4133 //------------------------------generate_exception_blob---------------------------
4134 // creates exception blob at the end
4135 // Using exception blob, this code is jumped from a compiled method.
4136 // (see emit_exception_handler in x86_64.ad file)
4137 //
4138 // Given an exception pc at a call we call into the runtime for the
4139 // handler in this method. This handler might merely restore state
4140 // (i.e. callee save registers) unwind the frame and jump to the
4141 // exception handler for the nmethod if there is no Java level handler
4142 // for the nmethod.
4143 //
4144 // This code is entered with a jmp.
4145 //
4146 // Arguments:
4147 // rax: exception oop
4148 // rdx: exception pc
4149 //
4150 // Results:
4151 // rax: exception oop
4152 // rdx: exception pc in caller or ???
4153 // destination: exception handler of caller
4154 //
4155 // Note: the exception pc MUST be at a call (precise debug information)
4156 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
4157 //
4158
4159 void OptoRuntime::generate_exception_blob() {
4160 assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
4161 assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
4162 assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
4163
4164 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
4165
4166 // Allocate space for the code
4167 ResourceMark rm;
4168 // Setup code generation tools
4169 CodeBuffer buffer("exception_blob", 2048, 1024);
4170 MacroAssembler* masm = new MacroAssembler(&buffer);
4171
4172
4173 address start = __ pc();
4174
4175 // Exception pc is 'return address' for stack walker
4176 __ push(rdx);
4177 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
4178
4179 // Save callee-saved registers. See x86_64.ad.
4180
4181 // rbp is an implicitly saved callee saved register (i.e., the calling
4182 // convention will save/restore it in the prolog/epilog). Other than that
4183 // there are no callee save registers now that adapter frames are gone.
4184
4185 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
4186
4187 // Store exception in Thread object. We cannot pass any arguments to the
4188 // handle_exception call, since we do not want to make any assumption
4189 // about the size of the frame where the exception happened in.
4190 // c_rarg0 is either rdi (Linux) or rcx (Windows).
4191 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
4192 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
4193
4194 // This call does all the hard work. It checks if an exception handler
4195 // exists in the method.
4196 // If so, it returns the handler address.
4197 // If not, it prepares for stack-unwinding, restoring the callee-save
4198 // registers of the frame being removed.
4199 //
4200 // address OptoRuntime::handle_exception_C(JavaThread* thread)
4201
4202 // At a method handle call, the stack may not be properly aligned
4203 // when returning with an exception.
4204 address the_pc = __ pc();
4205 __ set_last_Java_frame(noreg, noreg, the_pc);
4206 __ mov(c_rarg0, r15_thread);
4207 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
4208 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
4209
4210 // Set an oopmap for the call site. This oopmap will only be used if we
4211 // are unwinding the stack. Hence, all locations will be dead.
4212 // Callee-saved registers will be the same as the frame above (i.e.,
4213 // handle_exception_stub), since they were restored when we got the
4214 // exception.
4215
4216 OopMapSet* oop_maps = new OopMapSet();
4217
4218 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
4219
4220 __ reset_last_Java_frame(false);
4221
4222 // Restore callee-saved registers
4223
4224 // rbp is an implicitly saved callee-saved register (i.e., the calling
4225 // convention will save restore it in prolog/epilog) Other than that
4226 // there are no callee save registers now that adapter frames are gone.
4227
4228 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
4229
4230 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
4231 __ pop(rdx); // No need for exception pc anymore
4232
4233 // rax: exception handler
4234
4235 // We have a handler in rax (could be deopt blob).
4236 __ mov(r8, rax);
4237
4238 // Get the exception oop
4239 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
4240 // Get the exception pc in case we are deoptimized
4241 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
4242 #ifdef ASSERT
4243 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
4244 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
4245 #endif
4246 // Clear the exception oop so GC no longer processes it as a root.
4247 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
4248
4249 // rax: exception oop
4250 // r8: exception handler
4251 // rdx: exception pc
4252 // Jump to handler
4253
4254 __ jmp(r8);
4255
4256 // Make sure all code is generated
4257 masm->flush();
4258
4259 // Set exception blob
4260 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
4261 }
4262 #endif // COMPILER2
4263
4264 BufferedValueTypeBlob* SharedRuntime::generate_buffered_value_type_adapter(const ValueKlass* vk) {
4265 BufferBlob* buf = BufferBlob::create("value types pack/unpack", 16 * K);
4266 CodeBuffer buffer(buf);
4267 short buffer_locs[20];
4268 buffer.insts()->initialize_shared_locs((relocInfo*)buffer_locs,
4269 sizeof(buffer_locs)/sizeof(relocInfo));
4270
4271 MacroAssembler _masm(&buffer);
4272 MacroAssembler* masm = &_masm;
4273
4274 const Array<SigEntry>* sig_vk = vk->extended_sig();
4275 const Array<VMRegPair>* regs = vk->return_regs();
4276
4277 int pack_fields_off = __ offset();
4278
4279 int j = 1;
4280 for (int i = 0; i < sig_vk->length(); i++) {
4281 BasicType bt = sig_vk->at(i)._bt;
4282 if (bt == T_VALUETYPE) {
4283 continue;
4284 }
4285 if (bt == T_VOID) {
4286 if (sig_vk->at(i-1)._bt == T_LONG ||
4287 sig_vk->at(i-1)._bt == T_DOUBLE) {
4288 j++;
4289 }
4290 continue;
4291 }
4292 int off = sig_vk->at(i)._offset;
4293 VMRegPair pair = regs->at(j);
4294 VMReg r_1 = pair.first();
4295 VMReg r_2 = pair.second();
4296 Address to(rax, off);
4297 if (bt == T_FLOAT) {
4298 __ movflt(to, r_1->as_XMMRegister());
4299 } else if (bt == T_DOUBLE) {
4300 __ movdbl(to, r_1->as_XMMRegister());
4301 } else if (bt == T_OBJECT || bt == T_VALUETYPEPTR || bt == T_ARRAY) {
4302 __ store_heap_oop(to, r_1->as_Register());
4303 } else {
4304 assert(is_java_primitive(bt), "unexpected basic type");
4305 size_t size_in_bytes = type2aelembytes(bt);
4306 __ store_sized_value(to, r_1->as_Register(), size_in_bytes);
4307 }
4308 j++;
4309 }
4310 assert(j == regs->length(), "missed a field?");
4311
4312 __ ret(0);
4313
4314 int unpack_fields_off = __ offset();
4315
4316 j = 1;
4317 for (int i = 0; i < sig_vk->length(); i++) {
4318 BasicType bt = sig_vk->at(i)._bt;
4319 if (bt == T_VALUETYPE) {
4320 continue;
4321 }
4322 if (bt == T_VOID) {
4323 if (sig_vk->at(i-1)._bt == T_LONG ||
4324 sig_vk->at(i-1)._bt == T_DOUBLE) {
4325 j++;
4326 }
4327 continue;
4328 }
4329 int off = sig_vk->at(i)._offset;
4330 VMRegPair pair = regs->at(j);
4331 VMReg r_1 = pair.first();
4332 VMReg r_2 = pair.second();
4333 Address from(rax, off);
4334 if (bt == T_FLOAT) {
4335 __ movflt(r_1->as_XMMRegister(), from);
4336 } else if (bt == T_DOUBLE) {
4337 __ movdbl(r_1->as_XMMRegister(), from);
4338 } else if (bt == T_OBJECT || bt == T_VALUETYPEPTR || bt == T_ARRAY) {
4339 __ load_heap_oop(r_1->as_Register(), from);
4340 } else {
4341 assert(is_java_primitive(bt), "unexpected basic type");
4342 size_t size_in_bytes = type2aelembytes(bt);
4343 __ load_sized_value(r_1->as_Register(), from, size_in_bytes, bt != T_CHAR && bt != T_BOOLEAN);
4344 }
4345 j++;
4346 }
4347 assert(j == regs->length(), "missed a field?");
4348
4349 if (StressValueTypeReturnedAsFields) {
4350 __ load_klass(rax, rax);
4351 __ orptr(rax, 1);
4352 }
4353
4354 __ ret(0);
4355
4356 __ flush();
4357
4358 return BufferedValueTypeBlob::create(&buffer, pack_fields_off, unpack_fields_off);
4359 }