1683 assert(code == lir_add, "unsupported operation");
1684 assert(right->is_constant(), "unsupported operand");
1685 jint c = right->as_constant_ptr()->as_jint();
1686 LIR_Address* lir_addr = left->as_address_ptr();
1687 Address addr = as_Address(lir_addr);
1688 switch (lir_addr->type()) {
1689 case T_INT:
1690 __ add2mem_32(addr, c, Z_R1_scratch);
1691 break;
1692 case T_LONG:
1693 __ add2mem_64(addr, c, Z_R1_scratch);
1694 break;
1695 default:
1696 ShouldNotReachHere();
1697 }
1698 } else {
1699 ShouldNotReachHere();
1700 }
1701 }
1702
1703 void LIR_Assembler::fpop() {
1704 // do nothing
1705 }
1706
1707 void LIR_Assembler::intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr thread, LIR_Opr dest, LIR_Op* op) {
1708 switch (code) {
1709 case lir_sqrt: {
1710 assert(!thread->is_valid(), "there is no need for a thread_reg for dsqrt");
1711 FloatRegister src_reg = value->as_double_reg();
1712 FloatRegister dst_reg = dest->as_double_reg();
1713 __ z_sqdbr(dst_reg, src_reg);
1714 break;
1715 }
1716 case lir_abs: {
1717 assert(!thread->is_valid(), "there is no need for a thread_reg for fabs");
1718 FloatRegister src_reg = value->as_double_reg();
1719 FloatRegister dst_reg = dest->as_double_reg();
1720 __ z_lpdbr(dst_reg, src_reg);
1721 break;
1722 }
1723 default: {
1724 ShouldNotReachHere();
1725 break;
1726 }
2724 if (UseCompressedOops) {
2725 t1_cmp = op->tmp1()->as_register();
2726 Register t2_new = op->tmp2()->as_register();
2727 assert_different_registers(cmp_value, new_value, addr, t1_cmp, t2_new);
2728 __ oop_encoder(t1_cmp, cmp_value, true /*maybe null*/);
2729 __ oop_encoder(t2_new, new_value, true /*maybe null*/);
2730 __ z_cs(t1_cmp, t2_new, 0, addr);
2731 } else {
2732 __ z_lgr(t1_cmp, cmp_value);
2733 __ z_csg(t1_cmp, new_value, 0, addr);
2734 }
2735 } else {
2736 __ z_lr(t1_cmp, cmp_value);
2737 __ z_cs(t1_cmp, new_value, 0, addr);
2738 }
2739 } else {
2740 ShouldNotReachHere(); // new lir_cas_??
2741 }
2742 }
2743
2744 void LIR_Assembler::set_24bit_FPU() {
2745 ShouldNotCallThis(); // x86 only
2746 }
2747
2748 void LIR_Assembler::reset_FPU() {
2749 ShouldNotCallThis(); // x86 only
2750 }
2751
2752 void LIR_Assembler::breakpoint() {
2753 Unimplemented();
2754 // __ breakpoint_trap();
2755 }
2756
2757 void LIR_Assembler::push(LIR_Opr opr) {
2758 ShouldNotCallThis(); // unused
2759 }
2760
2761 void LIR_Assembler::pop(LIR_Opr opr) {
2762 ShouldNotCallThis(); // unused
2763 }
2764
2765 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst_opr) {
2766 Address addr = frame_map()->address_for_monitor_lock(monitor_no);
2767 __ add2reg(dst_opr->as_register(), addr.disp(), addr.base());
2768 }
2769
2770 void LIR_Assembler::emit_lock(LIR_OpLock* op) {
2771 Register obj = op->obj_opr()->as_register(); // May not be an oop.
2872 ShouldNotCallThis(); // There are no delay slots on ZARCH_64.
2873 }
2874
2875 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2876 // tmp must be unused
2877 assert(tmp->is_illegal(), "wasting a register if tmp is allocated");
2878 assert(left->is_register(), "can only handle registers");
2879
2880 if (left->is_single_cpu()) {
2881 __ z_lcr(dest->as_register(), left->as_register());
2882 } else if (left->is_single_fpu()) {
2883 __ z_lcebr(dest->as_float_reg(), left->as_float_reg());
2884 } else if (left->is_double_fpu()) {
2885 __ z_lcdbr(dest->as_double_reg(), left->as_double_reg());
2886 } else {
2887 assert(left->is_double_cpu(), "Must be a long");
2888 __ z_lcgr(dest->as_register_lo(), left->as_register_lo());
2889 }
2890 }
2891
2892 void LIR_Assembler::fxch(int i) {
2893 ShouldNotCallThis(); // x86 only
2894 }
2895
2896 void LIR_Assembler::fld(int i) {
2897 ShouldNotCallThis(); // x86 only
2898 }
2899
2900 void LIR_Assembler::ffree(int i) {
2901 ShouldNotCallThis(); // x86 only
2902 }
2903
2904 void LIR_Assembler::rt_call(LIR_Opr result, address dest,
2905 const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info) {
2906 assert(!tmp->is_valid(), "don't need temporary");
2907 emit_call_c(dest);
2908 CHECK_BAILOUT();
2909 if (info != NULL) {
2910 add_call_info_here(info);
2911 }
2912 }
2913
2914 void LIR_Assembler::volatile_move_op(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info) {
2915 ShouldNotCallThis(); // not needed on ZARCH_64
2916 }
2917
2918 void LIR_Assembler::membar() {
2919 __ z_fence();
2920 }
2921
2922 void LIR_Assembler::membar_acquire() {
2923 __ z_acquire();
|
1683 assert(code == lir_add, "unsupported operation");
1684 assert(right->is_constant(), "unsupported operand");
1685 jint c = right->as_constant_ptr()->as_jint();
1686 LIR_Address* lir_addr = left->as_address_ptr();
1687 Address addr = as_Address(lir_addr);
1688 switch (lir_addr->type()) {
1689 case T_INT:
1690 __ add2mem_32(addr, c, Z_R1_scratch);
1691 break;
1692 case T_LONG:
1693 __ add2mem_64(addr, c, Z_R1_scratch);
1694 break;
1695 default:
1696 ShouldNotReachHere();
1697 }
1698 } else {
1699 ShouldNotReachHere();
1700 }
1701 }
1702
1703 void LIR_Assembler::intrinsic_op(LIR_Code code, LIR_Opr value, LIR_Opr thread, LIR_Opr dest, LIR_Op* op) {
1704 switch (code) {
1705 case lir_sqrt: {
1706 assert(!thread->is_valid(), "there is no need for a thread_reg for dsqrt");
1707 FloatRegister src_reg = value->as_double_reg();
1708 FloatRegister dst_reg = dest->as_double_reg();
1709 __ z_sqdbr(dst_reg, src_reg);
1710 break;
1711 }
1712 case lir_abs: {
1713 assert(!thread->is_valid(), "there is no need for a thread_reg for fabs");
1714 FloatRegister src_reg = value->as_double_reg();
1715 FloatRegister dst_reg = dest->as_double_reg();
1716 __ z_lpdbr(dst_reg, src_reg);
1717 break;
1718 }
1719 default: {
1720 ShouldNotReachHere();
1721 break;
1722 }
2720 if (UseCompressedOops) {
2721 t1_cmp = op->tmp1()->as_register();
2722 Register t2_new = op->tmp2()->as_register();
2723 assert_different_registers(cmp_value, new_value, addr, t1_cmp, t2_new);
2724 __ oop_encoder(t1_cmp, cmp_value, true /*maybe null*/);
2725 __ oop_encoder(t2_new, new_value, true /*maybe null*/);
2726 __ z_cs(t1_cmp, t2_new, 0, addr);
2727 } else {
2728 __ z_lgr(t1_cmp, cmp_value);
2729 __ z_csg(t1_cmp, new_value, 0, addr);
2730 }
2731 } else {
2732 __ z_lr(t1_cmp, cmp_value);
2733 __ z_cs(t1_cmp, new_value, 0, addr);
2734 }
2735 } else {
2736 ShouldNotReachHere(); // new lir_cas_??
2737 }
2738 }
2739
2740 void LIR_Assembler::breakpoint() {
2741 Unimplemented();
2742 // __ breakpoint_trap();
2743 }
2744
2745 void LIR_Assembler::push(LIR_Opr opr) {
2746 ShouldNotCallThis(); // unused
2747 }
2748
2749 void LIR_Assembler::pop(LIR_Opr opr) {
2750 ShouldNotCallThis(); // unused
2751 }
2752
2753 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst_opr) {
2754 Address addr = frame_map()->address_for_monitor_lock(monitor_no);
2755 __ add2reg(dst_opr->as_register(), addr.disp(), addr.base());
2756 }
2757
2758 void LIR_Assembler::emit_lock(LIR_OpLock* op) {
2759 Register obj = op->obj_opr()->as_register(); // May not be an oop.
2860 ShouldNotCallThis(); // There are no delay slots on ZARCH_64.
2861 }
2862
2863 void LIR_Assembler::negate(LIR_Opr left, LIR_Opr dest, LIR_Opr tmp) {
2864 // tmp must be unused
2865 assert(tmp->is_illegal(), "wasting a register if tmp is allocated");
2866 assert(left->is_register(), "can only handle registers");
2867
2868 if (left->is_single_cpu()) {
2869 __ z_lcr(dest->as_register(), left->as_register());
2870 } else if (left->is_single_fpu()) {
2871 __ z_lcebr(dest->as_float_reg(), left->as_float_reg());
2872 } else if (left->is_double_fpu()) {
2873 __ z_lcdbr(dest->as_double_reg(), left->as_double_reg());
2874 } else {
2875 assert(left->is_double_cpu(), "Must be a long");
2876 __ z_lcgr(dest->as_register_lo(), left->as_register_lo());
2877 }
2878 }
2879
2880 void LIR_Assembler::rt_call(LIR_Opr result, address dest,
2881 const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info) {
2882 assert(!tmp->is_valid(), "don't need temporary");
2883 emit_call_c(dest);
2884 CHECK_BAILOUT();
2885 if (info != NULL) {
2886 add_call_info_here(info);
2887 }
2888 }
2889
2890 void LIR_Assembler::volatile_move_op(LIR_Opr src, LIR_Opr dest, BasicType type, CodeEmitInfo* info) {
2891 ShouldNotCallThis(); // not needed on ZARCH_64
2892 }
2893
2894 void LIR_Assembler::membar() {
2895 __ z_fence();
2896 }
2897
2898 void LIR_Assembler::membar_acquire() {
2899 __ z_acquire();
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