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src/hotspot/cpu/x86/macroAssembler_x86.cpp
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@@ -347,28 +347,17 @@
pop(rdx);
pop(rdi);
pop(rsi);
}
-void MacroAssembler::pop_fTOS() {
- fld_d(Address(rsp, 0));
- addl(rsp, 2 * wordSize);
-}
-
void MacroAssembler::push_callee_saved_registers() {
push(rsi);
push(rdi);
push(rdx);
push(rcx);
}
-void MacroAssembler::push_fTOS() {
- subl(rsp, 2 * wordSize);
- fstp_d(Address(rsp, 0));
-}
-
-
void MacroAssembler::pushoop(jobject obj) {
push_literal32((int32_t)obj, oop_Relocation::spec_for_immediate());
}
void MacroAssembler::pushklass(Metadata* obj) {
@@ -2733,20 +2722,19 @@
lea(rscratch1, src);
Assembler::divss(dst, Address(rscratch1, 0));
}
}
-// !defined(COMPILER2) is because of stupid core builds
-#if !defined(_LP64) || defined(COMPILER1) || !defined(COMPILER2) || INCLUDE_JVMCI
+#ifndef _LP64
void MacroAssembler::empty_FPU_stack() {
if (VM_Version::supports_mmx()) {
emms();
} else {
for (int i = 8; i-- > 0; ) ffree(i);
}
}
-#endif // !LP64 || C1 || !C2 || INCLUDE_JVMCI
+#endif // !LP64
void MacroAssembler::enter() {
push(rbp);
mov(rbp, rsp);
@@ -2763,10 +2751,11 @@
emit_int8(0x65); // gs:
emit_int8((unsigned char)0x90);
}
}
+#if !defined(_LP64)
void MacroAssembler::fcmp(Register tmp) {
fcmp(tmp, 1, true, true);
}
void MacroAssembler::fcmp(Register tmp, int index, bool pop_left, bool pop_right) {
@@ -2844,39 +2833,42 @@
void MacroAssembler::fldcw(AddressLiteral src) {
Assembler::fldcw(as_Address(src));
}
+void MacroAssembler::fpop() {
+ ffree();
+ fincstp();
+}
+
+void MacroAssembler::fremr(Register tmp) {
+ save_rax(tmp);
+ { Label L;
+ bind(L);
+ fprem();
+ fwait(); fnstsw_ax();
+ sahf();
+ jcc(Assembler::parity, L);
+ }
+ restore_rax(tmp);
+ // Result is in ST0.
+ // Note: fxch & fpop to get rid of ST1
+ // (otherwise FPU stack could overflow eventually)
+ fxch(1);
+ fpop();
+}
+#endif // !LP64
+
void MacroAssembler::mulpd(XMMRegister dst, AddressLiteral src) {
if (reachable(src)) {
Assembler::mulpd(dst, as_Address(src));
} else {
lea(rscratch1, src);
Assembler::mulpd(dst, Address(rscratch1, 0));
}
}
-void MacroAssembler::increase_precision() {
- subptr(rsp, BytesPerWord);
- fnstcw(Address(rsp, 0));
- movl(rax, Address(rsp, 0));
- orl(rax, 0x300);
- push(rax);
- fldcw(Address(rsp, 0));
- pop(rax);
-}
-
-void MacroAssembler::restore_precision() {
- fldcw(Address(rsp, 0));
- addptr(rsp, BytesPerWord);
-}
-
-void MacroAssembler::fpop() {
- ffree();
- fincstp();
-}
-
void MacroAssembler::load_float(Address src) {
if (UseSSE >= 1) {
movflt(xmm0, src);
} else {
LP64_ONLY(ShouldNotReachHere());
@@ -2909,32 +2901,10 @@
LP64_ONLY(ShouldNotReachHere());
NOT_LP64(fstp_d(dst));
}
}
-void MacroAssembler::fremr(Register tmp) {
- save_rax(tmp);
- { Label L;
- bind(L);
- fprem();
- fwait(); fnstsw_ax();
-#ifdef _LP64
- testl(rax, 0x400);
- jcc(Assembler::notEqual, L);
-#else
- sahf();
- jcc(Assembler::parity, L);
-#endif // _LP64
- }
- restore_rax(tmp);
- // Result is in ST0.
- // Note: fxch & fpop to get rid of ST1
- // (otherwise FPU stack could overflow eventually)
- fxch(1);
- fpop();
-}
-
// dst = c = a * b + c
void MacroAssembler::fmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c) {
Assembler::vfmadd231sd(c, a, b);
if (dst != c) {
movdbl(dst, c);
@@ -5096,10 +5066,11 @@
addptr(rsp, wordSize); // discard argument
pop_CPU_state();
}
+#ifndef _LP64
static bool _verify_FPU(int stack_depth, char* s, CPU_State* state) {
static int counter = 0;
FPU_State* fs = &state->_fpu_state;
counter++;
// For leaf calls, only verify that the top few elements remain empty.
@@ -5152,11 +5123,10 @@
}
// everything is cool
return true;
}
-
void MacroAssembler::verify_FPU(int stack_depth, const char* s) {
if (!VerifyFPU) return;
push_CPU_state();
push(rsp); // pass CPU state
ExternalAddress msg((address) s);
@@ -5172,10 +5142,11 @@
int3(); // break if error condition
bind(L);
}
pop_CPU_state();
}
+#endif // _LP64
void MacroAssembler::restore_cpu_control_state_after_jni() {
// Either restore the MXCSR register after returning from the JNI Call
// or verify that it wasn't changed (with -Xcheck:jni flag).
if (VM_Version::supports_sse()) {
@@ -9886,10 +9857,60 @@
bind(done);
}
#ifdef _LP64
+void MacroAssembler::convert_f2i(Register dst, XMMRegister src) {
+ Label done;
+ cvttss2sil(dst, src);
+ // Conversion instructions do not match JLS for overflow, underflow and NaN -> fixup in stub
+ cmpl(dst, 0x80000000); // float_sign_flip
+ jccb(Assembler::notEqual, done);
+ subptr(rsp, 8);
+ movflt(Address(rsp, 0), src);
+ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::f2i_fixup())));
+ pop(dst);
+ bind(done);
+}
+
+void MacroAssembler::convert_d2i(Register dst, XMMRegister src) {
+ Label done;
+ cvttsd2sil(dst, src);
+ // Conversion instructions do not match JLS for overflow, underflow and NaN -> fixup in stub
+ cmpl(dst, 0x80000000); // float_sign_flip
+ jccb(Assembler::notEqual, done);
+ subptr(rsp, 8);
+ movdbl(Address(rsp, 0), src);
+ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2i_fixup())));
+ pop(dst);
+ bind(done);
+}
+
+void MacroAssembler::convert_f2l(Register dst, XMMRegister src) {
+ Label done;
+ cvttss2siq(dst, src);
+ cmp64(dst, ExternalAddress((address) StubRoutines::x86::double_sign_flip()));
+ jccb(Assembler::notEqual, done);
+ subptr(rsp, 8);
+ movflt(Address(rsp, 0), src);
+ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::f2l_fixup())));
+ pop(dst);
+ bind(done);
+}
+
+void MacroAssembler::convert_d2l(Register dst, XMMRegister src) {
+ Label done;
+ cvttsd2siq(dst, src);
+ cmp64(dst, ExternalAddress((address) StubRoutines::x86::double_sign_flip()));
+ jccb(Assembler::notEqual, done);
+ subptr(rsp, 8);
+ movdbl(Address(rsp, 0), src);
+ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::d2l_fixup())));
+ pop(dst);
+ bind(done);
+}
+
void MacroAssembler::cache_wb(Address line)
{
// 64 bit cpus always support clflush
assert(VM_Version::supports_clflush(), "clflush should be available");
bool optimized = VM_Version::supports_clflushopt();
@@ -9998,6 +10019,6 @@
mov(thread, rax);
pop(rax);
}
}
-#endif
+#endif // !WIN32 || _LP64
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