409
410 // Long shifts for Java
411 // (semantics as described in JVM spec.)
412 void lshl(Register hi, Register lo); // hi:lo << (rcx & 0x3f)
413 void lshr(Register hi, Register lo, bool sign_extension = false); // hi:lo >> (rcx & 0x3f)
414
415 // Long compare for Java
416 // (semantics as described in JVM spec.)
417 void lcmp2int(Register x_hi, Register x_lo, Register y_hi, Register y_lo); // x_hi = lcmp(x, y)
418
419
420 // misc
421
422 // Sign extension
423 void sign_extend_short(Register reg);
424 void sign_extend_byte(Register reg);
425
426 // Division by power of 2, rounding towards 0
427 void division_with_shift(Register reg, int shift_value);
428
429 // Compares the top-most stack entries on the FPU stack and sets the eflags as follows:
430 //
431 // CF (corresponds to C0) if x < y
432 // PF (corresponds to C2) if unordered
433 // ZF (corresponds to C3) if x = y
434 //
435 // The arguments are in reversed order on the stack (i.e., top of stack is first argument).
436 // tmp is a temporary register, if none is available use noreg (only matters for non-P6 code)
437 void fcmp(Register tmp);
438 // Variant of the above which allows y to be further down the stack
439 // and which only pops x and y if specified. If pop_right is
440 // specified then pop_left must also be specified.
441 void fcmp(Register tmp, int index, bool pop_left, bool pop_right);
442
443 // Floating-point comparison for Java
444 // Compares the top-most stack entries on the FPU stack and stores the result in dst.
445 // The arguments are in reversed order on the stack (i.e., top of stack is first argument).
446 // (semantics as described in JVM spec.)
447 void fcmp2int(Register dst, bool unordered_is_less);
448 // Variant of the above which allows y to be further down the stack
449 // and which only pops x and y if specified. If pop_right is
450 // specified then pop_left must also be specified.
451 void fcmp2int(Register dst, bool unordered_is_less, int index, bool pop_left, bool pop_right);
452
453 // Floating-point remainder for Java (ST0 = ST0 fremr ST1, ST1 is empty afterwards)
454 // tmp is a temporary register, if none is available use noreg
455 void fremr(Register tmp);
456
457 // dst = c = a * b + c
458 void fmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c);
459 void fmaf(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c);
460
461 void vfmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c, int vector_len);
462 void vfmaf(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c, int vector_len);
463 void vfmad(XMMRegister dst, XMMRegister a, Address b, XMMRegister c, int vector_len);
464 void vfmaf(XMMRegister dst, XMMRegister a, Address b, XMMRegister c, int vector_len);
465
466
467 // same as fcmp2int, but using SSE2
468 void cmpss2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
469 void cmpsd2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
470
471 // branch to L if FPU flag C2 is set/not set
472 // tmp is a temporary register, if none is available use noreg
473 void jC2 (Register tmp, Label& L);
474 void jnC2(Register tmp, Label& L);
475
476 // Pop ST (ffree & fincstp combined)
477 void fpop();
478
479 // Load float value from 'address'. If UseSSE >= 1, the value is loaded into
480 // register xmm0. Otherwise, the value is loaded onto the FPU stack.
481 void load_float(Address src);
482
483 // Store float value to 'address'. If UseSSE >= 1, the value is stored
484 // from register xmm0. Otherwise, the value is stored from the FPU stack.
485 void store_float(Address dst);
486
487 // Load double value from 'address'. If UseSSE >= 2, the value is loaded into
488 // register xmm0. Otherwise, the value is loaded onto the FPU stack.
489 void load_double(Address src);
490
491 // Store double value to 'address'. If UseSSE >= 2, the value is stored
492 // from register xmm0. Otherwise, the value is stored from the FPU stack.
493 void store_double(Address dst);
494
495 // pushes double TOS element of FPU stack on CPU stack; pops from FPU stack
496 void push_fTOS();
497
498 // pops double TOS element from CPU stack and pushes on FPU stack
499 void pop_fTOS();
500
501 void empty_FPU_stack();
502
503 void push_IU_state();
504 void pop_IU_state();
505
506 void push_FPU_state();
507 void pop_FPU_state();
508
509 void push_CPU_state();
510 void pop_CPU_state();
511
512 // Round up to a power of two
513 void round_to(Register reg, int modulus);
514
515 // Callee saved registers handling
516 void push_callee_saved_registers();
517 void pop_callee_saved_registers();
518
519 // allocation
520 void eden_allocate(
521 Register thread, // Current thread
592 // method handles (JSR 292)
593 Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0);
594
595 //----
596 void set_word_if_not_zero(Register reg); // sets reg to 1 if not zero, otherwise 0
597
598 // Debugging
599
600 // only if +VerifyOops
601 // TODO: Make these macros with file and line like sparc version!
602 void verify_oop(Register reg, const char* s = "broken oop");
603 void verify_oop_addr(Address addr, const char * s = "broken oop addr");
604
605 // TODO: verify method and klass metadata (compare against vptr?)
606 void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
607 void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line){}
608
609 #define verify_method_ptr(reg) _verify_method_ptr(reg, "broken method " #reg, __FILE__, __LINE__)
610 #define verify_klass_ptr(reg) _verify_klass_ptr(reg, "broken klass " #reg, __FILE__, __LINE__)
611
612 // only if +VerifyFPU
613 void verify_FPU(int stack_depth, const char* s = "illegal FPU state");
614
615 // Verify or restore cpu control state after JNI call
616 void restore_cpu_control_state_after_jni();
617
618 // prints msg, dumps registers and stops execution
619 void stop(const char* msg);
620
621 // prints msg and continues
622 void warn(const char* msg);
623
624 // dumps registers and other state
625 void print_state();
626
627 static void debug32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip, char* msg);
628 static void debug64(char* msg, int64_t pc, int64_t regs[]);
629 static void print_state32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip);
630 static void print_state64(int64_t pc, int64_t regs[]);
631
632 void os_breakpoint();
633
634 void untested() { stop("untested"); }
885 void jump(ArrayAddress entry);
886
887 // Floating
888
889 void andpd(XMMRegister dst, Address src) { Assembler::andpd(dst, src); }
890 void andpd(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
891 void andpd(XMMRegister dst, XMMRegister src) { Assembler::andpd(dst, src); }
892
893 void andps(XMMRegister dst, XMMRegister src) { Assembler::andps(dst, src); }
894 void andps(XMMRegister dst, Address src) { Assembler::andps(dst, src); }
895 void andps(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
896
897 void comiss(XMMRegister dst, XMMRegister src) { Assembler::comiss(dst, src); }
898 void comiss(XMMRegister dst, Address src) { Assembler::comiss(dst, src); }
899 void comiss(XMMRegister dst, AddressLiteral src);
900
901 void comisd(XMMRegister dst, XMMRegister src) { Assembler::comisd(dst, src); }
902 void comisd(XMMRegister dst, Address src) { Assembler::comisd(dst, src); }
903 void comisd(XMMRegister dst, AddressLiteral src);
904
905 void fadd_s(Address src) { Assembler::fadd_s(src); }
906 void fadd_s(AddressLiteral src) { Assembler::fadd_s(as_Address(src)); }
907
908 void fldcw(Address src) { Assembler::fldcw(src); }
909 void fldcw(AddressLiteral src);
910
911 void fld_s(int index) { Assembler::fld_s(index); }
912 void fld_s(Address src) { Assembler::fld_s(src); }
913 void fld_s(AddressLiteral src);
914
915 void fld_d(Address src) { Assembler::fld_d(src); }
916 void fld_d(AddressLiteral src);
917
918 void fld_x(Address src) { Assembler::fld_x(src); }
919 void fld_x(AddressLiteral src);
920
921 void fmul_s(Address src) { Assembler::fmul_s(src); }
922 void fmul_s(AddressLiteral src) { Assembler::fmul_s(as_Address(src)); }
923
924 void ldmxcsr(Address src) { Assembler::ldmxcsr(src); }
925 void ldmxcsr(AddressLiteral src);
926
927 #ifdef _LP64
928 private:
929 void sha256_AVX2_one_round_compute(
930 Register reg_old_h,
931 Register reg_a,
932 Register reg_b,
933 Register reg_c,
934 Register reg_d,
935 Register reg_e,
936 Register reg_f,
937 Register reg_g,
938 Register reg_h,
939 int iter);
940 void sha256_AVX2_four_rounds_compute_first(int start);
941 void sha256_AVX2_four_rounds_compute_last(int start);
942 void sha256_AVX2_one_round_and_sched(
1065 void fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1066 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1067 Register rax, Register rcx, Register rdx, Register tmp);
1068
1069 void libm_sincos_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
1070 Register edx, Register ebx, Register esi, Register edi,
1071 Register ebp, Register esp);
1072
1073 void libm_reduce_pi04l(Register eax, Register ecx, Register edx, Register ebx,
1074 Register esi, Register edi, Register ebp, Register esp);
1075
1076 void libm_tancot_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
1077 Register edx, Register ebx, Register esi, Register edi,
1078 Register ebp, Register esp);
1079
1080 void fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1081 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1082 Register rax, Register rcx, Register rdx, Register tmp);
1083 #endif
1084
1085 void increase_precision();
1086 void restore_precision();
1087
1088 private:
1089
1090 // these are private because users should be doing movflt/movdbl
1091
1092 void movss(XMMRegister dst, XMMRegister src) { Assembler::movss(dst, src); }
1093 void movss(Address dst, XMMRegister src) { Assembler::movss(dst, src); }
1094 void movss(XMMRegister dst, Address src) { Assembler::movss(dst, src); }
1095 void movss(XMMRegister dst, AddressLiteral src);
1096
1097 void movlpd(XMMRegister dst, Address src) {Assembler::movlpd(dst, src); }
1098 void movlpd(XMMRegister dst, AddressLiteral src);
1099
1100 public:
1101
1102 void addsd(XMMRegister dst, XMMRegister src) { Assembler::addsd(dst, src); }
1103 void addsd(XMMRegister dst, Address src) { Assembler::addsd(dst, src); }
1104 void addsd(XMMRegister dst, AddressLiteral src);
1105
1106 void addss(XMMRegister dst, XMMRegister src) { Assembler::addss(dst, src); }
1107 void addss(XMMRegister dst, Address src) { Assembler::addss(dst, src); }
1796 XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
1797 bool is_pclmulqdq_supported);
1798 // Fold 128-bit data chunk
1799 void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
1800 void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, XMMRegister xbuf);
1801 // Fold 8-bit data
1802 void fold_8bit_crc32(Register crc, Register table, Register tmp);
1803 void fold_8bit_crc32(XMMRegister crc, Register table, XMMRegister xtmp, Register tmp);
1804 void fold_128bit_crc32_avx512(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
1805
1806 // Compress char[] array to byte[].
1807 void char_array_compress(Register src, Register dst, Register len,
1808 XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1809 XMMRegister tmp4, Register tmp5, Register result);
1810
1811 // Inflate byte[] array to char[].
1812 void byte_array_inflate(Register src, Register dst, Register len,
1813 XMMRegister tmp1, Register tmp2);
1814
1815 #ifdef _LP64
1816 void cache_wb(Address line);
1817 void cache_wbsync(bool is_pre);
1818 #endif // _LP64
1819 };
1820
1821 /**
1822 * class SkipIfEqual:
1823 *
1824 * Instantiating this class will result in assembly code being output that will
1825 * jump around any code emitted between the creation of the instance and it's
1826 * automatic destruction at the end of a scope block, depending on the value of
1827 * the flag passed to the constructor, which will be checked at run-time.
1828 */
1829 class SkipIfEqual {
1830 private:
1831 MacroAssembler* _masm;
1832 Label _label;
1833
1834 public:
1835 SkipIfEqual(MacroAssembler*, const bool* flag_addr, bool value);
|
409
410 // Long shifts for Java
411 // (semantics as described in JVM spec.)
412 void lshl(Register hi, Register lo); // hi:lo << (rcx & 0x3f)
413 void lshr(Register hi, Register lo, bool sign_extension = false); // hi:lo >> (rcx & 0x3f)
414
415 // Long compare for Java
416 // (semantics as described in JVM spec.)
417 void lcmp2int(Register x_hi, Register x_lo, Register y_hi, Register y_lo); // x_hi = lcmp(x, y)
418
419
420 // misc
421
422 // Sign extension
423 void sign_extend_short(Register reg);
424 void sign_extend_byte(Register reg);
425
426 // Division by power of 2, rounding towards 0
427 void division_with_shift(Register reg, int shift_value);
428
429 #ifndef _LP64
430 // Compares the top-most stack entries on the FPU stack and sets the eflags as follows:
431 //
432 // CF (corresponds to C0) if x < y
433 // PF (corresponds to C2) if unordered
434 // ZF (corresponds to C3) if x = y
435 //
436 // The arguments are in reversed order on the stack (i.e., top of stack is first argument).
437 // tmp is a temporary register, if none is available use noreg (only matters for non-P6 code)
438 void fcmp(Register tmp);
439 // Variant of the above which allows y to be further down the stack
440 // and which only pops x and y if specified. If pop_right is
441 // specified then pop_left must also be specified.
442 void fcmp(Register tmp, int index, bool pop_left, bool pop_right);
443
444 // Floating-point comparison for Java
445 // Compares the top-most stack entries on the FPU stack and stores the result in dst.
446 // The arguments are in reversed order on the stack (i.e., top of stack is first argument).
447 // (semantics as described in JVM spec.)
448 void fcmp2int(Register dst, bool unordered_is_less);
449 // Variant of the above which allows y to be further down the stack
450 // and which only pops x and y if specified. If pop_right is
451 // specified then pop_left must also be specified.
452 void fcmp2int(Register dst, bool unordered_is_less, int index, bool pop_left, bool pop_right);
453
454 // Floating-point remainder for Java (ST0 = ST0 fremr ST1, ST1 is empty afterwards)
455 // tmp is a temporary register, if none is available use noreg
456 void fremr(Register tmp);
457
458 // only if +VerifyFPU
459 void verify_FPU(int stack_depth, const char* s = "illegal FPU state");
460 #endif // !LP64
461
462 // dst = c = a * b + c
463 void fmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c);
464 void fmaf(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c);
465
466 void vfmad(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c, int vector_len);
467 void vfmaf(XMMRegister dst, XMMRegister a, XMMRegister b, XMMRegister c, int vector_len);
468 void vfmad(XMMRegister dst, XMMRegister a, Address b, XMMRegister c, int vector_len);
469 void vfmaf(XMMRegister dst, XMMRegister a, Address b, XMMRegister c, int vector_len);
470
471
472 // same as fcmp2int, but using SSE2
473 void cmpss2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
474 void cmpsd2int(XMMRegister opr1, XMMRegister opr2, Register dst, bool unordered_is_less);
475
476 // branch to L if FPU flag C2 is set/not set
477 // tmp is a temporary register, if none is available use noreg
478 void jC2 (Register tmp, Label& L);
479 void jnC2(Register tmp, Label& L);
480
481 // Load float value from 'address'. If UseSSE >= 1, the value is loaded into
482 // register xmm0. Otherwise, the value is loaded onto the FPU stack.
483 void load_float(Address src);
484
485 // Store float value to 'address'. If UseSSE >= 1, the value is stored
486 // from register xmm0. Otherwise, the value is stored from the FPU stack.
487 void store_float(Address dst);
488
489 // Load double value from 'address'. If UseSSE >= 2, the value is loaded into
490 // register xmm0. Otherwise, the value is loaded onto the FPU stack.
491 void load_double(Address src);
492
493 // Store double value to 'address'. If UseSSE >= 2, the value is stored
494 // from register xmm0. Otherwise, the value is stored from the FPU stack.
495 void store_double(Address dst);
496
497 #ifndef _LP64
498 // Pop ST (ffree & fincstp combined)
499 void fpop();
500
501 void empty_FPU_stack();
502 #endif // !_LP64
503
504 void push_IU_state();
505 void pop_IU_state();
506
507 void push_FPU_state();
508 void pop_FPU_state();
509
510 void push_CPU_state();
511 void pop_CPU_state();
512
513 // Round up to a power of two
514 void round_to(Register reg, int modulus);
515
516 // Callee saved registers handling
517 void push_callee_saved_registers();
518 void pop_callee_saved_registers();
519
520 // allocation
521 void eden_allocate(
522 Register thread, // Current thread
593 // method handles (JSR 292)
594 Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0);
595
596 //----
597 void set_word_if_not_zero(Register reg); // sets reg to 1 if not zero, otherwise 0
598
599 // Debugging
600
601 // only if +VerifyOops
602 // TODO: Make these macros with file and line like sparc version!
603 void verify_oop(Register reg, const char* s = "broken oop");
604 void verify_oop_addr(Address addr, const char * s = "broken oop addr");
605
606 // TODO: verify method and klass metadata (compare against vptr?)
607 void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
608 void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line){}
609
610 #define verify_method_ptr(reg) _verify_method_ptr(reg, "broken method " #reg, __FILE__, __LINE__)
611 #define verify_klass_ptr(reg) _verify_klass_ptr(reg, "broken klass " #reg, __FILE__, __LINE__)
612
613 // Verify or restore cpu control state after JNI call
614 void restore_cpu_control_state_after_jni();
615
616 // prints msg, dumps registers and stops execution
617 void stop(const char* msg);
618
619 // prints msg and continues
620 void warn(const char* msg);
621
622 // dumps registers and other state
623 void print_state();
624
625 static void debug32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip, char* msg);
626 static void debug64(char* msg, int64_t pc, int64_t regs[]);
627 static void print_state32(int rdi, int rsi, int rbp, int rsp, int rbx, int rdx, int rcx, int rax, int eip);
628 static void print_state64(int64_t pc, int64_t regs[]);
629
630 void os_breakpoint();
631
632 void untested() { stop("untested"); }
883 void jump(ArrayAddress entry);
884
885 // Floating
886
887 void andpd(XMMRegister dst, Address src) { Assembler::andpd(dst, src); }
888 void andpd(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
889 void andpd(XMMRegister dst, XMMRegister src) { Assembler::andpd(dst, src); }
890
891 void andps(XMMRegister dst, XMMRegister src) { Assembler::andps(dst, src); }
892 void andps(XMMRegister dst, Address src) { Assembler::andps(dst, src); }
893 void andps(XMMRegister dst, AddressLiteral src, Register scratch_reg = rscratch1);
894
895 void comiss(XMMRegister dst, XMMRegister src) { Assembler::comiss(dst, src); }
896 void comiss(XMMRegister dst, Address src) { Assembler::comiss(dst, src); }
897 void comiss(XMMRegister dst, AddressLiteral src);
898
899 void comisd(XMMRegister dst, XMMRegister src) { Assembler::comisd(dst, src); }
900 void comisd(XMMRegister dst, Address src) { Assembler::comisd(dst, src); }
901 void comisd(XMMRegister dst, AddressLiteral src);
902
903 #ifndef _LP64
904 void fadd_s(Address src) { Assembler::fadd_s(src); }
905 void fadd_s(AddressLiteral src) { Assembler::fadd_s(as_Address(src)); }
906
907 void fldcw(Address src) { Assembler::fldcw(src); }
908 void fldcw(AddressLiteral src);
909
910 void fld_s(int index) { Assembler::fld_s(index); }
911 void fld_s(Address src) { Assembler::fld_s(src); }
912 void fld_s(AddressLiteral src);
913
914 void fld_d(Address src) { Assembler::fld_d(src); }
915 void fld_d(AddressLiteral src);
916
917 void fld_x(Address src) { Assembler::fld_x(src); }
918 void fld_x(AddressLiteral src);
919
920 void fmul_s(Address src) { Assembler::fmul_s(src); }
921 void fmul_s(AddressLiteral src) { Assembler::fmul_s(as_Address(src)); }
922 #endif // _LP64
923
924 void ldmxcsr(Address src) { Assembler::ldmxcsr(src); }
925 void ldmxcsr(AddressLiteral src);
926
927 #ifdef _LP64
928 private:
929 void sha256_AVX2_one_round_compute(
930 Register reg_old_h,
931 Register reg_a,
932 Register reg_b,
933 Register reg_c,
934 Register reg_d,
935 Register reg_e,
936 Register reg_f,
937 Register reg_g,
938 Register reg_h,
939 int iter);
940 void sha256_AVX2_four_rounds_compute_first(int start);
941 void sha256_AVX2_four_rounds_compute_last(int start);
942 void sha256_AVX2_one_round_and_sched(
1065 void fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1066 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1067 Register rax, Register rcx, Register rdx, Register tmp);
1068
1069 void libm_sincos_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
1070 Register edx, Register ebx, Register esi, Register edi,
1071 Register ebp, Register esp);
1072
1073 void libm_reduce_pi04l(Register eax, Register ecx, Register edx, Register ebx,
1074 Register esi, Register edi, Register ebp, Register esp);
1075
1076 void libm_tancot_huge(XMMRegister xmm0, XMMRegister xmm1, Register eax, Register ecx,
1077 Register edx, Register ebx, Register esi, Register edi,
1078 Register ebp, Register esp);
1079
1080 void fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3,
1081 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7,
1082 Register rax, Register rcx, Register rdx, Register tmp);
1083 #endif
1084
1085 private:
1086
1087 // these are private because users should be doing movflt/movdbl
1088
1089 void movss(XMMRegister dst, XMMRegister src) { Assembler::movss(dst, src); }
1090 void movss(Address dst, XMMRegister src) { Assembler::movss(dst, src); }
1091 void movss(XMMRegister dst, Address src) { Assembler::movss(dst, src); }
1092 void movss(XMMRegister dst, AddressLiteral src);
1093
1094 void movlpd(XMMRegister dst, Address src) {Assembler::movlpd(dst, src); }
1095 void movlpd(XMMRegister dst, AddressLiteral src);
1096
1097 public:
1098
1099 void addsd(XMMRegister dst, XMMRegister src) { Assembler::addsd(dst, src); }
1100 void addsd(XMMRegister dst, Address src) { Assembler::addsd(dst, src); }
1101 void addsd(XMMRegister dst, AddressLiteral src);
1102
1103 void addss(XMMRegister dst, XMMRegister src) { Assembler::addss(dst, src); }
1104 void addss(XMMRegister dst, Address src) { Assembler::addss(dst, src); }
1793 XMMRegister w_xtmp1, XMMRegister w_xtmp2, XMMRegister w_xtmp3,
1794 bool is_pclmulqdq_supported);
1795 // Fold 128-bit data chunk
1796 void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
1797 void fold_128bit_crc32(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, XMMRegister xbuf);
1798 // Fold 8-bit data
1799 void fold_8bit_crc32(Register crc, Register table, Register tmp);
1800 void fold_8bit_crc32(XMMRegister crc, Register table, XMMRegister xtmp, Register tmp);
1801 void fold_128bit_crc32_avx512(XMMRegister xcrc, XMMRegister xK, XMMRegister xtmp, Register buf, int offset);
1802
1803 // Compress char[] array to byte[].
1804 void char_array_compress(Register src, Register dst, Register len,
1805 XMMRegister tmp1, XMMRegister tmp2, XMMRegister tmp3,
1806 XMMRegister tmp4, Register tmp5, Register result);
1807
1808 // Inflate byte[] array to char[].
1809 void byte_array_inflate(Register src, Register dst, Register len,
1810 XMMRegister tmp1, Register tmp2);
1811
1812 #ifdef _LP64
1813 void convert_f2i(Register dst, XMMRegister src);
1814 void convert_d2i(Register dst, XMMRegister src);
1815 void convert_f2l(Register dst, XMMRegister src);
1816 void convert_d2l(Register dst, XMMRegister src);
1817
1818 void cache_wb(Address line);
1819 void cache_wbsync(bool is_pre);
1820 #endif // _LP64
1821 };
1822
1823 /**
1824 * class SkipIfEqual:
1825 *
1826 * Instantiating this class will result in assembly code being output that will
1827 * jump around any code emitted between the creation of the instance and it's
1828 * automatic destruction at the end of a scope block, depending on the value of
1829 * the flag passed to the constructor, which will be checked at run-time.
1830 */
1831 class SkipIfEqual {
1832 private:
1833 MacroAssembler* _masm;
1834 Label _label;
1835
1836 public:
1837 SkipIfEqual(MacroAssembler*, const bool* flag_addr, bool value);
|