1 /*
   2  * Copyright (c) 2005, 2013, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "prims/unsafe.hpp"
  37 #include "runtime/sharedRuntime.hpp"
  38 #include "runtime/stubRoutines.hpp"
  39 #include "vmreg_x86.inline.hpp"
  40 
  41 #ifdef ASSERT
  42 #define __ gen()->lir(__FILE__, __LINE__)->
  43 #else
  44 #define __ gen()->lir()->
  45 #endif
  46 
  47 // Item will be loaded into a byte register; Intel only
  48 void LIRItem::load_byte_item() {
  49   load_item();
  50   LIR_Opr res = result();
  51 
  52   if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
  53     // make sure that it is a byte register
  54     assert(!value()->type()->is_float() && !value()->type()->is_double(),
  55            "can't load floats in byte register");
  56     LIR_Opr reg = _gen->rlock_byte(T_BYTE);
  57     __ move(res, reg);
  58 
  59     _result = reg;
  60   }
  61 }
  62 
  63 
  64 void LIRItem::load_nonconstant() {
  65   LIR_Opr r = value()->operand();
  66   if (r->is_constant()) {
  67     _result = r;
  68   } else {
  69     load_item();
  70   }
  71 }
  72 
  73 //--------------------------------------------------------------
  74 //               LIRGenerator
  75 //--------------------------------------------------------------
  76 
  77 
  78 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
  79 LIR_Opr LIRGenerator::exceptionPcOpr()  { return FrameMap::rdx_opr; }
  80 LIR_Opr LIRGenerator::divInOpr()        { return FrameMap::rax_opr; }
  81 LIR_Opr LIRGenerator::divOutOpr()       { return FrameMap::rax_opr; }
  82 LIR_Opr LIRGenerator::remOutOpr()       { return FrameMap::rdx_opr; }
  83 LIR_Opr LIRGenerator::shiftCountOpr()   { return FrameMap::rcx_opr; }
  84 LIR_Opr LIRGenerator::syncTempOpr()     { return FrameMap::rax_opr; }
  85 LIR_Opr LIRGenerator::getThreadTemp()   { return LIR_OprFact::illegalOpr; }
  86 
  87 
  88 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  89   LIR_Opr opr;
  90   switch (type->tag()) {
  91     case intTag:     opr = FrameMap::rax_opr;          break;
  92     case objectTag:  opr = FrameMap::rax_oop_opr;      break;
  93     case longTag:    opr = FrameMap::long0_opr;        break;
  94     case floatTag:   opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr  : FrameMap::fpu0_float_opr;  break;
  95     case doubleTag:  opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr;  break;
  96 
  97     case addressTag:
  98     default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  99   }
 100 
 101   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
 102   return opr;
 103 }
 104 
 105 
 106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 107   LIR_Opr reg = new_register(T_INT);
 108   set_vreg_flag(reg, LIRGenerator::byte_reg);
 109   return reg;
 110 }
 111 
 112 
 113 //--------- loading items into registers --------------------------------
 114 
 115 
 116 // i486 instructions can inline constants
 117 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 118   if (type == T_SHORT || type == T_CHAR) {
 119     // there is no immediate move of word values in asembler_i486.?pp
 120     return false;
 121   }
 122   Constant* c = v->as_Constant();
 123   if (c && c->state_before() == NULL) {
 124     // constants of any type can be stored directly, except for
 125     // unloaded object constants.
 126     return true;
 127   }
 128   return false;
 129 }
 130 
 131 
 132 bool LIRGenerator::can_inline_as_constant(Value v) const {
 133   if (v->type()->tag() == longTag) return false;
 134   return v->type()->tag() != objectTag ||
 135     (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
 136 }
 137 
 138 
 139 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
 140   if (c->type() == T_LONG) return false;
 141   return c->type() != T_OBJECT || c->as_jobject() == NULL;
 142 }
 143 
 144 
 145 LIR_Opr LIRGenerator::safepoint_poll_register() {
 146   return LIR_OprFact::illegalOpr;
 147 }
 148 
 149 
 150 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 151                                             int shift, int disp, BasicType type) {
 152   assert(base->is_register(), "must be");
 153   if (index->is_constant()) {
 154     return new LIR_Address(base,
 155                            (index->as_constant_ptr()->as_jint() << shift) + disp,
 156                            type);
 157   } else {
 158     return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
 159   }
 160 }
 161 
 162 
 163 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 164                                               BasicType type, bool needs_card_mark) {
 165   int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
 166 
 167   LIR_Address* addr;
 168   if (index_opr->is_constant()) {
 169     int elem_size = type2aelembytes(type);
 170     addr = new LIR_Address(array_opr,
 171                            offset_in_bytes + index_opr->as_jint() * elem_size, type);
 172   } else {
 173 #ifdef _LP64
 174     if (index_opr->type() == T_INT) {
 175       LIR_Opr tmp = new_register(T_LONG);
 176       __ convert(Bytecodes::_i2l, index_opr, tmp);
 177       index_opr = tmp;
 178     }
 179 #endif // _LP64
 180     addr =  new LIR_Address(array_opr,
 181                             index_opr,
 182                             LIR_Address::scale(type),
 183                             offset_in_bytes, type);
 184   }
 185   if (needs_card_mark) {
 186     // This store will need a precise card mark, so go ahead and
 187     // compute the full adddres instead of computing once for the
 188     // store and again for the card mark.
 189     LIR_Opr tmp = new_pointer_register();
 190     __ leal(LIR_OprFact::address(addr), tmp);
 191     return new LIR_Address(tmp, type);
 192   } else {
 193     return addr;
 194   }
 195 }
 196 
 197 
 198 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 199   LIR_Opr r;
 200   if (type == T_LONG) {
 201     r = LIR_OprFact::longConst(x);
 202   } else if (type == T_INT) {
 203     r = LIR_OprFact::intConst(x);
 204   } else {
 205     ShouldNotReachHere();
 206   }
 207   return r;
 208 }
 209 
 210 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 211   LIR_Opr pointer = new_pointer_register();
 212   __ move(LIR_OprFact::intptrConst(counter), pointer);
 213   LIR_Address* addr = new LIR_Address(pointer, type);
 214   increment_counter(addr, step);
 215 }
 216 
 217 
 218 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 219   __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
 220 }
 221 
 222 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 223   __ cmp_mem_int(condition, base, disp, c, info);
 224 }
 225 
 226 
 227 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 228   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 229 }
 230 
 231 
 232 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
 233   __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
 234 }
 235 
 236 
 237 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
 238   if (tmp->is_valid()) {
 239     if (is_power_of_2(c + 1)) {
 240       __ move(left, tmp);
 241       __ shift_left(left, log2_intptr(c + 1), left);
 242       __ sub(left, tmp, result);
 243       return true;
 244     } else if (is_power_of_2(c - 1)) {
 245       __ move(left, tmp);
 246       __ shift_left(left, log2_intptr(c - 1), left);
 247       __ add(left, tmp, result);
 248       return true;
 249     }
 250   }
 251   return false;
 252 }
 253 
 254 
 255 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 256   BasicType type = item->type();
 257   __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
 258 }
 259 
 260 //----------------------------------------------------------------------
 261 //             visitor functions
 262 //----------------------------------------------------------------------
 263 
 264 
 265 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 266   assert(x->is_pinned(),"");
 267   bool needs_range_check = x->compute_needs_range_check();
 268   bool use_length = x->length() != NULL;
 269   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 270   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 271                                          !get_jobject_constant(x->value())->is_null_object() ||
 272                                          x->should_profile());
 273 
 274   LIRItem array(x->array(), this);
 275   LIRItem index(x->index(), this);
 276   LIRItem value(x->value(), this);
 277   LIRItem length(this);
 278 
 279   array.load_item();
 280   index.load_nonconstant();
 281 
 282   if (use_length && needs_range_check) {
 283     length.set_instruction(x->length());
 284     length.load_item();
 285 
 286   }
 287   if (needs_store_check) {
 288     value.load_item();
 289   } else {
 290     value.load_for_store(x->elt_type());
 291   }
 292 
 293   set_no_result(x);
 294 
 295   // the CodeEmitInfo must be duplicated for each different
 296   // LIR-instruction because spilling can occur anywhere between two
 297   // instructions and so the debug information must be different
 298   CodeEmitInfo* range_check_info = state_for(x);
 299   CodeEmitInfo* null_check_info = NULL;
 300   if (x->needs_null_check()) {
 301     null_check_info = new CodeEmitInfo(range_check_info);
 302   }
 303 
 304   // emit array address setup early so it schedules better
 305   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 306 
 307   if (GenerateRangeChecks && needs_range_check) {
 308     if (use_length) {
 309       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 310       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 311     } else {
 312       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 313       // range_check also does the null check
 314       null_check_info = NULL;
 315     }
 316   }
 317 
 318   if (GenerateArrayStoreCheck && needs_store_check) {
 319     LIR_Opr tmp1 = new_register(objectType);
 320     LIR_Opr tmp2 = new_register(objectType);
 321     LIR_Opr tmp3 = new_register(objectType);
 322 
 323     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 324     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
 325   }
 326 
 327   if (obj_store) {
 328     // Needs GC write barriers.
 329     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 330                 true /* do_load */, false /* patch */, NULL);
 331     __ move(value.result(), array_addr, null_check_info);
 332     // Seems to be a precise
 333     post_barrier(LIR_OprFact::address(array_addr), value.result());
 334   } else {
 335     __ move(value.result(), array_addr, null_check_info);
 336   }
 337 }
 338 
 339 
 340 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 341   assert(x->is_pinned(),"");
 342   LIRItem obj(x->obj(), this);
 343   obj.load_item();
 344 
 345   set_no_result(x);
 346 
 347   // "lock" stores the address of the monitor stack slot, so this is not an oop
 348   LIR_Opr lock = new_register(T_INT);
 349   // Need a scratch register for biased locking on x86
 350   LIR_Opr scratch = LIR_OprFact::illegalOpr;
 351   if (UseBiasedLocking) {
 352     scratch = new_register(T_INT);
 353   }
 354 
 355   CodeEmitInfo* info_for_exception = NULL;
 356   if (x->needs_null_check()) {
 357     info_for_exception = state_for(x);
 358   }
 359   // this CodeEmitInfo must not have the xhandlers because here the
 360   // object is already locked (xhandlers expect object to be unlocked)
 361   CodeEmitInfo* info = state_for(x, x->state(), true);
 362   monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
 363                         x->monitor_no(), info_for_exception, info);
 364 }
 365 
 366 
 367 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 368   assert(x->is_pinned(),"");
 369 
 370   LIRItem obj(x->obj(), this);
 371   obj.dont_load_item();
 372 
 373   LIR_Opr lock = new_register(T_INT);
 374   LIR_Opr obj_temp = new_register(T_INT);
 375   set_no_result(x);
 376   monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
 377 }
 378 
 379 
 380 // _ineg, _lneg, _fneg, _dneg
 381 void LIRGenerator::do_NegateOp(NegateOp* x) {
 382   LIRItem value(x->x(), this);
 383   value.set_destroys_register();
 384   value.load_item();
 385   LIR_Opr reg = rlock(x);
 386   __ negate(value.result(), reg);
 387 
 388   set_result(x, round_item(reg));
 389 }
 390 
 391 
 392 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 393 //      _dadd, _dmul, _dsub, _ddiv, _drem
 394 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 395   LIRItem left(x->x(),  this);
 396   LIRItem right(x->y(), this);
 397   LIRItem* left_arg  = &left;
 398   LIRItem* right_arg = &right;
 399   assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
 400   bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
 401   if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
 402     left.load_item();
 403   } else {
 404     left.dont_load_item();
 405   }
 406 
 407   // do not load right operand if it is a constant.  only 0 and 1 are
 408   // loaded because there are special instructions for loading them
 409   // without memory access (not needed for SSE2 instructions)
 410   bool must_load_right = false;
 411   if (right.is_constant()) {
 412     LIR_Const* c = right.result()->as_constant_ptr();
 413     assert(c != NULL, "invalid constant");
 414     assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
 415 
 416     if (c->type() == T_FLOAT) {
 417       must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
 418     } else {
 419       must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
 420     }
 421   }
 422 
 423   if (must_load_both) {
 424     // frem and drem destroy also right operand, so move it to a new register
 425     right.set_destroys_register();
 426     right.load_item();
 427   } else if (right.is_register() || must_load_right) {
 428     right.load_item();
 429   } else {
 430     right.dont_load_item();
 431   }
 432   LIR_Opr reg = rlock(x);
 433   LIR_Opr tmp = LIR_OprFact::illegalOpr;
 434   if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
 435     tmp = new_register(T_DOUBLE);
 436   }
 437 
 438   if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
 439     // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
 440     LIR_Opr fpu0, fpu1;
 441     if (x->op() == Bytecodes::_frem) {
 442       fpu0 = LIR_OprFact::single_fpu(0);
 443       fpu1 = LIR_OprFact::single_fpu(1);
 444     } else {
 445       fpu0 = LIR_OprFact::double_fpu(0);
 446       fpu1 = LIR_OprFact::double_fpu(1);
 447     }
 448     __ move(right.result(), fpu1); // order of left and right operand is important!
 449     __ move(left.result(), fpu0);
 450     __ rem (fpu0, fpu1, fpu0);
 451     __ move(fpu0, reg);
 452 
 453   } else {
 454     arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
 455   }
 456 
 457   set_result(x, round_item(reg));
 458 }
 459 
 460 
 461 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 462 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 463   if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
 464     // long division is implemented as a direct call into the runtime
 465     LIRItem left(x->x(), this);
 466     LIRItem right(x->y(), this);
 467 
 468     // the check for division by zero destroys the right operand
 469     right.set_destroys_register();
 470 
 471     BasicTypeList signature(2);
 472     signature.append(T_LONG);
 473     signature.append(T_LONG);
 474     CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 475 
 476     // check for division by zero (destroys registers of right operand!)
 477     CodeEmitInfo* info = state_for(x);
 478 
 479     const LIR_Opr result_reg = result_register_for(x->type());
 480     left.load_item_force(cc->at(1));
 481     right.load_item();
 482 
 483     __ move(right.result(), cc->at(0));
 484 
 485     __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
 486     __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 487 
 488     address entry;
 489     switch (x->op()) {
 490     case Bytecodes::_lrem:
 491       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 492       break; // check if dividend is 0 is done elsewhere
 493     case Bytecodes::_ldiv:
 494       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 495       break; // check if dividend is 0 is done elsewhere
 496     case Bytecodes::_lmul:
 497       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 498       break;
 499     default:
 500       ShouldNotReachHere();
 501     }
 502 
 503     LIR_Opr result = rlock_result(x);
 504     __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
 505     __ move(result_reg, result);
 506   } else if (x->op() == Bytecodes::_lmul) {
 507     // missing test if instr is commutative and if we should swap
 508     LIRItem left(x->x(), this);
 509     LIRItem right(x->y(), this);
 510 
 511     // right register is destroyed by the long mul, so it must be
 512     // copied to a new register.
 513     right.set_destroys_register();
 514 
 515     left.load_item();
 516     right.load_item();
 517 
 518     LIR_Opr reg = FrameMap::long0_opr;
 519     arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
 520     LIR_Opr result = rlock_result(x);
 521     __ move(reg, result);
 522   } else {
 523     // missing test if instr is commutative and if we should swap
 524     LIRItem left(x->x(), this);
 525     LIRItem right(x->y(), this);
 526 
 527     left.load_item();
 528     // don't load constants to save register
 529     right.load_nonconstant();
 530     rlock_result(x);
 531     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 532   }
 533 }
 534 
 535 
 536 
 537 // for: _iadd, _imul, _isub, _idiv, _irem
 538 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 539   if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
 540     // The requirements for division and modulo
 541     // input : rax,: dividend                         min_int
 542     //         reg: divisor   (may not be rax,/rdx)   -1
 543     //
 544     // output: rax,: quotient  (= rax, idiv reg)       min_int
 545     //         rdx: remainder (= rax, irem reg)       0
 546 
 547     // rax, and rdx will be destroyed
 548 
 549     // Note: does this invalidate the spec ???
 550     LIRItem right(x->y(), this);
 551     LIRItem left(x->x() , this);   // visit left second, so that the is_register test is valid
 552 
 553     // call state_for before load_item_force because state_for may
 554     // force the evaluation of other instructions that are needed for
 555     // correct debug info.  Otherwise the live range of the fix
 556     // register might be too long.
 557     CodeEmitInfo* info = state_for(x);
 558 
 559     left.load_item_force(divInOpr());
 560 
 561     right.load_item();
 562 
 563     LIR_Opr result = rlock_result(x);
 564     LIR_Opr result_reg;
 565     if (x->op() == Bytecodes::_idiv) {
 566       result_reg = divOutOpr();
 567     } else {
 568       result_reg = remOutOpr();
 569     }
 570 
 571     if (!ImplicitDiv0Checks) {
 572       __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
 573       __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
 574     }
 575     LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
 576     if (x->op() == Bytecodes::_irem) {
 577       __ irem(left.result(), right.result(), result_reg, tmp, info);
 578     } else if (x->op() == Bytecodes::_idiv) {
 579       __ idiv(left.result(), right.result(), result_reg, tmp, info);
 580     } else {
 581       ShouldNotReachHere();
 582     }
 583 
 584     __ move(result_reg, result);
 585   } else {
 586     // missing test if instr is commutative and if we should swap
 587     LIRItem left(x->x(),  this);
 588     LIRItem right(x->y(), this);
 589     LIRItem* left_arg = &left;
 590     LIRItem* right_arg = &right;
 591     if (x->is_commutative() && left.is_stack() && right.is_register()) {
 592       // swap them if left is real stack (or cached) and right is real register(not cached)
 593       left_arg = &right;
 594       right_arg = &left;
 595     }
 596 
 597     left_arg->load_item();
 598 
 599     // do not need to load right, as we can handle stack and constants
 600     if (x->op() == Bytecodes::_imul ) {
 601       // check if we can use shift instead
 602       bool use_constant = false;
 603       bool use_tmp = false;
 604       if (right_arg->is_constant()) {
 605         int iconst = right_arg->get_jint_constant();
 606         if (iconst > 0) {
 607           if (is_power_of_2(iconst)) {
 608             use_constant = true;
 609           } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
 610             use_constant = true;
 611             use_tmp = true;
 612           }
 613         }
 614       }
 615       if (use_constant) {
 616         right_arg->dont_load_item();
 617       } else {
 618         right_arg->load_item();
 619       }
 620       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 621       if (use_tmp) {
 622         tmp = new_register(T_INT);
 623       }
 624       rlock_result(x);
 625 
 626       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 627     } else {
 628       right_arg->dont_load_item();
 629       rlock_result(x);
 630       LIR_Opr tmp = LIR_OprFact::illegalOpr;
 631       arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
 632     }
 633   }
 634 }
 635 
 636 
 637 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 638   // when an operand with use count 1 is the left operand, then it is
 639   // likely that no move for 2-operand-LIR-form is necessary
 640   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 641     x->swap_operands();
 642   }
 643 
 644   ValueTag tag = x->type()->tag();
 645   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 646   switch (tag) {
 647     case floatTag:
 648     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 649     case longTag:    do_ArithmeticOp_Long(x); return;
 650     case intTag:     do_ArithmeticOp_Int(x);  return;
 651   }
 652   ShouldNotReachHere();
 653 }
 654 
 655 
 656 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 657 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 658   // count must always be in rcx
 659   LIRItem value(x->x(), this);
 660   LIRItem count(x->y(), this);
 661 
 662   ValueTag elemType = x->type()->tag();
 663   bool must_load_count = !count.is_constant() || elemType == longTag;
 664   if (must_load_count) {
 665     // count for long must be in register
 666     count.load_item_force(shiftCountOpr());
 667   } else {
 668     count.dont_load_item();
 669   }
 670   value.load_item();
 671   LIR_Opr reg = rlock_result(x);
 672 
 673   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 674 }
 675 
 676 
 677 // _iand, _land, _ior, _lor, _ixor, _lxor
 678 void LIRGenerator::do_LogicOp(LogicOp* x) {
 679   // when an operand with use count 1 is the left operand, then it is
 680   // likely that no move for 2-operand-LIR-form is necessary
 681   if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
 682     x->swap_operands();
 683   }
 684 
 685   LIRItem left(x->x(), this);
 686   LIRItem right(x->y(), this);
 687 
 688   left.load_item();
 689   right.load_nonconstant();
 690   LIR_Opr reg = rlock_result(x);
 691 
 692   logic_op(x->op(), reg, left.result(), right.result());
 693 }
 694 
 695 
 696 
 697 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 698 void LIRGenerator::do_CompareOp(CompareOp* x) {
 699   LIRItem left(x->x(), this);
 700   LIRItem right(x->y(), this);
 701   ValueTag tag = x->x()->type()->tag();
 702   if (tag == longTag) {
 703     left.set_destroys_register();
 704   }
 705   left.load_item();
 706   right.load_item();
 707   LIR_Opr reg = rlock_result(x);
 708 
 709   if (x->x()->type()->is_float_kind()) {
 710     Bytecodes::Code code = x->op();
 711     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 712   } else if (x->x()->type()->tag() == longTag) {
 713     __ lcmp2int(left.result(), right.result(), reg);
 714   } else {
 715     Unimplemented();
 716   }
 717 }
 718 
 719 
 720 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
 721   assert(x->number_of_arguments() == 4, "wrong type");
 722   LIRItem obj   (x->argument_at(0), this);  // object
 723   LIRItem off   (x->argument_at(1), this);  // offset of field
 724   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
 725   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
 726 
 727   assert(obj.type()->tag() == objectTag, "invalid type");
 728 
 729   // In 64bit the type can be long, sparc doesn't have this assert
 730   // assert(offset.type()->tag() == intTag, "invalid type");
 731 
 732   assert(cmp.type()->tag() == type->tag(), "invalid type");
 733   assert(val.type()->tag() == type->tag(), "invalid type");
 734 
 735   // get address of field
 736   obj.load_item();
 737   off.load_nonconstant();
 738 
 739   LIR_Opr offset = unpack_offset(obj.result(), off.result());
 740 
 741   if (type == objectType) {
 742     cmp.load_item_force(FrameMap::rax_oop_opr);
 743     val.load_item();
 744   } else if (type == intType) {
 745     cmp.load_item_force(FrameMap::rax_opr);
 746     val.load_item();
 747   } else if (type == longType) {
 748     cmp.load_item_force(FrameMap::long0_opr);
 749     val.load_item_force(FrameMap::long1_opr);
 750   } else {
 751     ShouldNotReachHere();
 752   }
 753 
 754   LIR_Opr addr = new_pointer_register();
 755   LIR_Address* a;
 756   if(offset->is_constant()) {
 757 #ifdef _LP64
 758     jlong c = offset->as_jlong();
 759     if ((jlong)((jint)c) == c) {
 760       a = new LIR_Address(obj.result(),
 761                           (jint)c,
 762                           as_BasicType(type));
 763     } else {
 764       LIR_Opr tmp = new_register(T_LONG);
 765       __ move(offset, tmp);
 766       a = new LIR_Address(obj.result(),
 767                           tmp,
 768                           as_BasicType(type));
 769     }
 770 #else
 771     a = new LIR_Address(obj.result(),
 772                         offset->as_jint(),
 773                         as_BasicType(type));
 774 #endif
 775   } else {
 776     a = new LIR_Address(obj.result(),
 777                         offset,
 778                         LIR_Address::times_1,
 779                         0,
 780                         as_BasicType(type));
 781   }
 782   __ leal(LIR_OprFact::address(a), addr);
 783 
 784   if (type == objectType) {  // Write-barrier needed for Object fields.
 785     // Do the pre-write barrier, if any.
 786     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
 787                 true /* do_load */, false /* patch */, NULL);
 788   }
 789 
 790   LIR_Opr ill = LIR_OprFact::illegalOpr;  // for convenience
 791   if (type == objectType)
 792     __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
 793   else if (type == intType)
 794     __ cas_int(addr, cmp.result(), val.result(), ill, ill);
 795   else if (type == longType)
 796     __ cas_long(addr, cmp.result(), val.result(), ill, ill);
 797   else {
 798     ShouldNotReachHere();
 799   }
 800 
 801   // generate conditional move of boolean result
 802   LIR_Opr result = rlock_result(x);
 803   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 804            result, as_BasicType(type));
 805   if (type == objectType) {   // Write-barrier needed for Object fields.
 806     // Seems to be precise
 807     post_barrier(addr, val.result());
 808   }
 809 }
 810 
 811 
 812 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 813   assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
 814   LIRItem value(x->argument_at(0), this);
 815 
 816   bool use_fpu = false;
 817   if (UseSSE >= 2) {
 818     switch(x->id()) {
 819       case vmIntrinsics::_dsin:
 820       case vmIntrinsics::_dcos:
 821       case vmIntrinsics::_dtan:
 822       case vmIntrinsics::_dlog:
 823       case vmIntrinsics::_dlog10:
 824       case vmIntrinsics::_dexp:
 825       case vmIntrinsics::_dpow:
 826         use_fpu = true;
 827     }
 828   } else {
 829     value.set_destroys_register();
 830   }
 831 
 832   value.load_item();
 833 
 834   LIR_Opr calc_input = value.result();
 835   LIR_Opr calc_input2 = NULL;
 836   if (x->id() == vmIntrinsics::_dpow) {
 837     LIRItem extra_arg(x->argument_at(1), this);
 838     if (UseSSE < 2) {
 839       extra_arg.set_destroys_register();
 840     }
 841     extra_arg.load_item();
 842     calc_input2 = extra_arg.result();
 843   }
 844   LIR_Opr calc_result = rlock_result(x);
 845 
 846   // sin, cos, pow and exp need two free fpu stack slots, so register
 847   // two temporary operands
 848   LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0);
 849   LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1);
 850 
 851   if (use_fpu) {
 852     LIR_Opr tmp = FrameMap::fpu0_double_opr;
 853     int tmp_start = 1;
 854     if (calc_input2 != NULL) {
 855       __ move(calc_input2, tmp);
 856       tmp_start = 2;
 857       calc_input2 = tmp;
 858     }
 859     __ move(calc_input, tmp);
 860 
 861     calc_input = tmp;
 862     calc_result = tmp;
 863 
 864     tmp1 = FrameMap::caller_save_fpu_reg_at(tmp_start);
 865     tmp2 = FrameMap::caller_save_fpu_reg_at(tmp_start + 1);
 866   }
 867 
 868   switch(x->id()) {
 869     case vmIntrinsics::_dabs:   __ abs  (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 870     case vmIntrinsics::_dsqrt:  __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
 871     case vmIntrinsics::_dsin:   __ sin  (calc_input, calc_result, tmp1, tmp2);              break;
 872     case vmIntrinsics::_dcos:   __ cos  (calc_input, calc_result, tmp1, tmp2);              break;
 873     case vmIntrinsics::_dtan:   __ tan  (calc_input, calc_result, tmp1, tmp2);              break;
 874     case vmIntrinsics::_dlog:   __ log  (calc_input, calc_result, tmp1);                    break;
 875     case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1);                    break;
 876     case vmIntrinsics::_dexp:   __ exp  (calc_input, calc_result,              tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;
 877     case vmIntrinsics::_dpow:   __ pow  (calc_input, calc_input2, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;
 878     default:                    ShouldNotReachHere();
 879   }
 880 
 881   if (use_fpu) {
 882     __ move(calc_result, x->operand());
 883   }
 884 }
 885 
 886 
 887 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 888   assert(x->number_of_arguments() == 5, "wrong type");
 889 
 890   // Make all state_for calls early since they can emit code
 891   CodeEmitInfo* info = state_for(x, x->state());
 892 
 893   LIRItem src(x->argument_at(0), this);
 894   LIRItem src_pos(x->argument_at(1), this);
 895   LIRItem dst(x->argument_at(2), this);
 896   LIRItem dst_pos(x->argument_at(3), this);
 897   LIRItem length(x->argument_at(4), this);
 898 
 899   // operands for arraycopy must use fixed registers, otherwise
 900   // LinearScan will fail allocation (because arraycopy always needs a
 901   // call)
 902 
 903 #ifndef _LP64
 904   src.load_item_force     (FrameMap::rcx_oop_opr);
 905   src_pos.load_item_force (FrameMap::rdx_opr);
 906   dst.load_item_force     (FrameMap::rax_oop_opr);
 907   dst_pos.load_item_force (FrameMap::rbx_opr);
 908   length.load_item_force  (FrameMap::rdi_opr);
 909   LIR_Opr tmp =           (FrameMap::rsi_opr);
 910 #else
 911 
 912   // The java calling convention will give us enough registers
 913   // so that on the stub side the args will be perfect already.
 914   // On the other slow/special case side we call C and the arg
 915   // positions are not similar enough to pick one as the best.
 916   // Also because the java calling convention is a "shifted" version
 917   // of the C convention we can process the java args trivially into C
 918   // args without worry of overwriting during the xfer
 919 
 920   src.load_item_force     (FrameMap::as_oop_opr(j_rarg0));
 921   src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
 922   dst.load_item_force     (FrameMap::as_oop_opr(j_rarg2));
 923   dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
 924   length.load_item_force  (FrameMap::as_opr(j_rarg4));
 925 
 926   LIR_Opr tmp =           FrameMap::as_opr(j_rarg5);
 927 #endif // LP64
 928 
 929   set_no_result(x);
 930 
 931   int flags;
 932   ciArrayKlass* expected_type;
 933   arraycopy_helper(x, &flags, &expected_type);
 934 
 935   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
 936 }
 937 
 938 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
 939   assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
 940   // Make all state_for calls early since they can emit code
 941   LIR_Opr result = rlock_result(x);
 942   int flags = 0;
 943   switch (x->id()) {
 944     case vmIntrinsics::_updateCRC32: {
 945       LIRItem crc(x->argument_at(0), this);
 946       LIRItem val(x->argument_at(1), this);
 947       // val is destroyed by update_crc32
 948       val.set_destroys_register();
 949       crc.load_item();
 950       val.load_item();
 951       __ update_crc32(crc.result(), val.result(), result);
 952       break;
 953     }
 954     case vmIntrinsics::_updateBytesCRC32:
 955     case vmIntrinsics::_updateByteBufferCRC32: {
 956       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
 957 
 958       LIRItem crc(x->argument_at(0), this);
 959       LIRItem buf(x->argument_at(1), this);
 960       LIRItem off(x->argument_at(2), this);
 961       LIRItem len(x->argument_at(3), this);
 962       buf.load_item();
 963       off.load_nonconstant();
 964 
 965       LIR_Opr index = off.result();
 966       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
 967       if(off.result()->is_constant()) {
 968         index = LIR_OprFact::illegalOpr;
 969        offset += off.result()->as_jint();
 970       }
 971       LIR_Opr base_op = buf.result();
 972 
 973 #ifndef _LP64
 974       if (!is_updateBytes) { // long b raw address
 975          base_op = new_register(T_INT);
 976          __ convert(Bytecodes::_l2i, buf.result(), base_op);
 977       }
 978 #else
 979       if (index->is_valid()) {
 980         LIR_Opr tmp = new_register(T_LONG);
 981         __ convert(Bytecodes::_i2l, index, tmp);
 982         index = tmp;
 983       }
 984 #endif
 985 
 986       LIR_Address* a = new LIR_Address(base_op,
 987                                        index,
 988                                        LIR_Address::times_1,
 989                                        offset,
 990                                        T_BYTE);
 991       BasicTypeList signature(3);
 992       signature.append(T_INT);
 993       signature.append(T_ADDRESS);
 994       signature.append(T_INT);
 995       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 996       const LIR_Opr result_reg = result_register_for(x->type());
 997 
 998       LIR_Opr addr = new_pointer_register();
 999       __ leal(LIR_OprFact::address(a), addr);
1000 
1001       crc.load_item_force(cc->at(0));
1002       __ move(addr, cc->at(1));
1003       len.load_item_force(cc->at(2));
1004 
1005       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1006       __ move(result_reg, result);
1007 
1008       break;
1009     }
1010     default: {
1011       ShouldNotReachHere();
1012     }
1013   }
1014 }
1015 
1016 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1017 // _i2b, _i2c, _i2s
1018 LIR_Opr fixed_register_for(BasicType type) {
1019   switch (type) {
1020     case T_FLOAT:  return FrameMap::fpu0_float_opr;
1021     case T_DOUBLE: return FrameMap::fpu0_double_opr;
1022     case T_INT:    return FrameMap::rax_opr;
1023     case T_LONG:   return FrameMap::long0_opr;
1024     default:       ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1025   }
1026 }
1027 
1028 void LIRGenerator::do_Convert(Convert* x) {
1029   // flags that vary for the different operations and different SSE-settings
1030   bool fixed_input, fixed_result, round_result, needs_stub;
1031 
1032   switch (x->op()) {
1033     case Bytecodes::_i2l: // fall through
1034     case Bytecodes::_l2i: // fall through
1035     case Bytecodes::_i2b: // fall through
1036     case Bytecodes::_i2c: // fall through
1037     case Bytecodes::_i2s: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1038 
1039     case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false;       round_result = false;      needs_stub = false; break;
1040     case Bytecodes::_d2f: fixed_input = false;       fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1041     case Bytecodes::_i2f: fixed_input = false;       fixed_result = false;       round_result = UseSSE < 1; needs_stub = false; break;
1042     case Bytecodes::_i2d: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = false; break;
1043     case Bytecodes::_f2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1044     case Bytecodes::_d2i: fixed_input = false;       fixed_result = false;       round_result = false;      needs_stub = true;  break;
1045     case Bytecodes::_l2f: fixed_input = false;       fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1046     case Bytecodes::_l2d: fixed_input = false;       fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1047     case Bytecodes::_f2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1048     case Bytecodes::_d2l: fixed_input = true;        fixed_result = true;        round_result = false;      needs_stub = false; break;
1049     default: ShouldNotReachHere();
1050   }
1051 
1052   LIRItem value(x->value(), this);
1053   value.load_item();
1054   LIR_Opr input = value.result();
1055   LIR_Opr result = rlock(x);
1056 
1057   // arguments of lir_convert
1058   LIR_Opr conv_input = input;
1059   LIR_Opr conv_result = result;
1060   ConversionStub* stub = NULL;
1061 
1062   if (fixed_input) {
1063     conv_input = fixed_register_for(input->type());
1064     __ move(input, conv_input);
1065   }
1066 
1067   assert(fixed_result == false || round_result == false, "cannot set both");
1068   if (fixed_result) {
1069     conv_result = fixed_register_for(result->type());
1070   } else if (round_result) {
1071     result = new_register(result->type());
1072     set_vreg_flag(result, must_start_in_memory);
1073   }
1074 
1075   if (needs_stub) {
1076     stub = new ConversionStub(x->op(), conv_input, conv_result);
1077   }
1078 
1079   __ convert(x->op(), conv_input, conv_result, stub);
1080 
1081   if (result != conv_result) {
1082     __ move(conv_result, result);
1083   }
1084 
1085   assert(result->is_virtual(), "result must be virtual register");
1086   set_result(x, result);
1087 }
1088 
1089 
1090 void LIRGenerator::do_NewInstance(NewInstance* x) {
1091   print_if_not_loaded(x);
1092 
1093   CodeEmitInfo* info = state_for(x, x->state());
1094   LIR_Opr reg = result_register_for(x->type());
1095   new_instance(reg, x->klass(), x->is_unresolved(),
1096                        FrameMap::rcx_oop_opr,
1097                        FrameMap::rdi_oop_opr,
1098                        FrameMap::rsi_oop_opr,
1099                        LIR_OprFact::illegalOpr,
1100                        FrameMap::rdx_metadata_opr, info);
1101   LIR_Opr result = rlock_result(x);
1102   __ move(reg, result);
1103 }
1104 
1105 
1106 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1107   CodeEmitInfo* info = state_for(x, x->state());
1108 
1109   LIRItem length(x->length(), this);
1110   length.load_item_force(FrameMap::rbx_opr);
1111 
1112   LIR_Opr reg = result_register_for(x->type());
1113   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1114   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1115   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1116   LIR_Opr tmp4 = reg;
1117   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1118   LIR_Opr len = length.result();
1119   BasicType elem_type = x->elt_type();
1120 
1121   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1122 
1123   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1124   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1125 
1126   LIR_Opr result = rlock_result(x);
1127   __ move(reg, result);
1128 }
1129 
1130 
1131 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1132   LIRItem length(x->length(), this);
1133   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1134   // and therefore provide the state before the parameters have been consumed
1135   CodeEmitInfo* patching_info = NULL;
1136   if (!x->klass()->is_loaded() || PatchALot) {
1137     patching_info =  state_for(x, x->state_before());
1138   }
1139 
1140   CodeEmitInfo* info = state_for(x, x->state());
1141 
1142   const LIR_Opr reg = result_register_for(x->type());
1143   LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1144   LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1145   LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1146   LIR_Opr tmp4 = reg;
1147   LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1148 
1149   length.load_item_force(FrameMap::rbx_opr);
1150   LIR_Opr len = length.result();
1151 
1152   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1153   ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1154   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1155     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1156   }
1157   klass2reg_with_patching(klass_reg, obj, patching_info);
1158   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1159 
1160   LIR_Opr result = rlock_result(x);
1161   __ move(reg, result);
1162 }
1163 
1164 
1165 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1166   Values* dims = x->dims();
1167   int i = dims->length();
1168   LIRItemList* items = new LIRItemList(dims->length(), NULL);
1169   while (i-- > 0) {
1170     LIRItem* size = new LIRItem(dims->at(i), this);
1171     items->at_put(i, size);
1172   }
1173 
1174   // Evaluate state_for early since it may emit code.
1175   CodeEmitInfo* patching_info = NULL;
1176   if (!x->klass()->is_loaded() || PatchALot) {
1177     patching_info = state_for(x, x->state_before());
1178 
1179     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1180     // clone all handlers (NOTE: Usually this is handled transparently
1181     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1182     // is done explicitly here because a stub isn't being used).
1183     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1184   }
1185   CodeEmitInfo* info = state_for(x, x->state());
1186 
1187   i = dims->length();
1188   while (i-- > 0) {
1189     LIRItem* size = items->at(i);
1190     size->load_nonconstant();
1191 
1192     store_stack_parameter(size->result(), in_ByteSize(i*4));
1193   }
1194 
1195   LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1196   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1197 
1198   LIR_Opr rank = FrameMap::rbx_opr;
1199   __ move(LIR_OprFact::intConst(x->rank()), rank);
1200   LIR_Opr varargs = FrameMap::rcx_opr;
1201   __ move(FrameMap::rsp_opr, varargs);
1202   LIR_OprList* args = new LIR_OprList(3);
1203   args->append(klass_reg);
1204   args->append(rank);
1205   args->append(varargs);
1206   LIR_Opr reg = result_register_for(x->type());
1207   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1208                   LIR_OprFact::illegalOpr,
1209                   reg, args, info);
1210 
1211   LIR_Opr result = rlock_result(x);
1212   __ move(reg, result);
1213 }
1214 
1215 
1216 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1217   // nothing to do for now
1218 }
1219 
1220 
1221 void LIRGenerator::do_CheckCast(CheckCast* x) {
1222   LIRItem obj(x->obj(), this);
1223 
1224   CodeEmitInfo* patching_info = NULL;
1225   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1226     // must do this before locking the destination register as an oop register,
1227     // and before the obj is loaded (the latter is for deoptimization)
1228     patching_info = state_for(x, x->state_before());
1229   }
1230   obj.load_item();
1231 
1232   // info for exceptions
1233   CodeEmitInfo* info_for_exception = state_for(x);
1234 
1235   CodeStub* stub;
1236   if (x->is_incompatible_class_change_check()) {
1237     assert(patching_info == NULL, "can't patch this");
1238     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1239   } else {
1240     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1241   }
1242   LIR_Opr reg = rlock_result(x);
1243   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1244   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1245     tmp3 = new_register(objectType);
1246   }
1247   __ checkcast(reg, obj.result(), x->klass(),
1248                new_register(objectType), new_register(objectType), tmp3,
1249                x->direct_compare(), info_for_exception, patching_info, stub,
1250                x->profiled_method(), x->profiled_bci());
1251 }
1252 
1253 
1254 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1255   LIRItem obj(x->obj(), this);
1256 
1257   // result and test object may not be in same register
1258   LIR_Opr reg = rlock_result(x);
1259   CodeEmitInfo* patching_info = NULL;
1260   if ((!x->klass()->is_loaded() || PatchALot)) {
1261     // must do this before locking the destination register as an oop register
1262     patching_info = state_for(x, x->state_before());
1263   }
1264   obj.load_item();
1265   LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1266   if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1267     tmp3 = new_register(objectType);
1268   }
1269   __ instanceof(reg, obj.result(), x->klass(),
1270                 new_register(objectType), new_register(objectType), tmp3,
1271                 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1272 }
1273 
1274 
1275 void LIRGenerator::do_If(If* x) {
1276   assert(x->number_of_sux() == 2, "inconsistency");
1277   ValueTag tag = x->x()->type()->tag();
1278   bool is_safepoint = x->is_safepoint();
1279 
1280   If::Condition cond = x->cond();
1281 
1282   LIRItem xitem(x->x(), this);
1283   LIRItem yitem(x->y(), this);
1284   LIRItem* xin = &xitem;
1285   LIRItem* yin = &yitem;
1286 
1287   if (tag == longTag) {
1288     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1289     // mirror for other conditions
1290     if (cond == If::gtr || cond == If::leq) {
1291       cond = Instruction::mirror(cond);
1292       xin = &yitem;
1293       yin = &xitem;
1294     }
1295     xin->set_destroys_register();
1296   }
1297   xin->load_item();
1298   if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1299     // inline long zero
1300     yin->dont_load_item();
1301   } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1302     // longs cannot handle constants at right side
1303     yin->load_item();
1304   } else {
1305     yin->dont_load_item();
1306   }
1307 
1308   // add safepoint before generating condition code so it can be recomputed
1309   if (x->is_safepoint()) {
1310     // increment backedge counter if needed
1311     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1312     __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1313   }
1314   set_no_result(x);
1315 
1316   LIR_Opr left = xin->result();
1317   LIR_Opr right = yin->result();
1318   __ cmp(lir_cond(cond), left, right);
1319   // Generate branch profiling. Profiling code doesn't kill flags.
1320   profile_branch(x, cond);
1321   move_to_phi(x->state());
1322   if (x->x()->type()->is_float_kind()) {
1323     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1324   } else {
1325     __ branch(lir_cond(cond), right->type(), x->tsux());
1326   }
1327   assert(x->default_sux() == x->fsux(), "wrong destination above");
1328   __ jump(x->default_sux());
1329 }
1330 
1331 
1332 LIR_Opr LIRGenerator::getThreadPointer() {
1333 #ifdef _LP64
1334   return FrameMap::as_pointer_opr(r15_thread);
1335 #else
1336   LIR_Opr result = new_register(T_INT);
1337   __ get_thread(result);
1338   return result;
1339 #endif //
1340 }
1341 
1342 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1343   store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1344   LIR_OprList* args = new LIR_OprList();
1345   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1346   __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1347 }
1348 
1349 
1350 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1351                                         CodeEmitInfo* info) {
1352   if (address->type() == T_LONG) {
1353     address = new LIR_Address(address->base(),
1354                               address->index(), address->scale(),
1355                               address->disp(), T_DOUBLE);
1356     // Transfer the value atomically by using FP moves.  This means
1357     // the value has to be moved between CPU and FPU registers.  It
1358     // always has to be moved through spill slot since there's no
1359     // quick way to pack the value into an SSE register.
1360     LIR_Opr temp_double = new_register(T_DOUBLE);
1361     LIR_Opr spill = new_register(T_LONG);
1362     set_vreg_flag(spill, must_start_in_memory);
1363     __ move(value, spill);
1364     __ volatile_move(spill, temp_double, T_LONG);
1365     __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1366   } else {
1367     __ store(value, address, info);
1368   }
1369 }
1370 
1371 
1372 
1373 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1374                                        CodeEmitInfo* info) {
1375   if (address->type() == T_LONG) {
1376     address = new LIR_Address(address->base(),
1377                               address->index(), address->scale(),
1378                               address->disp(), T_DOUBLE);
1379     // Transfer the value atomically by using FP moves.  This means
1380     // the value has to be moved between CPU and FPU registers.  In
1381     // SSE0 and SSE1 mode it has to be moved through spill slot but in
1382     // SSE2+ mode it can be moved directly.
1383     LIR_Opr temp_double = new_register(T_DOUBLE);
1384     __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1385     __ volatile_move(temp_double, result, T_LONG);
1386     if (UseSSE < 2) {
1387       // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1388       set_vreg_flag(result, must_start_in_memory);
1389     }
1390   } else {
1391     __ load(address, result, info);
1392   }
1393 }
1394 
1395 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1396                                      BasicType type, bool is_volatile) {
1397   if (is_volatile && type == T_LONG) {
1398     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1399     LIR_Opr tmp = new_register(T_DOUBLE);
1400     __ load(addr, tmp);
1401     LIR_Opr spill = new_register(T_LONG);
1402     set_vreg_flag(spill, must_start_in_memory);
1403     __ move(tmp, spill);
1404     __ move(spill, dst);
1405   } else {
1406     LIR_Address* addr = new LIR_Address(src, offset, type);
1407     __ load(addr, dst);
1408   }
1409 }
1410 
1411 
1412 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1413                                      BasicType type, bool is_volatile) {
1414   if (is_volatile && type == T_LONG) {
1415     LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1416     LIR_Opr tmp = new_register(T_DOUBLE);
1417     LIR_Opr spill = new_register(T_DOUBLE);
1418     set_vreg_flag(spill, must_start_in_memory);
1419     __ move(data, spill);
1420     __ move(spill, tmp);
1421     __ move(tmp, addr);
1422   } else {
1423     LIR_Address* addr = new LIR_Address(src, offset, type);
1424     bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1425     if (is_obj) {
1426       // Do the pre-write barrier, if any.
1427       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1428                   true /* do_load */, false /* patch */, NULL);
1429       __ move(data, addr);
1430       assert(src->is_register(), "must be register");
1431       // Seems to be a precise address
1432       post_barrier(LIR_OprFact::address(addr), data);
1433     } else {
1434       __ move(data, addr);
1435     }
1436   }
1437 }
1438 
1439 LIR_Opr LIRGenerator::unpack_offset(LIR_Opr src, LIR_Opr off) {
1440   LIR_Opr tmp = new_register(NOT_LP64(T_INT) LP64_ONLY(T_LONG));
1441   LabelObj* Lcont = new LabelObj();
1442   __ move(off, tmp);
1443   __ cmp(lir_cond_equal, src, LIR_OprFact::oopConst(NULL));
1444   __ branch(lir_cond_equal, T_OBJECT, Lcont->label());
1445   __ shift_right(tmp, Unsafe::offset_shift, tmp);
1446   __ branch_destination(Lcont->label());
1447   return tmp;
1448 }
1449 
1450 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1451   BasicType type = x->basic_type();
1452   LIRItem src(x->object(), this);
1453   LIRItem off(x->offset(), this);
1454   LIRItem value(x->value(), this);
1455 
1456   src.load_item();
1457   value.load_item();
1458   off.load_nonconstant();
1459 
1460   LIR_Opr offset = unpack_offset(src.result(), off.result());
1461 
1462   LIR_Opr dst = rlock_result(x, type);
1463   LIR_Opr data = value.result();
1464   bool is_obj = (type == T_ARRAY || type == T_OBJECT);

1465 
1466   assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1467   LIR_Address* addr;
1468   if (offset->is_constant()) {
1469 #ifdef _LP64
1470     jlong c = offset->as_jlong();
1471     if ((jlong)((jint)c) == c) {
1472       addr = new LIR_Address(src.result(), (jint)c, type);
1473     } else {
1474       LIR_Opr tmp = new_register(T_LONG);
1475       __ move(offset, tmp);
1476       addr = new LIR_Address(src.result(), tmp, type);
1477     }
1478 #else
1479     addr = new LIR_Address(src.result(), offset->as_jint(), type);
1480 #endif
1481   } else {
1482     addr = new LIR_Address(src.result(), offset, type);
1483   }
1484 
1485   // Because we want a 2-arg form of xchg and xadd
1486   __ move(data, dst);
1487 
1488   if (x->is_add()) {
1489     __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1490   } else {
1491     if (is_obj) {
1492       // Do the pre-write barrier, if any.
1493       pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1494                   true /* do_load */, false /* patch */, NULL);
1495     }
1496     __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1497     if (is_obj) {
1498       // Seems to be a precise address
1499       post_barrier(LIR_OprFact::address(addr), data);
1500     }
1501   }
1502 }
--- EOF ---