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src/share/vm/adlc/output_c.cpp
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*** 47,57 ****
RegDef *next = NULL;
registers->reset_RegDefs();
for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) {
next = registers->iter_RegDefs();
const char *comma = (next != NULL) ? "," : " // no trailing comma";
! fprintf(fp," \"%s\"%s\n", reg_def->_regname, comma);
}
// Finish defining enumeration
fprintf(fp,"};\n");
--- 47,57 ----
RegDef *next = NULL;
registers->reset_RegDefs();
for (reg_def = registers->iter_RegDefs(); reg_def != NULL; reg_def = next) {
next = registers->iter_RegDefs();
const char *comma = (next != NULL) ? "," : " // no trailing comma";
! fprintf(fp," \"Opcodes::%s\"%s\n", reg_def->_regname, comma);
}
// Finish defining enumeration
fprintf(fp,"};\n");
*** 1711,1721 ****
syntax_err(node->_linenum, "In %s only bound registers can be killed: %s %s\n",
node->_ident, comp->_type, comp->_name);
}
fprintf(fp," kill = ");
! fprintf(fp,"new MachProjNode( %s, %d, (%s), Op_%s );\n",
machNode, proj_no++, regmask, ideal_type);
fprintf(fp," proj_list.push(kill);\n");
}
}
}
--- 1711,1721 ----
syntax_err(node->_linenum, "In %s only bound registers can be killed: %s %s\n",
node->_ident, comp->_type, comp->_name);
}
fprintf(fp," kill = ");
! fprintf(fp,"new MachProjNode( %s, %d, (%s), Opcodes::Op_%s );\n",
machNode, proj_no++, regmask, ideal_type);
fprintf(fp," proj_list.push(kill);\n");
}
}
}
*** 3635,3645 ****
// Build external declarations for mappings
fprintf(fp_hpp, "\n");
fprintf(fp_hpp, "extern const char register_save_policy[];\n");
fprintf(fp_hpp, "extern const char c_reg_save_policy[];\n");
! fprintf(fp_hpp, "extern const int register_save_type[];\n");
fprintf(fp_hpp, "\n");
// Construct Save-Policy array
fprintf(fp_cpp, "// Map from machine-independent register number to register_save_policy\n");
fprintf(fp_cpp, "const char register_save_policy[] = {\n");
--- 3635,3645 ----
// Build external declarations for mappings
fprintf(fp_hpp, "\n");
fprintf(fp_hpp, "extern const char register_save_policy[];\n");
fprintf(fp_hpp, "extern const char c_reg_save_policy[];\n");
! fprintf(fp_hpp, "extern const Opcodes register_save_type[];\n");
fprintf(fp_hpp, "\n");
// Construct Save-Policy array
fprintf(fp_cpp, "// Map from machine-independent register number to register_save_policy\n");
fprintf(fp_cpp, "const char register_save_policy[] = {\n");
*** 3664,3679 ****
}
fprintf(fp_cpp, "};\n\n");
// Construct Register Save Type array
fprintf(fp_cpp, "// Map from machine-independent register number to register_save_type\n");
! fprintf(fp_cpp, "const int register_save_type[] = {\n");
_register->reset_RegDefs();
for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) {
next = _register->iter_RegDefs();
const char *comma = (next != NULL) ? "," : " // no trailing comma";
! fprintf(fp_cpp, " %s%s\n", rdef->_idealtype, comma);
}
fprintf(fp_cpp, "};\n\n");
// Construct the table for reduceOp
OutputReduceOp output_reduce_op(fp_hpp, fp_cpp, _globalNames, *this);
--- 3664,3680 ----
}
fprintf(fp_cpp, "};\n\n");
// Construct Register Save Type array
fprintf(fp_cpp, "// Map from machine-independent register number to register_save_type\n");
! fprintf(fp_cpp, "const Opcodes register_save_type[] = {\n");
_register->reset_RegDefs();
for( rdef = _register->iter_RegDefs(); rdef != NULL; rdef = next ) {
next = _register->iter_RegDefs();
const char *comma = (next != NULL) ? "," : " // no trailing comma";
! const char *idealtype = (next != NULL) ? rdef->_idealtype : "Op_Node";
! fprintf(fp_cpp, " Opcodes::%s%s\n", idealtype, comma);
}
fprintf(fp_cpp, "};\n\n");
// Construct the table for reduceOp
OutputReduceOp output_reduce_op(fp_hpp, fp_cpp, _globalNames, *this);
*** 4095,4112 ****
//---------------------------buildInstructMatchCheck--------------------------
// Output the method to Matcher which checks whether or not a specific
// instruction has a matching rule for the host architecture.
void ArchDesc::buildInstructMatchCheck(FILE *fp_cpp) const {
fprintf(fp_cpp, "\n\n");
! fprintf(fp_cpp, "const bool Matcher::has_match_rule(int opcode) {\n");
! fprintf(fp_cpp, " assert(_last_machine_leaf < opcode && opcode < _last_opcode, \"opcode in range\");\n");
! fprintf(fp_cpp, " return _hasMatchRule[opcode];\n");
fprintf(fp_cpp, "}\n\n");
! fprintf(fp_cpp, "const bool Matcher::_hasMatchRule[_last_opcode] = {\n");
! int i;
! for (i = 0; i < _last_opcode - 1; i++) {
fprintf(fp_cpp, " %-5s, // %s\n",
_has_match_rule[i] ? "true" : "false",
NodeClassNames[i]);
}
fprintf(fp_cpp, " %-5s // %s\n",
--- 4096,4113 ----
//---------------------------buildInstructMatchCheck--------------------------
// Output the method to Matcher which checks whether or not a specific
// instruction has a matching rule for the host architecture.
void ArchDesc::buildInstructMatchCheck(FILE *fp_cpp) const {
fprintf(fp_cpp, "\n\n");
! fprintf(fp_cpp, "const bool Matcher::has_match_rule(Opcodes opcode) {\n");
! fprintf(fp_cpp, " assert(Opcodes::_last_machine_leaf < opcode && opcode < Opcodes::_last_opcode, \"opcode in range\");\n");
! fprintf(fp_cpp, " return _hasMatchRule[static_cast<uint>(opcode)];\n");
fprintf(fp_cpp, "}\n\n");
! fprintf(fp_cpp, "const bool Matcher::_hasMatchRule[static_cast<uint>(Opcodes::_last_opcode)] = {\n");
! uint i;
! for (i = 0; i < static_cast<uint>(Opcodes::_last_opcode) - 1; i++) {
fprintf(fp_cpp, " %-5s, // %s\n",
_has_match_rule[i] ? "true" : "false",
NodeClassNames[i]);
}
fprintf(fp_cpp, " %-5s // %s\n",
*** 4154,4168 ****
// Native Argument Position
fprintf(fp_cpp,"void Matcher::c_calling_convention(BasicType *sig_bt, VMRegPair *regs, uint length) {\n");
fprintf(fp_cpp,"%s\n", _frame->_c_calling_convention);
fprintf(fp_cpp,"}\n\n");
// Java Return Value Location
! fprintf(fp_cpp,"OptoRegPair Matcher::return_value(int ideal_reg, bool is_outgoing) {\n");
fprintf(fp_cpp,"%s\n", _frame->_return_value);
fprintf(fp_cpp,"}\n\n");
// Native Return Value Location
! fprintf(fp_cpp,"OptoRegPair Matcher::c_return_value(int ideal_reg, bool is_outgoing) {\n");
fprintf(fp_cpp,"%s\n", _frame->_c_return_value);
fprintf(fp_cpp,"}\n\n");
// Inline Cache Register, mask definition, and encoding
fprintf(fp_cpp,"OptoReg::Name Matcher::inline_cache_reg() {");
--- 4155,4169 ----
// Native Argument Position
fprintf(fp_cpp,"void Matcher::c_calling_convention(BasicType *sig_bt, VMRegPair *regs, uint length) {\n");
fprintf(fp_cpp,"%s\n", _frame->_c_calling_convention);
fprintf(fp_cpp,"}\n\n");
// Java Return Value Location
! fprintf(fp_cpp,"OptoRegPair Matcher::return_value(Opcodes ideal_reg, bool is_outgoing) {\n");
fprintf(fp_cpp,"%s\n", _frame->_return_value);
fprintf(fp_cpp,"}\n\n");
// Native Return Value Location
! fprintf(fp_cpp,"OptoRegPair Matcher::c_return_value(Opcodes ideal_reg, bool is_outgoing) {\n");
fprintf(fp_cpp,"%s\n", _frame->_c_return_value);
fprintf(fp_cpp,"}\n\n");
// Inline Cache Register, mask definition, and encoding
fprintf(fp_cpp,"OptoReg::Name Matcher::inline_cache_reg() {");
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