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src/share/vm/opto/divnode.cpp

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*** 116,126 **** const Type *dt = phase->type(dividend); const TypeInt *dti = dt->isa_int(); if (dti && dti->_lo >= 0) { // we don't need to round a positive dividend needs_rounding = false; ! } else if( dividend->Opcode() == Op_AndI ) { // An AND mask of sufficient size clears the low bits and // I can avoid rounding. const TypeInt *andconi_t = phase->type( dividend->in(2) )->isa_int(); if( andconi_t && andconi_t->is_con() ) { jint andconi = andconi_t->get_con(); --- 116,126 ---- const Type *dt = phase->type(dividend); const TypeInt *dti = dt->isa_int(); if (dti && dti->_lo >= 0) { // we don't need to round a positive dividend needs_rounding = false; ! } else if( dividend->Opcode() == Opcodes::Op_AndI ) { // An AND mask of sufficient size clears the low bits and // I can avoid rounding. const TypeInt *andconi_t = phase->type( dividend->in(2) )->isa_int(); if( andconi_t && andconi_t->is_con() ) { jint andconi = andconi_t->get_con();
*** 257,267 **** //---------------------long_by_long_mulhi-------------------------------------- // Generate ideal node graph for upper half of a 64 bit x 64 bit multiplication static Node* long_by_long_mulhi(PhaseGVN* phase, Node* dividend, jlong magic_const) { // If the architecture supports a 64x64 mulhi, there is // no need to synthesize it in ideal nodes. ! if (Matcher::has_match_rule(Op_MulHiL)) { Node* v = phase->longcon(magic_const); return new MulHiLNode(dividend, v); } // Taken from Hacker's Delight, Fig. 8-2. Multiply high signed. --- 257,267 ---- //---------------------long_by_long_mulhi-------------------------------------- // Generate ideal node graph for upper half of a 64 bit x 64 bit multiplication static Node* long_by_long_mulhi(PhaseGVN* phase, Node* dividend, jlong magic_const) { // If the architecture supports a 64x64 mulhi, there is // no need to synthesize it in ideal nodes. ! if (Matcher::has_match_rule(Opcodes::Op_MulHiL)) { Node* v = phase->longcon(magic_const); return new MulHiLNode(dividend, v); } // Taken from Hacker's Delight, Fig. 8-2. Multiply high signed.
*** 369,379 **** const TypeLong *dtl = dt->isa_long(); if (dtl && dtl->_lo > 0) { // we don't need to round a positive dividend needs_rounding = false; ! } else if( dividend->Opcode() == Op_AndL ) { // An AND mask of sufficient size clears the low bits and // I can avoid rounding. const TypeLong *andconl_t = phase->type( dividend->in(2) )->isa_long(); if( andconl_t && andconl_t->is_con() ) { jlong andconl = andconl_t->get_con(); --- 369,379 ---- const TypeLong *dtl = dt->isa_long(); if (dtl && dtl->_lo > 0) { // we don't need to round a positive dividend needs_rounding = false; ! } else if( dividend->Opcode() == Opcodes::Op_AndL ) { // An AND mask of sufficient size clears the low bits and // I can avoid rounding. const TypeLong *andconl_t = phase->type( dividend->in(2) )->isa_long(); if( andconl_t && andconl_t->is_con() ) { jlong andconl = andconl_t->get_con();
*** 1280,1290 **** } //------------------------------make------------------------------------------ DivModINode* DivModINode::make(Node* div_or_mod) { Node* n = div_or_mod; ! assert(n->Opcode() == Op_DivI || n->Opcode() == Op_ModI, "only div or mod input pattern accepted"); DivModINode* divmod = new DivModINode(n->in(0), n->in(1), n->in(2)); Node* dproj = new ProjNode(divmod, DivModNode::div_proj_num); Node* mproj = new ProjNode(divmod, DivModNode::mod_proj_num); --- 1280,1290 ---- } //------------------------------make------------------------------------------ DivModINode* DivModINode::make(Node* div_or_mod) { Node* n = div_or_mod; ! assert(n->Opcode() == Opcodes::Op_DivI || n->Opcode() == Opcodes::Op_ModI, "only div or mod input pattern accepted"); DivModINode* divmod = new DivModINode(n->in(0), n->in(1), n->in(2)); Node* dproj = new ProjNode(divmod, DivModNode::div_proj_num); Node* mproj = new ProjNode(divmod, DivModNode::mod_proj_num);
*** 1292,1302 **** } //------------------------------make------------------------------------------ DivModLNode* DivModLNode::make(Node* div_or_mod) { Node* n = div_or_mod; ! assert(n->Opcode() == Op_DivL || n->Opcode() == Op_ModL, "only div or mod input pattern accepted"); DivModLNode* divmod = new DivModLNode(n->in(0), n->in(1), n->in(2)); Node* dproj = new ProjNode(divmod, DivModNode::div_proj_num); Node* mproj = new ProjNode(divmod, DivModNode::mod_proj_num); --- 1292,1302 ---- } //------------------------------make------------------------------------------ DivModLNode* DivModLNode::make(Node* div_or_mod) { Node* n = div_or_mod; ! assert(n->Opcode() == Opcodes::Op_DivL || n->Opcode() == Opcodes::Op_ModL, "only div or mod input pattern accepted"); DivModLNode* divmod = new DivModLNode(n->in(0), n->in(1), n->in(2)); Node* dproj = new ProjNode(divmod, DivModNode::div_proj_num); Node* mproj = new ProjNode(divmod, DivModNode::mod_proj_num);
*** 1304,1314 **** } //------------------------------match------------------------------------------ // return result(s) along with their RegMask info Node *DivModINode::match( const ProjNode *proj, const Matcher *match ) { ! uint ideal_reg = proj->ideal_reg(); RegMask rm; if (proj->_con == div_proj_num) { rm = match->divI_proj_mask(); } else { assert(proj->_con == mod_proj_num, "must be div or mod projection"); --- 1304,1314 ---- } //------------------------------match------------------------------------------ // return result(s) along with their RegMask info Node *DivModINode::match( const ProjNode *proj, const Matcher *match ) { ! Opcodes ideal_reg = proj->ideal_reg(); RegMask rm; if (proj->_con == div_proj_num) { rm = match->divI_proj_mask(); } else { assert(proj->_con == mod_proj_num, "must be div or mod projection");
*** 1319,1329 **** //------------------------------match------------------------------------------ // return result(s) along with their RegMask info Node *DivModLNode::match( const ProjNode *proj, const Matcher *match ) { ! uint ideal_reg = proj->ideal_reg(); RegMask rm; if (proj->_con == div_proj_num) { rm = match->divL_proj_mask(); } else { assert(proj->_con == mod_proj_num, "must be div or mod projection"); --- 1319,1329 ---- //------------------------------match------------------------------------------ // return result(s) along with their RegMask info Node *DivModLNode::match( const ProjNode *proj, const Matcher *match ) { ! Opcodes ideal_reg = proj->ideal_reg(); RegMask rm; if (proj->_con == div_proj_num) { rm = match->divL_proj_mask(); } else { assert(proj->_con == mod_proj_num, "must be div or mod projection");
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