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src/share/vm/opto/ifg.cpp
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*** 362,379 ****
if( n->is_Mach() && (idx = n->as_Mach()->two_adr()) ) {
const MachNode *mach = n->as_Mach();
// Sometimes my 2-address ADDs are commuted in a bad way.
// We generally want the USE-DEF register to refer to the
// loop-varying quantity, to avoid a copy.
! uint op = mach->ideal_Opcode();
// Check that mach->num_opnds() == 3 to ensure instruction is
// not subsuming constants, effectively excludes addI_cin_imm
// Can NOT swap for instructions like addI_cin_imm since it
// is adding zero to yhi + carry and the second ideal-input
// points to the result of adding low-halves.
// Checking req() and num_opnds() does NOT distinguish addI_cout from addI_cout_imm
! if( (op == Op_AddI && mach->req() == 3 && mach->num_opnds() == 3) &&
n->in(1)->bottom_type()->base() == Type::Int &&
// See if the ADD is involved in a tight data loop the wrong way
n->in(2)->is_Phi() &&
n->in(2)->in(2) == n ) {
Node *tmp = n->in(1);
--- 362,379 ----
if( n->is_Mach() && (idx = n->as_Mach()->two_adr()) ) {
const MachNode *mach = n->as_Mach();
// Sometimes my 2-address ADDs are commuted in a bad way.
// We generally want the USE-DEF register to refer to the
// loop-varying quantity, to avoid a copy.
! Opcodes op = mach->ideal_Opcode();
// Check that mach->num_opnds() == 3 to ensure instruction is
// not subsuming constants, effectively excludes addI_cin_imm
// Can NOT swap for instructions like addI_cin_imm since it
// is adding zero to yhi + carry and the second ideal-input
// points to the result of adding low-halves.
// Checking req() and num_opnds() does NOT distinguish addI_cout from addI_cout_imm
! if( (op == Opcodes::Op_AddI && mach->req() == 3 && mach->num_opnds() == 3) &&
n->in(1)->bottom_type()->base() == Type::Int &&
// See if the ADD is involved in a tight data loop the wrong way
n->in(2)->is_Phi() &&
n->in(2)->in(2) == n ) {
Node *tmp = n->in(1);
*** 400,410 ****
uint cnt = 0;
while (lidx != 0) {
LRG& lrg = lrgs(lidx);
if (lrg.mask_is_nonempty_and_up() &&
!lrg.is_float_or_vector() &&
! lrg.mask().overlap(*Matcher::idealreg2regmask[Op_RegI])) {
cnt += lrg.reg_pressure();
}
lidx = elements.next();
}
return cnt;
--- 400,410 ----
uint cnt = 0;
while (lidx != 0) {
LRG& lrg = lrgs(lidx);
if (lrg.mask_is_nonempty_and_up() &&
!lrg.is_float_or_vector() &&
! lrg.mask().overlap(*Matcher::idealreg2regmask[static_cast<uint>(Opcodes::Op_RegI)])) {
cnt += lrg.reg_pressure();
}
lidx = elements.next();
}
return cnt;
*** 433,443 ****
if (lrg.is_float_or_vector()) {
float_pressure.lower(lrg, location);
} else {
// Do not count the SP and flag registers
const RegMask& r = lrg.mask();
! if (r.overlap(*Matcher::idealreg2regmask[Op_RegI])) {
int_pressure.lower(lrg, location);
}
}
}
if (_scheduling_info_generated == false) {
--- 433,443 ----
if (lrg.is_float_or_vector()) {
float_pressure.lower(lrg, location);
} else {
// Do not count the SP and flag registers
const RegMask& r = lrg.mask();
! if (r.overlap(*Matcher::idealreg2regmask[static_cast<uint>(Opcodes::Op_RegI)])) {
int_pressure.lower(lrg, location);
}
}
}
if (_scheduling_info_generated == false) {
*** 469,479 ****
if (ex->is_SpillCopy()) {
continue;
}
if (i > first_inst &&
! ex->is_Mach() && ex->as_Mach()->ideal_Opcode() == Op_CreateEx) {
b->remove_node(i);
b->insert_node(ex, first_inst);
}
// Stop once a CreateEx or any other node is found
break;
--- 469,479 ----
if (ex->is_SpillCopy()) {
continue;
}
if (i > first_inst &&
! ex->is_Mach() && ex->as_Mach()->ideal_Opcode() == Opcodes::Op_CreateEx) {
b->remove_node(i);
b->insert_node(ex, first_inst);
}
// Stop once a CreateEx or any other node is found
break;
*** 488,498 ****
if (lrg.is_float_or_vector()) {
float_pressure.raise(lrg);
} else {
// Do not count the SP and flag registers
const RegMask& rm = lrg.mask();
! if (rm.overlap(*Matcher::idealreg2regmask[Op_RegI])) {
int_pressure.raise(lrg);
}
}
}
}
--- 488,498 ----
if (lrg.is_float_or_vector()) {
float_pressure.raise(lrg);
} else {
// Do not count the SP and flag registers
const RegMask& rm = lrg.mask();
! if (rm.overlap(*Matcher::idealreg2regmask[static_cast<uint>(Opcodes::Op_RegI)])) {
int_pressure.raise(lrg);
}
}
}
}
*** 588,598 ****
// they are not dead even when their result is not used.
// For example, compareAndSwapL (and other CAS) and EncodeISOArray nodes.
// The method add_input_to_liveout() keeps such nodes alive (put them on liveout list)
// when it sees SCMemProj node in a block. Unfortunately SCMemProj node could be placed
// in block in such order that KILL MachProj nodes are processed first.
! if (def->has_out_with(Op_SCMemProj)) {
return false;
}
}
b->remove_node(location);
LRG& lrg = lrgs(lid);
--- 588,598 ----
// they are not dead even when their result is not used.
// For example, compareAndSwapL (and other CAS) and EncodeISOArray nodes.
// The method add_input_to_liveout() keeps such nodes alive (put them on liveout list)
// when it sees SCMemProj node in a block. Unfortunately SCMemProj node could be placed
// in block in such order that KILL MachProj nodes are processed first.
! if (def->has_out_with(Opcodes::Op_SCMemProj)) {
return false;
}
}
b->remove_node(location);
LRG& lrg = lrgs(lid);
*** 610,622 ****
/*
* When encountering a fat projection, we might go from a low to high to low
* (since the fat proj only lives at this instruction) going backwards in the
* block. If we find a low to high transition, we record it.
*/
! void PhaseChaitin::check_for_high_pressure_transition_at_fatproj(uint& block_reg_pressure, uint location, LRG& lrg, Pressure& pressure, const int op_regtype) {
RegMask mask_tmp = lrg.mask();
! mask_tmp.AND(*Matcher::idealreg2regmask[op_regtype]);
pressure.check_pressure_at_fatproj(location, mask_tmp);
}
/*
* Insure high score for immediate-use spill copies so they get a color.
--- 610,622 ----
/*
* When encountering a fat projection, we might go from a low to high to low
* (since the fat proj only lives at this instruction) going backwards in the
* block. If we find a low to high transition, we record it.
*/
! void PhaseChaitin::check_for_high_pressure_transition_at_fatproj(uint& block_reg_pressure, uint location, LRG& lrg, Pressure& pressure, const Opcodes op_regtype) {
RegMask mask_tmp = lrg.mask();
! mask_tmp.AND(*Matcher::idealreg2regmask[static_cast<uint>(op_regtype)]);
pressure.check_pressure_at_fatproj(location, mask_tmp);
}
/*
* Insure high score for immediate-use spill copies so they get a color.
*** 736,746 ****
*/
void PhaseChaitin::add_input_to_liveout(Block* b, Node* n, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure) {
JVMState* jvms = n->jvms();
uint debug_start = jvms ? jvms->debug_start() : 999999;
! for (uint k = ((n->Opcode() == Op_SCMemProj) ? 0:1); k < n->req(); k++) {
Node* def = n->in(k);
uint lid = _lrg_map.live_range_id(def);
if (!lid) {
continue;
}
--- 736,746 ----
*/
void PhaseChaitin::add_input_to_liveout(Block* b, Node* n, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure) {
JVMState* jvms = n->jvms();
uint debug_start = jvms ? jvms->debug_start() : 999999;
! for (uint k = ((n->Opcode() == Opcodes::Op_SCMemProj) ? 0:1); k < n->req(); k++) {
Node* def = n->in(k);
uint lid = _lrg_map.live_range_id(def);
if (!lid) {
continue;
}
*** 852,870 ****
// A DEF normally costs block frequency; rematerialized values are
// removed from the DEF sight, so LOWER costs here.
lrg._cost += n->rematerialize() ? 0 : block->_freq;
! if (!liveout.member(lid) && n->Opcode() != Op_SafePoint) {
if (remove_node_if_not_used(block, location, n, lid, &liveout)) {
float_pressure.lower_high_pressure_index();
int_pressure.lower_high_pressure_index();
continue;
}
if (lrg._fat_proj) {
! check_for_high_pressure_transition_at_fatproj(block->_reg_pressure, location, lrg, int_pressure, Op_RegI);
! check_for_high_pressure_transition_at_fatproj(block->_freg_pressure, location, lrg, float_pressure, Op_RegD);
}
} else {
// A live range ends at its definition, remove the remaining area.
// If the cost is +Inf (which might happen in extreme cases), the lrg area will also be +Inf,
// and +Inf - +Inf = NaN. So let's not do that subtraction.
--- 852,870 ----
// A DEF normally costs block frequency; rematerialized values are
// removed from the DEF sight, so LOWER costs here.
lrg._cost += n->rematerialize() ? 0 : block->_freq;
! if (!liveout.member(lid) && n->Opcode() != Opcodes::Op_SafePoint) {
if (remove_node_if_not_used(block, location, n, lid, &liveout)) {
float_pressure.lower_high_pressure_index();
int_pressure.lower_high_pressure_index();
continue;
}
if (lrg._fat_proj) {
! check_for_high_pressure_transition_at_fatproj(block->_reg_pressure, location, lrg, int_pressure, Opcodes::Op_RegI);
! check_for_high_pressure_transition_at_fatproj(block->_freg_pressure, location, lrg, float_pressure, Opcodes::Op_RegD);
}
} else {
// A live range ends at its definition, remove the remaining area.
// If the cost is +Inf (which might happen in extreme cases), the lrg area will also be +Inf,
// and +Inf - +Inf = NaN. So let's not do that subtraction.
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