1 /*
   2  * Copyright (c) 1998, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/ad.hpp"
  28 #include "opto/block.hpp"
  29 #include "opto/c2compiler.hpp"
  30 #include "opto/callnode.hpp"
  31 #include "opto/cfgnode.hpp"
  32 #include "opto/machnode.hpp"
  33 #include "opto/runtime.hpp"
  34 #include "opto/chaitin.hpp"
  35 #include "runtime/sharedRuntime.hpp"
  36 
  37 // Optimization - Graph Style
  38 
  39 // Check whether val is not-null-decoded compressed oop,
  40 // i.e. will grab into the base of the heap if it represents NULL.
  41 static bool accesses_heap_base_zone(Node *val) {
  42   if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops.
  43     if (val && val->is_Mach()) {
  44       if (val->as_Mach()->ideal_Opcode() == Opcodes::Op_DecodeN) {
  45         // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
  46         // decode NULL to point to the heap base (Decode_NN).
  47         if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
  48           return true;
  49         }
  50       }
  51       // Must recognize load operation with Decode matched in memory operand.
  52       // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
  53       // returns true everywhere else. On PPC, no such memory operands
  54       // exist, therefore we did not yet implement a check for such operands.
  55       NOT_AIX(Unimplemented());
  56     }
  57   }
  58   return false;
  59 }
  60 
  61 static bool needs_explicit_null_check_for_read(Node *val) {
  62   // On some OSes (AIX) the page at address 0 is only write protected.
  63   // If so, only Store operations will trap.
  64   if (os::zero_page_read_protected()) {
  65     return false;  // Implicit null check will work.
  66   }
  67   // Also a read accessing the base of a heap-based compressed heap will trap.
  68   if (accesses_heap_base_zone(val) &&                    // Hits the base zone page.
  69       Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected.
  70     return false;
  71   }
  72 
  73   return true;
  74 }
  75 
  76 //------------------------------implicit_null_check----------------------------
  77 // Detect implicit-null-check opportunities.  Basically, find NULL checks
  78 // with suitable memory ops nearby.  Use the memory op to do the NULL check.
  79 // I can generate a memory op if there is not one nearby.
  80 // The proj is the control projection for the not-null case.
  81 // The val is the pointer being checked for nullness or
  82 // decodeHeapOop_not_null node if it did not fold into address.
  83 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
  84   // Assume if null check need for 0 offset then always needed
  85   // Intel solaris doesn't support any null checks yet and no
  86   // mechanism exists (yet) to set the switches at an os_cpu level
  87   if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
  88 
  89   // Make sure the ptr-is-null path appears to be uncommon!
  90   float f = block->end()->as_MachIf()->_prob;
  91   if( proj->Opcode() == Opcodes::Op_IfTrue ) f = 1.0f - f;
  92   if( f > PROB_UNLIKELY_MAG(4) ) return;
  93 
  94   uint bidx = 0;                // Capture index of value into memop
  95   bool was_store;               // Memory op is a store op
  96 
  97   // Get the successor block for if the test ptr is non-null
  98   Block* not_null_block;  // this one goes with the proj
  99   Block* null_block;
 100   if (block->get_node(block->number_of_nodes()-1) == proj) {
 101     null_block     = block->_succs[0];
 102     not_null_block = block->_succs[1];
 103   } else {
 104     assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
 105     not_null_block = block->_succs[0];
 106     null_block     = block->_succs[1];
 107   }
 108   while (null_block->is_Empty() == Block::empty_with_goto) {
 109     null_block     = null_block->_succs[0];
 110   }
 111 
 112   // Search the exception block for an uncommon trap.
 113   // (See Parse::do_if and Parse::do_ifnull for the reason
 114   // we need an uncommon trap.  Briefly, we need a way to
 115   // detect failure of this optimization, as in 6366351.)
 116   {
 117     bool found_trap = false;
 118     for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
 119       Node* nn = null_block->get_node(i1);
 120       if (nn->is_MachCall() &&
 121           nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
 122         const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
 123         if (trtype->isa_int() && trtype->is_int()->is_con()) {
 124           jint tr_con = trtype->is_int()->get_con();
 125           Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
 126           Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
 127           assert((int)reason < (int)BitsPerInt, "recode bit map");
 128           if (is_set_nth_bit(allowed_reasons, (int) reason)
 129               && action != Deoptimization::Action_none) {
 130             // This uncommon trap is sure to recompile, eventually.
 131             // When that happens, C->too_many_traps will prevent
 132             // this transformation from happening again.
 133             found_trap = true;
 134           }
 135         }
 136         break;
 137       }
 138     }
 139     if (!found_trap) {
 140       // We did not find an uncommon trap.
 141       return;
 142     }
 143   }
 144 
 145   // Check for decodeHeapOop_not_null node which did not fold into address
 146   bool is_decoden = ((intptr_t)val) & 1;
 147   val = (Node*)(((intptr_t)val) & ~1);
 148 
 149   assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
 150          (val->as_Mach()->ideal_Opcode() == Opcodes::Op_DecodeN), "sanity");
 151 
 152   // Search the successor block for a load or store who's base value is also
 153   // the tested value.  There may be several.
 154   Node_List *out = new Node_List(Thread::current()->resource_area());
 155   MachNode *best = NULL;        // Best found so far
 156   for (DUIterator i = val->outs(); val->has_out(i); i++) {
 157     Node *m = val->out(i);
 158     if( !m->is_Mach() ) continue;
 159     MachNode *mach = m->as_Mach();
 160     was_store = false;
 161     Opcodes iop = mach->ideal_Opcode();
 162     switch( iop ) {
 163     case Opcodes::Op_LoadB:
 164     case Opcodes::Op_LoadUB:
 165     case Opcodes::Op_LoadUS:
 166     case Opcodes::Op_LoadD:
 167     case Opcodes::Op_LoadF:
 168     case Opcodes::Op_LoadI:
 169     case Opcodes::Op_LoadL:
 170     case Opcodes::Op_LoadP:
 171     case Opcodes::Op_LoadN:
 172     case Opcodes::Op_LoadS:
 173     case Opcodes::Op_LoadKlass:
 174     case Opcodes::Op_LoadNKlass:
 175     case Opcodes::Op_LoadRange:
 176     case Opcodes::Op_LoadD_unaligned:
 177     case Opcodes::Op_LoadL_unaligned:
 178       assert(mach->in(2) == val, "should be address");
 179       break;
 180     case Opcodes::Op_StoreB:
 181     case Opcodes::Op_StoreC:
 182     case Opcodes::Op_StoreCM:
 183     case Opcodes::Op_StoreD:
 184     case Opcodes::Op_StoreF:
 185     case Opcodes::Op_StoreI:
 186     case Opcodes::Op_StoreL:
 187     case Opcodes::Op_StoreP:
 188     case Opcodes::Op_StoreN:
 189     case Opcodes::Op_StoreNKlass:
 190       was_store = true;         // Memory op is a store op
 191       // Stores will have their address in slot 2 (memory in slot 1).
 192       // If the value being nul-checked is in another slot, it means we
 193       // are storing the checked value, which does NOT check the value!
 194       if( mach->in(2) != val ) continue;
 195       break;                    // Found a memory op?
 196     case Opcodes::Op_StrComp:
 197     case Opcodes::Op_StrEquals:
 198     case Opcodes::Op_StrIndexOf:
 199     case Opcodes::Op_StrIndexOfChar:
 200     case Opcodes::Op_AryEq:
 201     case Opcodes::Op_StrInflatedCopy:
 202     case Opcodes::Op_StrCompressedCopy:
 203     case Opcodes::Op_EncodeISOArray:
 204     case Opcodes::Op_HasNegatives:
 205       // Not a legit memory op for implicit null check regardless of
 206       // embedded loads
 207       continue;
 208     default:                    // Also check for embedded loads
 209       if( !mach->needs_anti_dependence_check() )
 210         continue;               // Not an memory op; skip it
 211       if( must_clone[static_cast<uint>(iop)] ) {
 212         // Do not move nodes which produce flags because
 213         // RA will try to clone it to place near branch and
 214         // it will cause recompilation, see clone_node().
 215         continue;
 216       }
 217       {
 218         // Check that value is used in memory address in
 219         // instructions with embedded load (CmpP val1,(val2+off)).
 220         Node* base;
 221         Node* index;
 222         const MachOper* oper = mach->memory_inputs(base, index);
 223         if (oper == NULL || oper == (MachOper*)-1) {
 224           continue;             // Not an memory op; skip it
 225         }
 226         if (val == base ||
 227             val == index && val->bottom_type()->isa_narrowoop()) {
 228           break;                // Found it
 229         } else {
 230           continue;             // Skip it
 231         }
 232       }
 233       break;
 234     }
 235 
 236     // On some OSes (AIX) the page at address 0 is only write protected.
 237     // If so, only Store operations will trap.
 238     // But a read accessing the base of a heap-based compressed heap will trap.
 239     if (!was_store && needs_explicit_null_check_for_read(val)) {
 240       continue;
 241     }
 242 
 243     // check if the offset is not too high for implicit exception
 244     {
 245       intptr_t offset = 0;
 246       const TypePtr *adr_type = NULL;  // Do not need this return value here
 247       const Node* base = mach->get_base_and_disp(offset, adr_type);
 248       if (base == NULL || base == NodeSentinel) {
 249         // Narrow oop address doesn't have base, only index
 250         if( val->bottom_type()->isa_narrowoop() &&
 251             MacroAssembler::needs_explicit_null_check(offset) )
 252           continue;             // Give up if offset is beyond page size
 253         // cannot reason about it; is probably not implicit null exception
 254       } else {
 255         const TypePtr* tptr;
 256         if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 ||
 257                                   Universe::narrow_klass_shift() == 0)) {
 258           // 32-bits narrow oop can be the base of address expressions
 259           tptr = base->get_ptr_type();
 260         } else {
 261           // only regular oops are expected here
 262           tptr = base->bottom_type()->is_ptr();
 263         }
 264         // Give up if offset is not a compile-time constant
 265         if( offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot )
 266           continue;
 267         offset += tptr->_offset; // correct if base is offseted
 268         if( MacroAssembler::needs_explicit_null_check(offset) )
 269           continue;             // Give up is reference is beyond 4K page size
 270       }
 271     }
 272 
 273     // Check ctrl input to see if the null-check dominates the memory op
 274     Block *cb = get_block_for_node(mach);
 275     cb = cb->_idom;             // Always hoist at least 1 block
 276     if( !was_store ) {          // Stores can be hoisted only one block
 277       while( cb->_dom_depth > (block->_dom_depth + 1))
 278         cb = cb->_idom;         // Hoist loads as far as we want
 279       // The non-null-block should dominate the memory op, too. Live
 280       // range spilling will insert a spill in the non-null-block if it is
 281       // needs to spill the memory op for an implicit null check.
 282       if (cb->_dom_depth == (block->_dom_depth + 1)) {
 283         if (cb != not_null_block) continue;
 284         cb = cb->_idom;
 285       }
 286     }
 287     if( cb != block ) continue;
 288 
 289     // Found a memory user; see if it can be hoisted to check-block
 290     uint vidx = 0;              // Capture index of value into memop
 291     uint j;
 292     for( j = mach->req()-1; j > 0; j-- ) {
 293       if( mach->in(j) == val ) {
 294         vidx = j;
 295         // Ignore DecodeN val which could be hoisted to where needed.
 296         if( is_decoden ) continue;
 297       }
 298       // Block of memory-op input
 299       Block *inb = get_block_for_node(mach->in(j));
 300       Block *b = block;          // Start from nul check
 301       while( b != inb && b->_dom_depth > inb->_dom_depth )
 302         b = b->_idom;           // search upwards for input
 303       // See if input dominates null check
 304       if( b != inb )
 305         break;
 306     }
 307     if( j > 0 )
 308       continue;
 309     Block *mb = get_block_for_node(mach);
 310     // Hoisting stores requires more checks for the anti-dependence case.
 311     // Give up hoisting if we have to move the store past any load.
 312     if( was_store ) {
 313       Block *b = mb;            // Start searching here for a local load
 314       // mach use (faulting) trying to hoist
 315       // n might be blocker to hoisting
 316       while( b != block ) {
 317         uint k;
 318         for( k = 1; k < b->number_of_nodes(); k++ ) {
 319           Node *n = b->get_node(k);
 320           if( n->needs_anti_dependence_check() &&
 321               n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
 322             break;              // Found anti-dependent load
 323         }
 324         if( k < b->number_of_nodes() )
 325           break;                // Found anti-dependent load
 326         // Make sure control does not do a merge (would have to check allpaths)
 327         if( b->num_preds() != 2 ) break;
 328         b = get_block_for_node(b->pred(1)); // Move up to predecessor block
 329       }
 330       if( b != block ) continue;
 331     }
 332 
 333     // Make sure this memory op is not already being used for a NullCheck
 334     Node *e = mb->end();
 335     if( e->is_MachNullCheck() && e->in(1) == mach )
 336       continue;                 // Already being used as a NULL check
 337 
 338     // Found a candidate!  Pick one with least dom depth - the highest
 339     // in the dom tree should be closest to the null check.
 340     if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
 341       best = mach;
 342       bidx = vidx;
 343     }
 344   }
 345   // No candidate!
 346   if (best == NULL) {
 347     return;
 348   }
 349 
 350   // ---- Found an implicit null check
 351 #ifndef PRODUCT
 352   extern int implicit_null_checks;
 353   implicit_null_checks++;
 354 #endif
 355 
 356   if( is_decoden ) {
 357     // Check if we need to hoist decodeHeapOop_not_null first.
 358     Block *valb = get_block_for_node(val);
 359     if( block != valb && block->_dom_depth < valb->_dom_depth ) {
 360       // Hoist it up to the end of the test block.
 361       valb->find_remove(val);
 362       block->add_inst(val);
 363       map_node_to_block(val, block);
 364       // DecodeN on x86 may kill flags. Check for flag-killing projections
 365       // that also need to be hoisted.
 366       for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
 367         Node* n = val->fast_out(j);
 368         if( n->is_MachProj() ) {
 369           get_block_for_node(n)->find_remove(n);
 370           block->add_inst(n);
 371           map_node_to_block(n, block);
 372         }
 373       }
 374     }
 375   }
 376   // Hoist the memory candidate up to the end of the test block.
 377   Block *old_block = get_block_for_node(best);
 378   old_block->find_remove(best);
 379   block->add_inst(best);
 380   map_node_to_block(best, block);
 381 
 382   // Move the control dependence
 383   if (best->in(0) && best->in(0) == old_block->head())
 384     best->set_req(0, block->head());
 385 
 386   // Check for flag-killing projections that also need to be hoisted
 387   // Should be DU safe because no edge updates.
 388   for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
 389     Node* n = best->fast_out(j);
 390     if( n->is_MachProj() ) {
 391       get_block_for_node(n)->find_remove(n);
 392       block->add_inst(n);
 393       map_node_to_block(n, block);
 394     }
 395   }
 396 
 397   // proj==Op_True --> ne test; proj==Op_False --> eq test.
 398   // One of two graph shapes got matched:
 399   //   (IfTrue  (If (Bool NE (CmpP ptr NULL))))
 400   //   (IfFalse (If (Bool EQ (CmpP ptr NULL))))
 401   // NULL checks are always branch-if-eq.  If we see a IfTrue projection
 402   // then we are replacing a 'ne' test with a 'eq' NULL check test.
 403   // We need to flip the projections to keep the same semantics.
 404   if( proj->Opcode() == Opcodes::Op_IfTrue ) {
 405     // Swap order of projections in basic block to swap branch targets
 406     Node *tmp1 = block->get_node(block->end_idx()+1);
 407     Node *tmp2 = block->get_node(block->end_idx()+2);
 408     block->map_node(tmp2, block->end_idx()+1);
 409     block->map_node(tmp1, block->end_idx()+2);
 410     Node *tmp = new Node(C->top()); // Use not NULL input
 411     tmp1->replace_by(tmp);
 412     tmp2->replace_by(tmp1);
 413     tmp->replace_by(tmp2);
 414     tmp->destruct();
 415   }
 416 
 417   // Remove the existing null check; use a new implicit null check instead.
 418   // Since schedule-local needs precise def-use info, we need to correct
 419   // it as well.
 420   Node *old_tst = proj->in(0);
 421   MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
 422   block->map_node(nul_chk, block->end_idx());
 423   map_node_to_block(nul_chk, block);
 424   // Redirect users of old_test to nul_chk
 425   for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
 426     old_tst->last_out(i2)->set_req(0, nul_chk);
 427   // Clean-up any dead code
 428   for (uint i3 = 0; i3 < old_tst->req(); i3++) {
 429     Node* in = old_tst->in(i3);
 430     old_tst->set_req(i3, NULL);
 431     if (in->outcnt() == 0) {
 432       // Remove dead input node
 433       in->disconnect_inputs(NULL, C);
 434       block->find_remove(in);
 435     }
 436   }
 437 
 438   latency_from_uses(nul_chk);
 439   latency_from_uses(best);
 440 }
 441 
 442 
 443 //------------------------------select-----------------------------------------
 444 // Select a nice fellow from the worklist to schedule next. If there is only
 445 // one choice, then use it. Projections take top priority for correctness
 446 // reasons - if I see a projection, then it is next.  There are a number of
 447 // other special cases, for instructions that consume condition codes, et al.
 448 // These are chosen immediately. Some instructions are required to immediately
 449 // precede the last instruction in the block, and these are taken last. Of the
 450 // remaining cases (most), choose the instruction with the greatest latency
 451 // (that is, the most number of pseudo-cycles required to the end of the
 452 // routine). If there is a tie, choose the instruction with the most inputs.
 453 Node* PhaseCFG::select(
 454   Block* block,
 455   Node_List &worklist,
 456   GrowableArray<int> &ready_cnt,
 457   VectorSet &next_call,
 458   uint sched_slot,
 459   intptr_t* recalc_pressure_nodes) {
 460 
 461   // If only a single entry on the stack, use it
 462   uint cnt = worklist.size();
 463   if (cnt == 1) {
 464     Node *n = worklist[0];
 465     worklist.map(0,worklist.pop());
 466     return n;
 467   }
 468 
 469   uint choice  = 0; // Bigger is most important
 470   uint latency = 0; // Bigger is scheduled first
 471   uint score   = 0; // Bigger is better
 472   int idx = -1;     // Index in worklist
 473   int cand_cnt = 0; // Candidate count
 474   bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
 475 
 476   for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
 477     // Order in worklist is used to break ties.
 478     // See caller for how this is used to delay scheduling
 479     // of induction variable increments to after the other
 480     // uses of the phi are scheduled.
 481     Node *n = worklist[i];      // Get Node on worklist
 482 
 483     Opcodes iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : Opcodes::Op_Node;;
 484     if( n->is_Proj() ||         // Projections always win
 485         n->Opcode()== Opcodes::Op_Con || // So does constant 'Top'
 486         iop == Opcodes::Op_CreateEx ||   // Create-exception must start block
 487         iop == Opcodes::Op_CheckCastPP
 488         ) {
 489       worklist.map(i,worklist.pop());
 490       return n;
 491     }
 492 
 493     // Final call in a block must be adjacent to 'catch'
 494     Node *e = block->end();
 495     if( e->is_Catch() && e->in(0)->in(0) == n )
 496       continue;
 497 
 498     // Memory op for an implicit null check has to be at the end of the block
 499     if( e->is_MachNullCheck() && e->in(1) == n )
 500       continue;
 501 
 502     // Schedule IV increment last.
 503     if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Opcodes::Op_CountedLoopEnd) {
 504       // Cmp might be matched into CountedLoopEnd node.
 505       Node *cmp = (e->in(1)->ideal_reg() == Opcodes::Op_RegFlags) ? e->in(1) : e;
 506       if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
 507         continue;
 508       }
 509     }
 510 
 511     uint n_choice  = 2;
 512 
 513     // See if this instruction is consumed by a branch. If so, then (as the
 514     // branch is the last instruction in the basic block) force it to the
 515     // end of the basic block
 516     if ( must_clone[static_cast<uint>(iop)] ) {
 517       // See if any use is a branch
 518       bool found_machif = false;
 519 
 520       for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 521         Node* use = n->fast_out(j);
 522 
 523         // The use is a conditional branch, make them adjacent
 524         if (use->is_MachIf() && get_block_for_node(use) == block) {
 525           found_machif = true;
 526           break;
 527         }
 528 
 529         // More than this instruction pending for successor to be ready,
 530         // don't choose this if other opportunities are ready
 531         if (ready_cnt.at(use->_idx) > 1)
 532           n_choice = 1;
 533       }
 534 
 535       // loop terminated, prefer not to use this instruction
 536       if (found_machif)
 537         continue;
 538     }
 539 
 540     // See if this has a predecessor that is "must_clone", i.e. sets the
 541     // condition code. If so, choose this first
 542     for (uint j = 0; j < n->req() ; j++) {
 543       Node *inn = n->in(j);
 544       if (inn) {
 545         if (inn->is_Mach() && must_clone[static_cast<uint>(inn->as_Mach()->ideal_Opcode())] ) {
 546           n_choice = 3;
 547           break;
 548         }
 549       }
 550     }
 551 
 552     // MachTemps should be scheduled last so they are near their uses
 553     if (n->is_MachTemp()) {
 554       n_choice = 1;
 555     }
 556 
 557     uint n_latency = get_latency_for_node(n);
 558     uint n_score = n->req();   // Many inputs get high score to break ties
 559 
 560     if (OptoRegScheduling && block_size_threshold_ok) {
 561       if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
 562         _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
 563         _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
 564         // simulate the notion that we just picked this node to schedule
 565         n->add_flag(Node::Flag_is_scheduled);
 566         // now caculate its effect upon the graph if we did
 567         adjust_register_pressure(n, block, recalc_pressure_nodes, false);
 568         // return its state for finalize in case somebody else wins
 569         n->remove_flag(Node::Flag_is_scheduled);
 570         // now save the two final pressure components of register pressure, limiting pressure calcs to short size
 571         short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
 572         short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
 573         recalc_pressure_nodes[n->_idx] = int_pressure;
 574         recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
 575       }
 576 
 577       if (_scheduling_for_pressure) {
 578         latency = n_latency;
 579         if (n_choice != 3) {
 580           // Now evaluate each register pressure component based on threshold in the score.
 581           // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
 582           // on a single instruction, but we might see it shrink on both banks.
 583           // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
 584           // live ranges that terminate on this instruction.
 585           if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
 586             short int_pressure = (short)recalc_pressure_nodes[n->_idx];
 587             n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
 588           }
 589           if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
 590             short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
 591             n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
 592           }
 593         } else {
 594           // make sure we choose these candidates
 595           score = 0;
 596         }
 597       }
 598     }
 599 
 600     // Keep best latency found
 601     cand_cnt++;
 602     if (choice < n_choice ||
 603         (choice == n_choice &&
 604          ((StressLCM && Compile::randomized_select(cand_cnt)) ||
 605           (!StressLCM &&
 606            (latency < n_latency ||
 607             (latency == n_latency &&
 608              (score < n_score))))))) {
 609       choice  = n_choice;
 610       latency = n_latency;
 611       score   = n_score;
 612       idx     = i;               // Also keep index in worklist
 613     }
 614   } // End of for all ready nodes in worklist
 615 
 616   assert(idx >= 0, "index should be set");
 617   Node *n = worklist[(uint)idx];      // Get the winner
 618 
 619   worklist.map((uint)idx, worklist.pop());     // Compress worklist
 620   return n;
 621 }
 622 
 623 //-------------------------adjust_register_pressure----------------------------
 624 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
 625   PhaseLive* liveinfo = _regalloc->get_live();
 626   IndexSet* liveout = liveinfo->live(block);
 627   // first adjust the register pressure for the sources
 628   for (uint i = 1; i < n->req(); i++) {
 629     bool lrg_ends = false;
 630     Node *src_n = n->in(i);
 631     if (src_n == NULL) continue;
 632     if (!src_n->is_Mach()) continue;
 633     uint src = _regalloc->_lrg_map.find(src_n);
 634     if (src == 0) continue;
 635     LRG& lrg_src = _regalloc->lrgs(src);
 636     // detect if the live range ends or not
 637     if (liveout->member(src) == false) {
 638       lrg_ends = true;
 639       for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
 640         Node* m = src_n->fast_out(j); // Get user
 641         if (m == n) continue;
 642         if (!m->is_Mach()) continue;
 643         MachNode *mach = m->as_Mach();
 644         bool src_matches = false;
 645         Opcodes iop = mach->ideal_Opcode();
 646 
 647         switch (iop) {
 648         case Opcodes::Op_StoreB:
 649         case Opcodes::Op_StoreC:
 650         case Opcodes::Op_StoreCM:
 651         case Opcodes::Op_StoreD:
 652         case Opcodes::Op_StoreF:
 653         case Opcodes::Op_StoreI:
 654         case Opcodes::Op_StoreL:
 655         case Opcodes::Op_StoreP:
 656         case Opcodes::Op_StoreN:
 657         case Opcodes::Op_StoreVector:
 658         case Opcodes::Op_StoreNKlass:
 659           for (uint k = 1; k < m->req(); k++) {
 660             Node *in = m->in(k);
 661             if (in == src_n) {
 662               src_matches = true;
 663               break;
 664             }
 665           }
 666           break;
 667 
 668         default:
 669           src_matches = true;
 670           break;
 671         }
 672 
 673         // If we have a store as our use, ignore the non source operands
 674         if (src_matches == false) continue;
 675 
 676         // Mark every unscheduled use which is not n with a recalculation
 677         if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
 678           if (finalize_mode && !m->is_Phi()) {
 679             recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
 680           }
 681           lrg_ends = false;
 682         }
 683       }
 684     }
 685     // if none, this live range ends and we can adjust register pressure
 686     if (lrg_ends) {
 687       if (finalize_mode) {
 688         _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
 689       } else {
 690         _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
 691       }
 692     }
 693   }
 694 
 695   // now add the register pressure from the dest and evaluate which heuristic we should use:
 696   // 1.) The default, latency scheduling
 697   // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
 698   uint dst = _regalloc->_lrg_map.find(n);
 699   if (dst != 0) {
 700     LRG& lrg_dst = _regalloc->lrgs(dst);
 701     if (finalize_mode) {
 702       _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
 703       // check to see if we fall over the register pressure cliff here
 704       if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
 705         _scheduling_for_pressure = true;
 706       } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
 707         _scheduling_for_pressure = true;
 708       } else {
 709         // restore latency scheduling mode
 710         _scheduling_for_pressure = false;
 711       }
 712     } else {
 713       _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
 714     }
 715   }
 716 }
 717 
 718 //------------------------------set_next_call----------------------------------
 719 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
 720   if( next_call.test_set(n->_idx) ) return;
 721   for( uint i=0; i<n->len(); i++ ) {
 722     Node *m = n->in(i);
 723     if( !m ) continue;  // must see all nodes in block that precede call
 724     if (get_block_for_node(m) == block) {
 725       set_next_call(block, m, next_call);
 726     }
 727   }
 728 }
 729 
 730 //------------------------------needed_for_next_call---------------------------
 731 // Set the flag 'next_call' for each Node that is needed for the next call to
 732 // be scheduled.  This flag lets me bias scheduling so Nodes needed for the
 733 // next subroutine call get priority - basically it moves things NOT needed
 734 // for the next call till after the call.  This prevents me from trying to
 735 // carry lots of stuff live across a call.
 736 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
 737   // Find the next control-defining Node in this block
 738   Node* call = NULL;
 739   for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
 740     Node* m = this_call->fast_out(i);
 741     if (get_block_for_node(m) == block && // Local-block user
 742         m != this_call &&       // Not self-start node
 743         m->is_MachCall()) {
 744       call = m;
 745       break;
 746     }
 747   }
 748   if (call == NULL)  return;    // No next call (e.g., block end is near)
 749   // Set next-call for all inputs to this call
 750   set_next_call(block, call, next_call);
 751 }
 752 
 753 //------------------------------add_call_kills-------------------------------------
 754 // helper function that adds caller save registers to MachProjNode
 755 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
 756   // Fill in the kill mask for the call
 757   for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
 758     if( !regs.Member(r) ) {     // Not already defined by the call
 759       // Save-on-call register?
 760       if ((save_policy[r] == 'C') ||
 761           (save_policy[r] == 'A') ||
 762           ((save_policy[r] == 'E') && exclude_soe)) {
 763         proj->_rout.Insert(r);
 764       }
 765     }
 766   }
 767 }
 768 
 769 
 770 //------------------------------sched_call-------------------------------------
 771 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
 772   RegMask regs;
 773 
 774   // Schedule all the users of the call right now.  All the users are
 775   // projection Nodes, so they must be scheduled next to the call.
 776   // Collect all the defined registers.
 777   for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
 778     Node* n = mcall->fast_out(i);
 779     assert( n->is_MachProj(), "" );
 780     int n_cnt = ready_cnt.at(n->_idx)-1;
 781     ready_cnt.at_put(n->_idx, n_cnt);
 782     assert( n_cnt == 0, "" );
 783     // Schedule next to call
 784     block->map_node(n, node_cnt++);
 785     // Collect defined registers
 786     regs.OR(n->out_RegMask());
 787     // Check for scheduling the next control-definer
 788     if( n->bottom_type() == Type::CONTROL )
 789       // Warm up next pile of heuristic bits
 790       needed_for_next_call(block, n, next_call);
 791 
 792     // Children of projections are now all ready
 793     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 794       Node* m = n->fast_out(j); // Get user
 795       if(get_block_for_node(m) != block) {
 796         continue;
 797       }
 798       if( m->is_Phi() ) continue;
 799       int m_cnt = ready_cnt.at(m->_idx) - 1;
 800       ready_cnt.at_put(m->_idx, m_cnt);
 801       if( m_cnt == 0 )
 802         worklist.push(m);
 803     }
 804 
 805   }
 806 
 807   // Act as if the call defines the Frame Pointer.
 808   // Certainly the FP is alive and well after the call.
 809   regs.Insert(_matcher.c_frame_pointer());
 810 
 811   // Set all registers killed and not already defined by the call.
 812   uint r_cnt = mcall->tf()->range()->cnt();
 813   Opcodes op = mcall->ideal_Opcode();
 814   MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, static_cast<Opcodes>(MachProjNode::projType::fat_proj) );
 815   map_node_to_block(proj, block);
 816   block->insert_node(proj, node_cnt++);
 817 
 818   // Select the right register save policy.
 819   const char *save_policy = NULL;
 820   switch (op) {
 821     case Opcodes::Op_CallRuntime:
 822     case Opcodes::Op_CallLeaf:
 823     case Opcodes::Op_CallLeafNoFP:
 824       // Calling C code so use C calling convention
 825       save_policy = _matcher._c_reg_save_policy;
 826       break;
 827 
 828     case Opcodes::Op_CallStaticJava:
 829     case Opcodes::Op_CallDynamicJava:
 830       // Calling Java code so use Java calling convention
 831       save_policy = _matcher._register_save_policy;
 832       break;
 833 
 834     default:
 835       ShouldNotReachHere();
 836   }
 837 
 838   // When using CallRuntime mark SOE registers as killed by the call
 839   // so values that could show up in the RegisterMap aren't live in a
 840   // callee saved register since the register wouldn't know where to
 841   // find them.  CallLeaf and CallLeafNoFP are ok because they can't
 842   // have debug info on them.  Strictly speaking this only needs to be
 843   // done for oops since idealreg2debugmask takes care of debug info
 844   // references but there no way to handle oops differently than other
 845   // pointers as far as the kill mask goes.
 846   bool exclude_soe = op == Opcodes::Op_CallRuntime;
 847 
 848   // If the call is a MethodHandle invoke, we need to exclude the
 849   // register which is used to save the SP value over MH invokes from
 850   // the mask.  Otherwise this register could be used for
 851   // deoptimization information.
 852   if (op == Opcodes::Op_CallStaticJava) {
 853     MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
 854     if (mcallstaticjava->_method_handle_invoke)
 855       proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
 856   }
 857 
 858   add_call_kills(proj, regs, save_policy, exclude_soe);
 859 
 860   return node_cnt;
 861 }
 862 
 863 
 864 //------------------------------schedule_local---------------------------------
 865 // Topological sort within a block.  Someday become a real scheduler.
 866 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
 867   // Already "sorted" are the block start Node (as the first entry), and
 868   // the block-ending Node and any trailing control projections.  We leave
 869   // these alone.  PhiNodes and ParmNodes are made to follow the block start
 870   // Node.  Everything else gets topo-sorted.
 871 
 872 #ifndef PRODUCT
 873     if (trace_opto_pipelining()) {
 874       tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
 875       for (uint i = 0;i < block->number_of_nodes(); i++) {
 876         tty->print("# ");
 877         block->get_node(i)->fast_dump();
 878       }
 879       tty->print_cr("#");
 880     }
 881 #endif
 882 
 883   // RootNode is already sorted
 884   if (block->number_of_nodes() == 1) {
 885     return true;
 886   }
 887 
 888   bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
 889 
 890   // We track the uses of local definitions as input dependences so that
 891   // we know when a given instruction is avialable to be scheduled.
 892   uint i;
 893   if (OptoRegScheduling && block_size_threshold_ok) {
 894     for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
 895       Node *n = block->get_node(i);
 896       n->remove_flag(Node::Flag_is_scheduled);
 897       if (!n->is_Phi()) {
 898         recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
 899       }
 900     }
 901   }
 902 
 903   // Move PhiNodes and ParmNodes from 1 to cnt up to the start
 904   uint node_cnt = block->end_idx();
 905   uint phi_cnt = 1;
 906   for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
 907     Node *n = block->get_node(i);
 908     if( n->is_Phi() ||          // Found a PhiNode or ParmNode
 909         (n->is_Proj()  && n->in(0) == block->head()) ) {
 910       // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
 911       block->map_node(block->get_node(phi_cnt), i);
 912       block->map_node(n, phi_cnt++);  // swap Phi/Parm up front
 913       if (OptoRegScheduling && block_size_threshold_ok) {
 914         // mark n as scheduled
 915         n->add_flag(Node::Flag_is_scheduled);
 916       }
 917     } else {                    // All others
 918       // Count block-local inputs to 'n'
 919       uint cnt = n->len();      // Input count
 920       uint local = 0;
 921       for( uint j=0; j<cnt; j++ ) {
 922         Node *m = n->in(j);
 923         if( m && get_block_for_node(m) == block && !m->is_top() )
 924           local++;              // One more block-local input
 925       }
 926       ready_cnt.at_put(n->_idx, local); // Count em up
 927 
 928 #ifdef ASSERT
 929       if( UseConcMarkSweepGC || UseG1GC ) {
 930         if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Opcodes::Op_StoreCM ) {
 931           // Check the precedence edges
 932           for (uint prec = n->req(); prec < n->len(); prec++) {
 933             Node* oop_store = n->in(prec);
 934             if (oop_store != NULL) {
 935               assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
 936             }
 937           }
 938         }
 939       }
 940 #endif
 941 
 942       // A few node types require changing a required edge to a precedence edge
 943       // before allocation.
 944       if( n->is_Mach() && n->req() > TypeFunc::Parms &&
 945           (n->as_Mach()->ideal_Opcode() == Opcodes::Op_MemBarAcquire ||
 946            n->as_Mach()->ideal_Opcode() == Opcodes::Op_MemBarVolatile) ) {
 947         // MemBarAcquire could be created without Precedent edge.
 948         // del_req() replaces the specified edge with the last input edge
 949         // and then removes the last edge. If the specified edge > number of
 950         // edges the last edge will be moved outside of the input edges array
 951         // and the edge will be lost. This is why this code should be
 952         // executed only when Precedent (== TypeFunc::Parms) edge is present.
 953         Node *x = n->in(TypeFunc::Parms);
 954         if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
 955           // Old edge to node within same block will get removed, but no precedence
 956           // edge will get added because it already exists. Update ready count.
 957           int cnt = ready_cnt.at(n->_idx);
 958           assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
 959           ready_cnt.at_put(n->_idx, cnt-1);
 960         }
 961         n->del_req(TypeFunc::Parms);
 962         n->add_prec(x);
 963       }
 964     }
 965   }
 966   for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
 967     ready_cnt.at_put(block->get_node(i2)->_idx, 0);
 968 
 969   // All the prescheduled guys do not hold back internal nodes
 970   uint i3;
 971   for (i3 = 0; i3 < phi_cnt; i3++) {  // For all pre-scheduled
 972     Node *n = block->get_node(i3);       // Get pre-scheduled
 973     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 974       Node* m = n->fast_out(j);
 975       if (get_block_for_node(m) == block) { // Local-block user
 976         int m_cnt = ready_cnt.at(m->_idx)-1;
 977         if (OptoRegScheduling && block_size_threshold_ok) {
 978           // mark m as scheduled
 979           if (m_cnt < 0) {
 980             m->add_flag(Node::Flag_is_scheduled);
 981           }
 982         }
 983         ready_cnt.at_put(m->_idx, m_cnt);   // Fix ready count
 984       }
 985     }
 986   }
 987 
 988   Node_List delay;
 989   // Make a worklist
 990   Node_List worklist;
 991   for(uint i4=i3; i4<node_cnt; i4++ ) {    // Put ready guys on worklist
 992     Node *m = block->get_node(i4);
 993     if( !ready_cnt.at(m->_idx) ) {   // Zero ready count?
 994       if (m->is_iteratively_computed()) {
 995         // Push induction variable increments last to allow other uses
 996         // of the phi to be scheduled first. The select() method breaks
 997         // ties in scheduling by worklist order.
 998         delay.push(m);
 999       } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Opcodes::Op_CreateEx) {
1000         // Force the CreateEx to the top of the list so it's processed
1001         // first and ends up at the start of the block.
1002         worklist.insert(0, m);
1003       } else {
1004         worklist.push(m);         // Then on to worklist!
1005       }
1006     }
1007   }
1008   while (delay.size()) {
1009     Node* d = delay.pop();
1010     worklist.push(d);
1011   }
1012 
1013   if (OptoRegScheduling && block_size_threshold_ok) {
1014     // To stage register pressure calculations we need to examine the live set variables
1015     // breaking them up by register class to compartmentalize the calculations.
1016     uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
1017     _regalloc->_sched_int_pressure.init(INTPRESSURE);
1018     _regalloc->_sched_float_pressure.init(float_pressure);
1019     _regalloc->_scratch_int_pressure.init(INTPRESSURE);
1020     _regalloc->_scratch_float_pressure.init(float_pressure);
1021 
1022     _regalloc->compute_entry_block_pressure(block);
1023   }
1024 
1025   // Warm up the 'next_call' heuristic bits
1026   needed_for_next_call(block, block->head(), next_call);
1027 
1028 #ifndef PRODUCT
1029     if (trace_opto_pipelining()) {
1030       for (uint j=0; j< block->number_of_nodes(); j++) {
1031         Node     *n = block->get_node(j);
1032         int     idx = n->_idx;
1033         tty->print("#   ready cnt:%3d  ", ready_cnt.at(idx));
1034         tty->print("latency:%3d  ", get_latency_for_node(n));
1035         tty->print("%4d: %s\n", idx, n->Name());
1036       }
1037     }
1038 #endif
1039 
1040   uint max_idx = (uint)ready_cnt.length();
1041   // Pull from worklist and schedule
1042   while( worklist.size() ) {    // Worklist is not ready
1043 
1044 #ifndef PRODUCT
1045     if (trace_opto_pipelining()) {
1046       tty->print("#   ready list:");
1047       for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1048         Node *n = worklist[i];      // Get Node on worklist
1049         tty->print(" %d", n->_idx);
1050       }
1051       tty->cr();
1052     }
1053 #endif
1054 
1055     // Select and pop a ready guy from worklist
1056     Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1057     block->map_node(n, phi_cnt++);    // Schedule him next
1058 
1059     if (OptoRegScheduling && block_size_threshold_ok) {
1060       n->add_flag(Node::Flag_is_scheduled);
1061 
1062       // Now adjust the resister pressure with the node we selected
1063       if (!n->is_Phi()) {
1064         adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1065       }
1066     }
1067 
1068 #ifndef PRODUCT
1069     if (trace_opto_pipelining()) {
1070       tty->print("#    select %d: %s", n->_idx, n->Name());
1071       tty->print(", latency:%d", get_latency_for_node(n));
1072       n->dump();
1073       if (Verbose) {
1074         tty->print("#   ready list:");
1075         for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1076           Node *n = worklist[i];      // Get Node on worklist
1077           tty->print(" %d", n->_idx);
1078         }
1079         tty->cr();
1080       }
1081     }
1082 
1083 #endif
1084     if( n->is_MachCall() ) {
1085       MachCallNode *mcall = n->as_MachCall();
1086       phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1087       continue;
1088     }
1089 
1090     if (n->is_Mach() && n->as_Mach()->has_call()) {
1091       RegMask regs;
1092       regs.Insert(_matcher.c_frame_pointer());
1093       regs.OR(n->out_RegMask());
1094 
1095       MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, static_cast<Opcodes>(MachProjNode::projType::fat_proj) );
1096       map_node_to_block(proj, block);
1097       block->insert_node(proj, phi_cnt++);
1098 
1099       add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1100     }
1101 
1102     // Children are now all ready
1103     for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1104       Node* m = n->fast_out(i5); // Get user
1105       if (get_block_for_node(m) != block) {
1106         continue;
1107       }
1108       if( m->is_Phi() ) continue;
1109       if (m->_idx >= max_idx) { // new node, skip it
1110         assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1111         continue;
1112       }
1113       int m_cnt = ready_cnt.at(m->_idx) - 1;
1114       ready_cnt.at_put(m->_idx, m_cnt);
1115       if( m_cnt == 0 )
1116         worklist.push(m);
1117     }
1118   }
1119 
1120   if( phi_cnt != block->end_idx() ) {
1121     // did not schedule all.  Retry, Bailout, or Die
1122     if (C->subsume_loads() == true && !C->failing()) {
1123       // Retry with subsume_loads == false
1124       // If this is the first failure, the sentinel string will "stick"
1125       // to the Compile object, and the C2Compiler will see it and retry.
1126       C->record_failure(C2Compiler::retry_no_subsuming_loads());
1127     }
1128     // assert( phi_cnt == end_idx(), "did not schedule all" );
1129     return false;
1130   }
1131 
1132   if (OptoRegScheduling && block_size_threshold_ok) {
1133     _regalloc->compute_exit_block_pressure(block);
1134     block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1135     block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1136   }
1137 
1138 #ifndef PRODUCT
1139   if (trace_opto_pipelining()) {
1140     tty->print_cr("#");
1141     tty->print_cr("# after schedule_local");
1142     for (uint i = 0;i < block->number_of_nodes();i++) {
1143       tty->print("# ");
1144       block->get_node(i)->fast_dump();
1145     }
1146     tty->print_cr("# ");
1147 
1148     if (OptoRegScheduling && block_size_threshold_ok) {
1149       tty->print_cr("# pressure info : %d", block->_pre_order);
1150       _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1151       _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1152     }
1153     tty->cr();
1154   }
1155 #endif
1156 
1157   return true;
1158 }
1159 
1160 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1161 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1162   for (uint l = 0; l < use->len(); l++) {
1163     if (use->in(l) == old_def) {
1164       if (l < use->req()) {
1165         use->set_req(l, new_def);
1166       } else {
1167         use->rm_prec(l);
1168         use->add_prec(new_def);
1169         l--;
1170       }
1171     }
1172   }
1173 }
1174 
1175 //------------------------------catch_cleanup_find_cloned_def------------------
1176 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1177   assert( use_blk != def_blk, "Inter-block cleanup only");
1178 
1179   // The use is some block below the Catch.  Find and return the clone of the def
1180   // that dominates the use. If there is no clone in a dominating block, then
1181   // create a phi for the def in a dominating block.
1182 
1183   // Find which successor block dominates this use.  The successor
1184   // blocks must all be single-entry (from the Catch only; I will have
1185   // split blocks to make this so), hence they all dominate.
1186   while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1187     use_blk = use_blk->_idom;
1188 
1189   // Find the successor
1190   Node *fixup = NULL;
1191 
1192   uint j;
1193   for( j = 0; j < def_blk->_num_succs; j++ )
1194     if( use_blk == def_blk->_succs[j] )
1195       break;
1196 
1197   if( j == def_blk->_num_succs ) {
1198     // Block at same level in dom-tree is not a successor.  It needs a
1199     // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1200     Node_Array inputs = new Node_List(Thread::current()->resource_area());
1201     for(uint k = 1; k < use_blk->num_preds(); k++) {
1202       Block* block = get_block_for_node(use_blk->pred(k));
1203       inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1204     }
1205 
1206     // Check to see if the use_blk already has an identical phi inserted.
1207     // If it exists, it will be at the first position since all uses of a
1208     // def are processed together.
1209     Node *phi = use_blk->get_node(1);
1210     if( phi->is_Phi() ) {
1211       fixup = phi;
1212       for (uint k = 1; k < use_blk->num_preds(); k++) {
1213         if (phi->in(k) != inputs[k]) {
1214           // Not a match
1215           fixup = NULL;
1216           break;
1217         }
1218       }
1219     }
1220 
1221     // If an existing PhiNode was not found, make a new one.
1222     if (fixup == NULL) {
1223       Node *new_phi = PhiNode::make(use_blk->head(), def);
1224       use_blk->insert_node(new_phi, 1);
1225       map_node_to_block(new_phi, use_blk);
1226       for (uint k = 1; k < use_blk->num_preds(); k++) {
1227         new_phi->set_req(k, inputs[k]);
1228       }
1229       fixup = new_phi;
1230     }
1231 
1232   } else {
1233     // Found the use just below the Catch.  Make it use the clone.
1234     fixup = use_blk->get_node(n_clone_idx);
1235   }
1236 
1237   return fixup;
1238 }
1239 
1240 //--------------------------catch_cleanup_intra_block--------------------------
1241 // Fix all input edges in use that reference "def".  The use is in the same
1242 // block as the def and both have been cloned in each successor block.
1243 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1244 
1245   // Both the use and def have been cloned. For each successor block,
1246   // get the clone of the use, and make its input the clone of the def
1247   // found in that block.
1248 
1249   uint use_idx = blk->find_node(use);
1250   uint offset_idx = use_idx - beg;
1251   for( uint k = 0; k < blk->_num_succs; k++ ) {
1252     // Get clone in each successor block
1253     Block *sb = blk->_succs[k];
1254     Node *clone = sb->get_node(offset_idx+1);
1255     assert( clone->Opcode() == use->Opcode(), "" );
1256 
1257     // Make use-clone reference the def-clone
1258     catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1259   }
1260 }
1261 
1262 //------------------------------catch_cleanup_inter_block---------------------
1263 // Fix all input edges in use that reference "def".  The use is in a different
1264 // block than the def.
1265 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1266   if( !use_blk ) return;        // Can happen if the use is a precedence edge
1267 
1268   Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1269   catch_cleanup_fix_all_inputs(use, def, new_def);
1270 }
1271 
1272 //------------------------------call_catch_cleanup-----------------------------
1273 // If we inserted any instructions between a Call and his CatchNode,
1274 // clone the instructions on all paths below the Catch.
1275 void PhaseCFG::call_catch_cleanup(Block* block) {
1276 
1277   // End of region to clone
1278   uint end = block->end_idx();
1279   if( !block->get_node(end)->is_Catch() ) return;
1280   // Start of region to clone
1281   uint beg = end;
1282   while(!block->get_node(beg-1)->is_MachProj() ||
1283         !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1284     beg--;
1285     assert(beg > 0,"Catch cleanup walking beyond block boundary");
1286   }
1287   // Range of inserted instructions is [beg, end)
1288   if( beg == end ) return;
1289 
1290   // Clone along all Catch output paths.  Clone area between the 'beg' and
1291   // 'end' indices.
1292   for( uint i = 0; i < block->_num_succs; i++ ) {
1293     Block *sb = block->_succs[i];
1294     // Clone the entire area; ignoring the edge fixup for now.
1295     for( uint j = end; j > beg; j-- ) {
1296       // It is safe here to clone a node with anti_dependence
1297       // since clones dominate on each path.
1298       Node *clone = block->get_node(j-1)->clone();
1299       sb->insert_node(clone, 1);
1300       map_node_to_block(clone, sb);
1301     }
1302   }
1303 
1304 
1305   // Fixup edges.  Check the def-use info per cloned Node
1306   for(uint i2 = beg; i2 < end; i2++ ) {
1307     uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1308     Node *n = block->get_node(i2);        // Node that got cloned
1309     // Need DU safe iterator because of edge manipulation in calls.
1310     Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
1311     for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1312       out->push(n->fast_out(j1));
1313     }
1314     uint max = out->size();
1315     for (uint j = 0; j < max; j++) {// For all users
1316       Node *use = out->pop();
1317       Block *buse = get_block_for_node(use);
1318       if( use->is_Phi() ) {
1319         for( uint k = 1; k < use->req(); k++ )
1320           if( use->in(k) == n ) {
1321             Block* b = get_block_for_node(buse->pred(k));
1322             Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1323             use->set_req(k, fixup);
1324           }
1325       } else {
1326         if (block == buse) {
1327           catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1328         } else {
1329           catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1330         }
1331       }
1332     } // End for all users
1333 
1334   } // End of for all Nodes in cloned area
1335 
1336   // Remove the now-dead cloned ops
1337   for(uint i3 = beg; i3 < end; i3++ ) {
1338     block->get_node(beg)->disconnect_inputs(NULL, C);
1339     block->remove_node(beg);
1340   }
1341 
1342   // If the successor blocks have a CreateEx node, move it back to the top
1343   for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
1344     Block *sb = block->_succs[i4];
1345     uint new_cnt = end - beg;
1346     // Remove any newly created, but dead, nodes.
1347     for( uint j = new_cnt; j > 0; j-- ) {
1348       Node *n = sb->get_node(j);
1349       if (n->outcnt() == 0 &&
1350           (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
1351         n->disconnect_inputs(NULL, C);
1352         sb->remove_node(j);
1353         new_cnt--;
1354       }
1355     }
1356     // If any newly created nodes remain, move the CreateEx node to the top
1357     if (new_cnt > 0) {
1358       Node *cex = sb->get_node(1+new_cnt);
1359       if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Opcodes::Op_CreateEx ) {
1360         sb->remove_node(1+new_cnt);
1361         sb->insert_node(cex, 1);
1362       }
1363     }
1364   }
1365 }