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src/share/vm/opto/lcm.cpp

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  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/ad.hpp"
  28 #include "opto/block.hpp"
  29 #include "opto/c2compiler.hpp"
  30 #include "opto/callnode.hpp"
  31 #include "opto/cfgnode.hpp"
  32 #include "opto/machnode.hpp"
  33 #include "opto/runtime.hpp"
  34 #include "opto/chaitin.hpp"
  35 #include "runtime/sharedRuntime.hpp"
  36 
  37 // Optimization - Graph Style
  38 
  39 // Check whether val is not-null-decoded compressed oop,
  40 // i.e. will grab into the base of the heap if it represents NULL.
  41 static bool accesses_heap_base_zone(Node *val) {
  42   if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops.
  43     if (val && val->is_Mach()) {
  44       if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
  45         // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
  46         // decode NULL to point to the heap base (Decode_NN).
  47         if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
  48           return true;
  49         }
  50       }
  51       // Must recognize load operation with Decode matched in memory operand.
  52       // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
  53       // returns true everywhere else. On PPC, no such memory operands
  54       // exist, therefore we did not yet implement a check for such operands.
  55       NOT_AIX(Unimplemented());
  56     }
  57   }
  58   return false;
  59 }
  60 
  61 static bool needs_explicit_null_check_for_read(Node *val) {
  62   // On some OSes (AIX) the page at address 0 is only write protected.
  63   // If so, only Store operations will trap.
  64   if (os::zero_page_read_protected()) {


  71   }
  72 
  73   return true;
  74 }
  75 
  76 //------------------------------implicit_null_check----------------------------
  77 // Detect implicit-null-check opportunities.  Basically, find NULL checks
  78 // with suitable memory ops nearby.  Use the memory op to do the NULL check.
  79 // I can generate a memory op if there is not one nearby.
  80 // The proj is the control projection for the not-null case.
  81 // The val is the pointer being checked for nullness or
  82 // decodeHeapOop_not_null node if it did not fold into address.
  83 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
  84   // Assume if null check need for 0 offset then always needed
  85   // Intel solaris doesn't support any null checks yet and no
  86   // mechanism exists (yet) to set the switches at an os_cpu level
  87   if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
  88 
  89   // Make sure the ptr-is-null path appears to be uncommon!
  90   float f = block->end()->as_MachIf()->_prob;
  91   if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
  92   if( f > PROB_UNLIKELY_MAG(4) ) return;
  93 
  94   uint bidx = 0;                // Capture index of value into memop
  95   bool was_store;               // Memory op is a store op
  96 
  97   // Get the successor block for if the test ptr is non-null
  98   Block* not_null_block;  // this one goes with the proj
  99   Block* null_block;
 100   if (block->get_node(block->number_of_nodes()-1) == proj) {
 101     null_block     = block->_succs[0];
 102     not_null_block = block->_succs[1];
 103   } else {
 104     assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
 105     not_null_block = block->_succs[0];
 106     null_block     = block->_succs[1];
 107   }
 108   while (null_block->is_Empty() == Block::empty_with_goto) {
 109     null_block     = null_block->_succs[0];
 110   }
 111 


 130             // This uncommon trap is sure to recompile, eventually.
 131             // When that happens, C->too_many_traps will prevent
 132             // this transformation from happening again.
 133             found_trap = true;
 134           }
 135         }
 136         break;
 137       }
 138     }
 139     if (!found_trap) {
 140       // We did not find an uncommon trap.
 141       return;
 142     }
 143   }
 144 
 145   // Check for decodeHeapOop_not_null node which did not fold into address
 146   bool is_decoden = ((intptr_t)val) & 1;
 147   val = (Node*)(((intptr_t)val) & ~1);
 148 
 149   assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
 150          (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
 151 
 152   // Search the successor block for a load or store who's base value is also
 153   // the tested value.  There may be several.
 154   Node_List *out = new Node_List(Thread::current()->resource_area());
 155   MachNode *best = NULL;        // Best found so far
 156   for (DUIterator i = val->outs(); val->has_out(i); i++) {
 157     Node *m = val->out(i);
 158     if( !m->is_Mach() ) continue;
 159     MachNode *mach = m->as_Mach();
 160     was_store = false;
 161     int iop = mach->ideal_Opcode();
 162     switch( iop ) {
 163     case Op_LoadB:
 164     case Op_LoadUB:
 165     case Op_LoadUS:
 166     case Op_LoadD:
 167     case Op_LoadF:
 168     case Op_LoadI:
 169     case Op_LoadL:
 170     case Op_LoadP:
 171     case Op_LoadN:
 172     case Op_LoadS:
 173     case Op_LoadKlass:
 174     case Op_LoadNKlass:
 175     case Op_LoadRange:
 176     case Op_LoadD_unaligned:
 177     case Op_LoadL_unaligned:
 178       assert(mach->in(2) == val, "should be address");
 179       break;
 180     case Op_StoreB:
 181     case Op_StoreC:
 182     case Op_StoreCM:
 183     case Op_StoreD:
 184     case Op_StoreF:
 185     case Op_StoreI:
 186     case Op_StoreL:
 187     case Op_StoreP:
 188     case Op_StoreN:
 189     case Op_StoreNKlass:
 190       was_store = true;         // Memory op is a store op
 191       // Stores will have their address in slot 2 (memory in slot 1).
 192       // If the value being nul-checked is in another slot, it means we
 193       // are storing the checked value, which does NOT check the value!
 194       if( mach->in(2) != val ) continue;
 195       break;                    // Found a memory op?
 196     case Op_StrComp:
 197     case Op_StrEquals:
 198     case Op_StrIndexOf:
 199     case Op_StrIndexOfChar:
 200     case Op_AryEq:
 201     case Op_StrInflatedCopy:
 202     case Op_StrCompressedCopy:
 203     case Op_EncodeISOArray:
 204     case Op_HasNegatives:
 205       // Not a legit memory op for implicit null check regardless of
 206       // embedded loads
 207       continue;
 208     default:                    // Also check for embedded loads
 209       if( !mach->needs_anti_dependence_check() )
 210         continue;               // Not an memory op; skip it
 211       if( must_clone[iop] ) {
 212         // Do not move nodes which produce flags because
 213         // RA will try to clone it to place near branch and
 214         // it will cause recompilation, see clone_node().
 215         continue;
 216       }
 217       {
 218         // Check that value is used in memory address in
 219         // instructions with embedded load (CmpP val1,(val2+off)).
 220         Node* base;
 221         Node* index;
 222         const MachOper* oper = mach->memory_inputs(base, index);
 223         if (oper == NULL || oper == (MachOper*)-1) {
 224           continue;             // Not an memory op; skip it
 225         }
 226         if (val == base ||
 227             val == index && val->bottom_type()->isa_narrowoop()) {
 228           break;                // Found it
 229         } else {
 230           continue;             // Skip it
 231         }


 384     best->set_req(0, block->head());
 385 
 386   // Check for flag-killing projections that also need to be hoisted
 387   // Should be DU safe because no edge updates.
 388   for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
 389     Node* n = best->fast_out(j);
 390     if( n->is_MachProj() ) {
 391       get_block_for_node(n)->find_remove(n);
 392       block->add_inst(n);
 393       map_node_to_block(n, block);
 394     }
 395   }
 396 
 397   // proj==Op_True --> ne test; proj==Op_False --> eq test.
 398   // One of two graph shapes got matched:
 399   //   (IfTrue  (If (Bool NE (CmpP ptr NULL))))
 400   //   (IfFalse (If (Bool EQ (CmpP ptr NULL))))
 401   // NULL checks are always branch-if-eq.  If we see a IfTrue projection
 402   // then we are replacing a 'ne' test with a 'eq' NULL check test.
 403   // We need to flip the projections to keep the same semantics.
 404   if( proj->Opcode() == Op_IfTrue ) {
 405     // Swap order of projections in basic block to swap branch targets
 406     Node *tmp1 = block->get_node(block->end_idx()+1);
 407     Node *tmp2 = block->get_node(block->end_idx()+2);
 408     block->map_node(tmp2, block->end_idx()+1);
 409     block->map_node(tmp1, block->end_idx()+2);
 410     Node *tmp = new Node(C->top()); // Use not NULL input
 411     tmp1->replace_by(tmp);
 412     tmp2->replace_by(tmp1);
 413     tmp->replace_by(tmp2);
 414     tmp->destruct();
 415   }
 416 
 417   // Remove the existing null check; use a new implicit null check instead.
 418   // Since schedule-local needs precise def-use info, we need to correct
 419   // it as well.
 420   Node *old_tst = proj->in(0);
 421   MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
 422   block->map_node(nul_chk, block->end_idx());
 423   map_node_to_block(nul_chk, block);
 424   // Redirect users of old_test to nul_chk


 463   if (cnt == 1) {
 464     Node *n = worklist[0];
 465     worklist.map(0,worklist.pop());
 466     return n;
 467   }
 468 
 469   uint choice  = 0; // Bigger is most important
 470   uint latency = 0; // Bigger is scheduled first
 471   uint score   = 0; // Bigger is better
 472   int idx = -1;     // Index in worklist
 473   int cand_cnt = 0; // Candidate count
 474   bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
 475 
 476   for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
 477     // Order in worklist is used to break ties.
 478     // See caller for how this is used to delay scheduling
 479     // of induction variable increments to after the other
 480     // uses of the phi are scheduled.
 481     Node *n = worklist[i];      // Get Node on worklist
 482 
 483     int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
 484     if( n->is_Proj() ||         // Projections always win
 485         n->Opcode()== Op_Con || // So does constant 'Top'
 486         iop == Op_CreateEx ||   // Create-exception must start block
 487         iop == Op_CheckCastPP
 488         ) {
 489       worklist.map(i,worklist.pop());
 490       return n;
 491     }
 492 
 493     // Final call in a block must be adjacent to 'catch'
 494     Node *e = block->end();
 495     if( e->is_Catch() && e->in(0)->in(0) == n )
 496       continue;
 497 
 498     // Memory op for an implicit null check has to be at the end of the block
 499     if( e->is_MachNullCheck() && e->in(1) == n )
 500       continue;
 501 
 502     // Schedule IV increment last.
 503     if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
 504       // Cmp might be matched into CountedLoopEnd node.
 505       Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
 506       if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
 507         continue;
 508       }
 509     }
 510 
 511     uint n_choice  = 2;
 512 
 513     // See if this instruction is consumed by a branch. If so, then (as the
 514     // branch is the last instruction in the basic block) force it to the
 515     // end of the basic block
 516     if ( must_clone[iop] ) {
 517       // See if any use is a branch
 518       bool found_machif = false;
 519 
 520       for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 521         Node* use = n->fast_out(j);
 522 
 523         // The use is a conditional branch, make them adjacent
 524         if (use->is_MachIf() && get_block_for_node(use) == block) {
 525           found_machif = true;
 526           break;
 527         }
 528 
 529         // More than this instruction pending for successor to be ready,
 530         // don't choose this if other opportunities are ready
 531         if (ready_cnt.at(use->_idx) > 1)
 532           n_choice = 1;
 533       }
 534 
 535       // loop terminated, prefer not to use this instruction
 536       if (found_machif)
 537         continue;
 538     }
 539 
 540     // See if this has a predecessor that is "must_clone", i.e. sets the
 541     // condition code. If so, choose this first
 542     for (uint j = 0; j < n->req() ; j++) {
 543       Node *inn = n->in(j);
 544       if (inn) {
 545         if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
 546           n_choice = 3;
 547           break;
 548         }
 549       }
 550     }
 551 
 552     // MachTemps should be scheduled last so they are near their uses
 553     if (n->is_MachTemp()) {
 554       n_choice = 1;
 555     }
 556 
 557     uint n_latency = get_latency_for_node(n);
 558     uint n_score = n->req();   // Many inputs get high score to break ties
 559 
 560     if (OptoRegScheduling && block_size_threshold_ok) {
 561       if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
 562         _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
 563         _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
 564         // simulate the notion that we just picked this node to schedule
 565         n->add_flag(Node::Flag_is_scheduled);


 625   PhaseLive* liveinfo = _regalloc->get_live();
 626   IndexSet* liveout = liveinfo->live(block);
 627   // first adjust the register pressure for the sources
 628   for (uint i = 1; i < n->req(); i++) {
 629     bool lrg_ends = false;
 630     Node *src_n = n->in(i);
 631     if (src_n == NULL) continue;
 632     if (!src_n->is_Mach()) continue;
 633     uint src = _regalloc->_lrg_map.find(src_n);
 634     if (src == 0) continue;
 635     LRG& lrg_src = _regalloc->lrgs(src);
 636     // detect if the live range ends or not
 637     if (liveout->member(src) == false) {
 638       lrg_ends = true;
 639       for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
 640         Node* m = src_n->fast_out(j); // Get user
 641         if (m == n) continue;
 642         if (!m->is_Mach()) continue;
 643         MachNode *mach = m->as_Mach();
 644         bool src_matches = false;
 645         int iop = mach->ideal_Opcode();
 646 
 647         switch (iop) {
 648         case Op_StoreB:
 649         case Op_StoreC:
 650         case Op_StoreCM:
 651         case Op_StoreD:
 652         case Op_StoreF:
 653         case Op_StoreI:
 654         case Op_StoreL:
 655         case Op_StoreP:
 656         case Op_StoreN:
 657         case Op_StoreVector:
 658         case Op_StoreNKlass:
 659           for (uint k = 1; k < m->req(); k++) {
 660             Node *in = m->in(k);
 661             if (in == src_n) {
 662               src_matches = true;
 663               break;
 664             }
 665           }
 666           break;
 667 
 668         default:
 669           src_matches = true;
 670           break;
 671         }
 672 
 673         // If we have a store as our use, ignore the non source operands
 674         if (src_matches == false) continue;
 675 
 676         // Mark every unscheduled use which is not n with a recalculation
 677         if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
 678           if (finalize_mode && !m->is_Phi()) {


 793     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 794       Node* m = n->fast_out(j); // Get user
 795       if(get_block_for_node(m) != block) {
 796         continue;
 797       }
 798       if( m->is_Phi() ) continue;
 799       int m_cnt = ready_cnt.at(m->_idx) - 1;
 800       ready_cnt.at_put(m->_idx, m_cnt);
 801       if( m_cnt == 0 )
 802         worklist.push(m);
 803     }
 804 
 805   }
 806 
 807   // Act as if the call defines the Frame Pointer.
 808   // Certainly the FP is alive and well after the call.
 809   regs.Insert(_matcher.c_frame_pointer());
 810 
 811   // Set all registers killed and not already defined by the call.
 812   uint r_cnt = mcall->tf()->range()->cnt();
 813   int op = mcall->ideal_Opcode();
 814   MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
 815   map_node_to_block(proj, block);
 816   block->insert_node(proj, node_cnt++);
 817 
 818   // Select the right register save policy.
 819   const char *save_policy = NULL;
 820   switch (op) {
 821     case Op_CallRuntime:
 822     case Op_CallLeaf:
 823     case Op_CallLeafNoFP:
 824       // Calling C code so use C calling convention
 825       save_policy = _matcher._c_reg_save_policy;
 826       break;
 827 
 828     case Op_CallStaticJava:
 829     case Op_CallDynamicJava:
 830       // Calling Java code so use Java calling convention
 831       save_policy = _matcher._register_save_policy;
 832       break;
 833 
 834     default:
 835       ShouldNotReachHere();
 836   }
 837 
 838   // When using CallRuntime mark SOE registers as killed by the call
 839   // so values that could show up in the RegisterMap aren't live in a
 840   // callee saved register since the register wouldn't know where to
 841   // find them.  CallLeaf and CallLeafNoFP are ok because they can't
 842   // have debug info on them.  Strictly speaking this only needs to be
 843   // done for oops since idealreg2debugmask takes care of debug info
 844   // references but there no way to handle oops differently than other
 845   // pointers as far as the kill mask goes.
 846   bool exclude_soe = op == Op_CallRuntime;
 847 
 848   // If the call is a MethodHandle invoke, we need to exclude the
 849   // register which is used to save the SP value over MH invokes from
 850   // the mask.  Otherwise this register could be used for
 851   // deoptimization information.
 852   if (op == Op_CallStaticJava) {
 853     MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
 854     if (mcallstaticjava->_method_handle_invoke)
 855       proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
 856   }
 857 
 858   add_call_kills(proj, regs, save_policy, exclude_soe);
 859 
 860   return node_cnt;
 861 }
 862 
 863 
 864 //------------------------------schedule_local---------------------------------
 865 // Topological sort within a block.  Someday become a real scheduler.
 866 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
 867   // Already "sorted" are the block start Node (as the first entry), and
 868   // the block-ending Node and any trailing control projections.  We leave
 869   // these alone.  PhiNodes and ParmNodes are made to follow the block start
 870   // Node.  Everything else gets topo-sorted.
 871 
 872 #ifndef PRODUCT


 910       // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
 911       block->map_node(block->get_node(phi_cnt), i);
 912       block->map_node(n, phi_cnt++);  // swap Phi/Parm up front
 913       if (OptoRegScheduling && block_size_threshold_ok) {
 914         // mark n as scheduled
 915         n->add_flag(Node::Flag_is_scheduled);
 916       }
 917     } else {                    // All others
 918       // Count block-local inputs to 'n'
 919       uint cnt = n->len();      // Input count
 920       uint local = 0;
 921       for( uint j=0; j<cnt; j++ ) {
 922         Node *m = n->in(j);
 923         if( m && get_block_for_node(m) == block && !m->is_top() )
 924           local++;              // One more block-local input
 925       }
 926       ready_cnt.at_put(n->_idx, local); // Count em up
 927 
 928 #ifdef ASSERT
 929       if( UseConcMarkSweepGC || UseG1GC ) {
 930         if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
 931           // Check the precedence edges
 932           for (uint prec = n->req(); prec < n->len(); prec++) {
 933             Node* oop_store = n->in(prec);
 934             if (oop_store != NULL) {
 935               assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
 936             }
 937           }
 938         }
 939       }
 940 #endif
 941 
 942       // A few node types require changing a required edge to a precedence edge
 943       // before allocation.
 944       if( n->is_Mach() && n->req() > TypeFunc::Parms &&
 945           (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
 946            n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
 947         // MemBarAcquire could be created without Precedent edge.
 948         // del_req() replaces the specified edge with the last input edge
 949         // and then removes the last edge. If the specified edge > number of
 950         // edges the last edge will be moved outside of the input edges array
 951         // and the edge will be lost. This is why this code should be
 952         // executed only when Precedent (== TypeFunc::Parms) edge is present.
 953         Node *x = n->in(TypeFunc::Parms);
 954         if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
 955           // Old edge to node within same block will get removed, but no precedence
 956           // edge will get added because it already exists. Update ready count.
 957           int cnt = ready_cnt.at(n->_idx);
 958           assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
 959           ready_cnt.at_put(n->_idx, cnt-1);
 960         }
 961         n->del_req(TypeFunc::Parms);
 962         n->add_prec(x);
 963       }
 964     }
 965   }
 966   for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count


 979           if (m_cnt < 0) {
 980             m->add_flag(Node::Flag_is_scheduled);
 981           }
 982         }
 983         ready_cnt.at_put(m->_idx, m_cnt);   // Fix ready count
 984       }
 985     }
 986   }
 987 
 988   Node_List delay;
 989   // Make a worklist
 990   Node_List worklist;
 991   for(uint i4=i3; i4<node_cnt; i4++ ) {    // Put ready guys on worklist
 992     Node *m = block->get_node(i4);
 993     if( !ready_cnt.at(m->_idx) ) {   // Zero ready count?
 994       if (m->is_iteratively_computed()) {
 995         // Push induction variable increments last to allow other uses
 996         // of the phi to be scheduled first. The select() method breaks
 997         // ties in scheduling by worklist order.
 998         delay.push(m);
 999       } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1000         // Force the CreateEx to the top of the list so it's processed
1001         // first and ends up at the start of the block.
1002         worklist.insert(0, m);
1003       } else {
1004         worklist.push(m);         // Then on to worklist!
1005       }
1006     }
1007   }
1008   while (delay.size()) {
1009     Node* d = delay.pop();
1010     worklist.push(d);
1011   }
1012 
1013   if (OptoRegScheduling && block_size_threshold_ok) {
1014     // To stage register pressure calculations we need to examine the live set variables
1015     // breaking them up by register class to compartmentalize the calculations.
1016     uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
1017     _regalloc->_sched_int_pressure.init(INTPRESSURE);
1018     _regalloc->_sched_float_pressure.init(float_pressure);
1019     _regalloc->_scratch_int_pressure.init(INTPRESSURE);


1075         for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1076           Node *n = worklist[i];      // Get Node on worklist
1077           tty->print(" %d", n->_idx);
1078         }
1079         tty->cr();
1080       }
1081     }
1082 
1083 #endif
1084     if( n->is_MachCall() ) {
1085       MachCallNode *mcall = n->as_MachCall();
1086       phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1087       continue;
1088     }
1089 
1090     if (n->is_Mach() && n->as_Mach()->has_call()) {
1091       RegMask regs;
1092       regs.Insert(_matcher.c_frame_pointer());
1093       regs.OR(n->out_RegMask());
1094 
1095       MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1096       map_node_to_block(proj, block);
1097       block->insert_node(proj, phi_cnt++);
1098 
1099       add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1100     }
1101 
1102     // Children are now all ready
1103     for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1104       Node* m = n->fast_out(i5); // Get user
1105       if (get_block_for_node(m) != block) {
1106         continue;
1107       }
1108       if( m->is_Phi() ) continue;
1109       if (m->_idx >= max_idx) { // new node, skip it
1110         assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1111         continue;
1112       }
1113       int m_cnt = ready_cnt.at(m->_idx) - 1;
1114       ready_cnt.at_put(m->_idx, m_cnt);
1115       if( m_cnt == 0 )


1339     block->remove_node(beg);
1340   }
1341 
1342   // If the successor blocks have a CreateEx node, move it back to the top
1343   for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
1344     Block *sb = block->_succs[i4];
1345     uint new_cnt = end - beg;
1346     // Remove any newly created, but dead, nodes.
1347     for( uint j = new_cnt; j > 0; j-- ) {
1348       Node *n = sb->get_node(j);
1349       if (n->outcnt() == 0 &&
1350           (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
1351         n->disconnect_inputs(NULL, C);
1352         sb->remove_node(j);
1353         new_cnt--;
1354       }
1355     }
1356     // If any newly created nodes remain, move the CreateEx node to the top
1357     if (new_cnt > 0) {
1358       Node *cex = sb->get_node(1+new_cnt);
1359       if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1360         sb->remove_node(1+new_cnt);
1361         sb->insert_node(cex, 1);
1362       }
1363     }
1364   }
1365 }


  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/ad.hpp"
  28 #include "opto/block.hpp"
  29 #include "opto/c2compiler.hpp"
  30 #include "opto/callnode.hpp"
  31 #include "opto/cfgnode.hpp"
  32 #include "opto/machnode.hpp"
  33 #include "opto/runtime.hpp"
  34 #include "opto/chaitin.hpp"
  35 #include "runtime/sharedRuntime.hpp"
  36 
  37 // Optimization - Graph Style
  38 
  39 // Check whether val is not-null-decoded compressed oop,
  40 // i.e. will grab into the base of the heap if it represents NULL.
  41 static bool accesses_heap_base_zone(Node *val) {
  42   if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops.
  43     if (val && val->is_Mach()) {
  44       if (val->as_Mach()->ideal_Opcode() == Opcodes::Op_DecodeN) {
  45         // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
  46         // decode NULL to point to the heap base (Decode_NN).
  47         if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
  48           return true;
  49         }
  50       }
  51       // Must recognize load operation with Decode matched in memory operand.
  52       // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
  53       // returns true everywhere else. On PPC, no such memory operands
  54       // exist, therefore we did not yet implement a check for such operands.
  55       NOT_AIX(Unimplemented());
  56     }
  57   }
  58   return false;
  59 }
  60 
  61 static bool needs_explicit_null_check_for_read(Node *val) {
  62   // On some OSes (AIX) the page at address 0 is only write protected.
  63   // If so, only Store operations will trap.
  64   if (os::zero_page_read_protected()) {


  71   }
  72 
  73   return true;
  74 }
  75 
  76 //------------------------------implicit_null_check----------------------------
  77 // Detect implicit-null-check opportunities.  Basically, find NULL checks
  78 // with suitable memory ops nearby.  Use the memory op to do the NULL check.
  79 // I can generate a memory op if there is not one nearby.
  80 // The proj is the control projection for the not-null case.
  81 // The val is the pointer being checked for nullness or
  82 // decodeHeapOop_not_null node if it did not fold into address.
  83 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
  84   // Assume if null check need for 0 offset then always needed
  85   // Intel solaris doesn't support any null checks yet and no
  86   // mechanism exists (yet) to set the switches at an os_cpu level
  87   if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
  88 
  89   // Make sure the ptr-is-null path appears to be uncommon!
  90   float f = block->end()->as_MachIf()->_prob;
  91   if( proj->Opcode() == Opcodes::Op_IfTrue ) f = 1.0f - f;
  92   if( f > PROB_UNLIKELY_MAG(4) ) return;
  93 
  94   uint bidx = 0;                // Capture index of value into memop
  95   bool was_store;               // Memory op is a store op
  96 
  97   // Get the successor block for if the test ptr is non-null
  98   Block* not_null_block;  // this one goes with the proj
  99   Block* null_block;
 100   if (block->get_node(block->number_of_nodes()-1) == proj) {
 101     null_block     = block->_succs[0];
 102     not_null_block = block->_succs[1];
 103   } else {
 104     assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
 105     not_null_block = block->_succs[0];
 106     null_block     = block->_succs[1];
 107   }
 108   while (null_block->is_Empty() == Block::empty_with_goto) {
 109     null_block     = null_block->_succs[0];
 110   }
 111 


 130             // This uncommon trap is sure to recompile, eventually.
 131             // When that happens, C->too_many_traps will prevent
 132             // this transformation from happening again.
 133             found_trap = true;
 134           }
 135         }
 136         break;
 137       }
 138     }
 139     if (!found_trap) {
 140       // We did not find an uncommon trap.
 141       return;
 142     }
 143   }
 144 
 145   // Check for decodeHeapOop_not_null node which did not fold into address
 146   bool is_decoden = ((intptr_t)val) & 1;
 147   val = (Node*)(((intptr_t)val) & ~1);
 148 
 149   assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
 150          (val->as_Mach()->ideal_Opcode() == Opcodes::Op_DecodeN), "sanity");
 151 
 152   // Search the successor block for a load or store who's base value is also
 153   // the tested value.  There may be several.
 154   Node_List *out = new Node_List(Thread::current()->resource_area());
 155   MachNode *best = NULL;        // Best found so far
 156   for (DUIterator i = val->outs(); val->has_out(i); i++) {
 157     Node *m = val->out(i);
 158     if( !m->is_Mach() ) continue;
 159     MachNode *mach = m->as_Mach();
 160     was_store = false;
 161     Opcodes iop = mach->ideal_Opcode();
 162     switch( iop ) {
 163     case Opcodes::Op_LoadB:
 164     case Opcodes::Op_LoadUB:
 165     case Opcodes::Op_LoadUS:
 166     case Opcodes::Op_LoadD:
 167     case Opcodes::Op_LoadF:
 168     case Opcodes::Op_LoadI:
 169     case Opcodes::Op_LoadL:
 170     case Opcodes::Op_LoadP:
 171     case Opcodes::Op_LoadN:
 172     case Opcodes::Op_LoadS:
 173     case Opcodes::Op_LoadKlass:
 174     case Opcodes::Op_LoadNKlass:
 175     case Opcodes::Op_LoadRange:
 176     case Opcodes::Op_LoadD_unaligned:
 177     case Opcodes::Op_LoadL_unaligned:
 178       assert(mach->in(2) == val, "should be address");
 179       break;
 180     case Opcodes::Op_StoreB:
 181     case Opcodes::Op_StoreC:
 182     case Opcodes::Op_StoreCM:
 183     case Opcodes::Op_StoreD:
 184     case Opcodes::Op_StoreF:
 185     case Opcodes::Op_StoreI:
 186     case Opcodes::Op_StoreL:
 187     case Opcodes::Op_StoreP:
 188     case Opcodes::Op_StoreN:
 189     case Opcodes::Op_StoreNKlass:
 190       was_store = true;         // Memory op is a store op
 191       // Stores will have their address in slot 2 (memory in slot 1).
 192       // If the value being nul-checked is in another slot, it means we
 193       // are storing the checked value, which does NOT check the value!
 194       if( mach->in(2) != val ) continue;
 195       break;                    // Found a memory op?
 196     case Opcodes::Op_StrComp:
 197     case Opcodes::Op_StrEquals:
 198     case Opcodes::Op_StrIndexOf:
 199     case Opcodes::Op_StrIndexOfChar:
 200     case Opcodes::Op_AryEq:
 201     case Opcodes::Op_StrInflatedCopy:
 202     case Opcodes::Op_StrCompressedCopy:
 203     case Opcodes::Op_EncodeISOArray:
 204     case Opcodes::Op_HasNegatives:
 205       // Not a legit memory op for implicit null check regardless of
 206       // embedded loads
 207       continue;
 208     default:                    // Also check for embedded loads
 209       if( !mach->needs_anti_dependence_check() )
 210         continue;               // Not an memory op; skip it
 211       if( must_clone[static_cast<uint>(iop)] ) {
 212         // Do not move nodes which produce flags because
 213         // RA will try to clone it to place near branch and
 214         // it will cause recompilation, see clone_node().
 215         continue;
 216       }
 217       {
 218         // Check that value is used in memory address in
 219         // instructions with embedded load (CmpP val1,(val2+off)).
 220         Node* base;
 221         Node* index;
 222         const MachOper* oper = mach->memory_inputs(base, index);
 223         if (oper == NULL || oper == (MachOper*)-1) {
 224           continue;             // Not an memory op; skip it
 225         }
 226         if (val == base ||
 227             val == index && val->bottom_type()->isa_narrowoop()) {
 228           break;                // Found it
 229         } else {
 230           continue;             // Skip it
 231         }


 384     best->set_req(0, block->head());
 385 
 386   // Check for flag-killing projections that also need to be hoisted
 387   // Should be DU safe because no edge updates.
 388   for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
 389     Node* n = best->fast_out(j);
 390     if( n->is_MachProj() ) {
 391       get_block_for_node(n)->find_remove(n);
 392       block->add_inst(n);
 393       map_node_to_block(n, block);
 394     }
 395   }
 396 
 397   // proj==Op_True --> ne test; proj==Op_False --> eq test.
 398   // One of two graph shapes got matched:
 399   //   (IfTrue  (If (Bool NE (CmpP ptr NULL))))
 400   //   (IfFalse (If (Bool EQ (CmpP ptr NULL))))
 401   // NULL checks are always branch-if-eq.  If we see a IfTrue projection
 402   // then we are replacing a 'ne' test with a 'eq' NULL check test.
 403   // We need to flip the projections to keep the same semantics.
 404   if( proj->Opcode() == Opcodes::Op_IfTrue ) {
 405     // Swap order of projections in basic block to swap branch targets
 406     Node *tmp1 = block->get_node(block->end_idx()+1);
 407     Node *tmp2 = block->get_node(block->end_idx()+2);
 408     block->map_node(tmp2, block->end_idx()+1);
 409     block->map_node(tmp1, block->end_idx()+2);
 410     Node *tmp = new Node(C->top()); // Use not NULL input
 411     tmp1->replace_by(tmp);
 412     tmp2->replace_by(tmp1);
 413     tmp->replace_by(tmp2);
 414     tmp->destruct();
 415   }
 416 
 417   // Remove the existing null check; use a new implicit null check instead.
 418   // Since schedule-local needs precise def-use info, we need to correct
 419   // it as well.
 420   Node *old_tst = proj->in(0);
 421   MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
 422   block->map_node(nul_chk, block->end_idx());
 423   map_node_to_block(nul_chk, block);
 424   // Redirect users of old_test to nul_chk


 463   if (cnt == 1) {
 464     Node *n = worklist[0];
 465     worklist.map(0,worklist.pop());
 466     return n;
 467   }
 468 
 469   uint choice  = 0; // Bigger is most important
 470   uint latency = 0; // Bigger is scheduled first
 471   uint score   = 0; // Bigger is better
 472   int idx = -1;     // Index in worklist
 473   int cand_cnt = 0; // Candidate count
 474   bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
 475 
 476   for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
 477     // Order in worklist is used to break ties.
 478     // See caller for how this is used to delay scheduling
 479     // of induction variable increments to after the other
 480     // uses of the phi are scheduled.
 481     Node *n = worklist[i];      // Get Node on worklist
 482 
 483     Opcodes iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : Opcodes::Op_Node;;
 484     if( n->is_Proj() ||         // Projections always win
 485         n->Opcode()== Opcodes::Op_Con || // So does constant 'Top'
 486         iop == Opcodes::Op_CreateEx ||   // Create-exception must start block
 487         iop == Opcodes::Op_CheckCastPP
 488         ) {
 489       worklist.map(i,worklist.pop());
 490       return n;
 491     }
 492 
 493     // Final call in a block must be adjacent to 'catch'
 494     Node *e = block->end();
 495     if( e->is_Catch() && e->in(0)->in(0) == n )
 496       continue;
 497 
 498     // Memory op for an implicit null check has to be at the end of the block
 499     if( e->is_MachNullCheck() && e->in(1) == n )
 500       continue;
 501 
 502     // Schedule IV increment last.
 503     if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Opcodes::Op_CountedLoopEnd) {
 504       // Cmp might be matched into CountedLoopEnd node.
 505       Node *cmp = (e->in(1)->ideal_reg() == Opcodes::Op_RegFlags) ? e->in(1) : e;
 506       if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
 507         continue;
 508       }
 509     }
 510 
 511     uint n_choice  = 2;
 512 
 513     // See if this instruction is consumed by a branch. If so, then (as the
 514     // branch is the last instruction in the basic block) force it to the
 515     // end of the basic block
 516     if ( must_clone[static_cast<uint>(iop)] ) {
 517       // See if any use is a branch
 518       bool found_machif = false;
 519 
 520       for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 521         Node* use = n->fast_out(j);
 522 
 523         // The use is a conditional branch, make them adjacent
 524         if (use->is_MachIf() && get_block_for_node(use) == block) {
 525           found_machif = true;
 526           break;
 527         }
 528 
 529         // More than this instruction pending for successor to be ready,
 530         // don't choose this if other opportunities are ready
 531         if (ready_cnt.at(use->_idx) > 1)
 532           n_choice = 1;
 533       }
 534 
 535       // loop terminated, prefer not to use this instruction
 536       if (found_machif)
 537         continue;
 538     }
 539 
 540     // See if this has a predecessor that is "must_clone", i.e. sets the
 541     // condition code. If so, choose this first
 542     for (uint j = 0; j < n->req() ; j++) {
 543       Node *inn = n->in(j);
 544       if (inn) {
 545         if (inn->is_Mach() && must_clone[static_cast<uint>(inn->as_Mach()->ideal_Opcode())] ) {
 546           n_choice = 3;
 547           break;
 548         }
 549       }
 550     }
 551 
 552     // MachTemps should be scheduled last so they are near their uses
 553     if (n->is_MachTemp()) {
 554       n_choice = 1;
 555     }
 556 
 557     uint n_latency = get_latency_for_node(n);
 558     uint n_score = n->req();   // Many inputs get high score to break ties
 559 
 560     if (OptoRegScheduling && block_size_threshold_ok) {
 561       if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
 562         _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
 563         _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
 564         // simulate the notion that we just picked this node to schedule
 565         n->add_flag(Node::Flag_is_scheduled);


 625   PhaseLive* liveinfo = _regalloc->get_live();
 626   IndexSet* liveout = liveinfo->live(block);
 627   // first adjust the register pressure for the sources
 628   for (uint i = 1; i < n->req(); i++) {
 629     bool lrg_ends = false;
 630     Node *src_n = n->in(i);
 631     if (src_n == NULL) continue;
 632     if (!src_n->is_Mach()) continue;
 633     uint src = _regalloc->_lrg_map.find(src_n);
 634     if (src == 0) continue;
 635     LRG& lrg_src = _regalloc->lrgs(src);
 636     // detect if the live range ends or not
 637     if (liveout->member(src) == false) {
 638       lrg_ends = true;
 639       for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
 640         Node* m = src_n->fast_out(j); // Get user
 641         if (m == n) continue;
 642         if (!m->is_Mach()) continue;
 643         MachNode *mach = m->as_Mach();
 644         bool src_matches = false;
 645         Opcodes iop = mach->ideal_Opcode();
 646 
 647         switch (iop) {
 648         case Opcodes::Op_StoreB:
 649         case Opcodes::Op_StoreC:
 650         case Opcodes::Op_StoreCM:
 651         case Opcodes::Op_StoreD:
 652         case Opcodes::Op_StoreF:
 653         case Opcodes::Op_StoreI:
 654         case Opcodes::Op_StoreL:
 655         case Opcodes::Op_StoreP:
 656         case Opcodes::Op_StoreN:
 657         case Opcodes::Op_StoreVector:
 658         case Opcodes::Op_StoreNKlass:
 659           for (uint k = 1; k < m->req(); k++) {
 660             Node *in = m->in(k);
 661             if (in == src_n) {
 662               src_matches = true;
 663               break;
 664             }
 665           }
 666           break;
 667 
 668         default:
 669           src_matches = true;
 670           break;
 671         }
 672 
 673         // If we have a store as our use, ignore the non source operands
 674         if (src_matches == false) continue;
 675 
 676         // Mark every unscheduled use which is not n with a recalculation
 677         if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
 678           if (finalize_mode && !m->is_Phi()) {


 793     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 794       Node* m = n->fast_out(j); // Get user
 795       if(get_block_for_node(m) != block) {
 796         continue;
 797       }
 798       if( m->is_Phi() ) continue;
 799       int m_cnt = ready_cnt.at(m->_idx) - 1;
 800       ready_cnt.at_put(m->_idx, m_cnt);
 801       if( m_cnt == 0 )
 802         worklist.push(m);
 803     }
 804 
 805   }
 806 
 807   // Act as if the call defines the Frame Pointer.
 808   // Certainly the FP is alive and well after the call.
 809   regs.Insert(_matcher.c_frame_pointer());
 810 
 811   // Set all registers killed and not already defined by the call.
 812   uint r_cnt = mcall->tf()->range()->cnt();
 813   Opcodes op = mcall->ideal_Opcode();
 814   MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, static_cast<Opcodes>(MachProjNode::projType::fat_proj) );
 815   map_node_to_block(proj, block);
 816   block->insert_node(proj, node_cnt++);
 817 
 818   // Select the right register save policy.
 819   const char *save_policy = NULL;
 820   switch (op) {
 821     case Opcodes::Op_CallRuntime:
 822     case Opcodes::Op_CallLeaf:
 823     case Opcodes::Op_CallLeafNoFP:
 824       // Calling C code so use C calling convention
 825       save_policy = _matcher._c_reg_save_policy;
 826       break;
 827 
 828     case Opcodes::Op_CallStaticJava:
 829     case Opcodes::Op_CallDynamicJava:
 830       // Calling Java code so use Java calling convention
 831       save_policy = _matcher._register_save_policy;
 832       break;
 833 
 834     default:
 835       ShouldNotReachHere();
 836   }
 837 
 838   // When using CallRuntime mark SOE registers as killed by the call
 839   // so values that could show up in the RegisterMap aren't live in a
 840   // callee saved register since the register wouldn't know where to
 841   // find them.  CallLeaf and CallLeafNoFP are ok because they can't
 842   // have debug info on them.  Strictly speaking this only needs to be
 843   // done for oops since idealreg2debugmask takes care of debug info
 844   // references but there no way to handle oops differently than other
 845   // pointers as far as the kill mask goes.
 846   bool exclude_soe = op == Opcodes::Op_CallRuntime;
 847 
 848   // If the call is a MethodHandle invoke, we need to exclude the
 849   // register which is used to save the SP value over MH invokes from
 850   // the mask.  Otherwise this register could be used for
 851   // deoptimization information.
 852   if (op == Opcodes::Op_CallStaticJava) {
 853     MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
 854     if (mcallstaticjava->_method_handle_invoke)
 855       proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
 856   }
 857 
 858   add_call_kills(proj, regs, save_policy, exclude_soe);
 859 
 860   return node_cnt;
 861 }
 862 
 863 
 864 //------------------------------schedule_local---------------------------------
 865 // Topological sort within a block.  Someday become a real scheduler.
 866 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
 867   // Already "sorted" are the block start Node (as the first entry), and
 868   // the block-ending Node and any trailing control projections.  We leave
 869   // these alone.  PhiNodes and ParmNodes are made to follow the block start
 870   // Node.  Everything else gets topo-sorted.
 871 
 872 #ifndef PRODUCT


 910       // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
 911       block->map_node(block->get_node(phi_cnt), i);
 912       block->map_node(n, phi_cnt++);  // swap Phi/Parm up front
 913       if (OptoRegScheduling && block_size_threshold_ok) {
 914         // mark n as scheduled
 915         n->add_flag(Node::Flag_is_scheduled);
 916       }
 917     } else {                    // All others
 918       // Count block-local inputs to 'n'
 919       uint cnt = n->len();      // Input count
 920       uint local = 0;
 921       for( uint j=0; j<cnt; j++ ) {
 922         Node *m = n->in(j);
 923         if( m && get_block_for_node(m) == block && !m->is_top() )
 924           local++;              // One more block-local input
 925       }
 926       ready_cnt.at_put(n->_idx, local); // Count em up
 927 
 928 #ifdef ASSERT
 929       if( UseConcMarkSweepGC || UseG1GC ) {
 930         if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Opcodes::Op_StoreCM ) {
 931           // Check the precedence edges
 932           for (uint prec = n->req(); prec < n->len(); prec++) {
 933             Node* oop_store = n->in(prec);
 934             if (oop_store != NULL) {
 935               assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
 936             }
 937           }
 938         }
 939       }
 940 #endif
 941 
 942       // A few node types require changing a required edge to a precedence edge
 943       // before allocation.
 944       if( n->is_Mach() && n->req() > TypeFunc::Parms &&
 945           (n->as_Mach()->ideal_Opcode() == Opcodes::Op_MemBarAcquire ||
 946            n->as_Mach()->ideal_Opcode() == Opcodes::Op_MemBarVolatile) ) {
 947         // MemBarAcquire could be created without Precedent edge.
 948         // del_req() replaces the specified edge with the last input edge
 949         // and then removes the last edge. If the specified edge > number of
 950         // edges the last edge will be moved outside of the input edges array
 951         // and the edge will be lost. This is why this code should be
 952         // executed only when Precedent (== TypeFunc::Parms) edge is present.
 953         Node *x = n->in(TypeFunc::Parms);
 954         if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
 955           // Old edge to node within same block will get removed, but no precedence
 956           // edge will get added because it already exists. Update ready count.
 957           int cnt = ready_cnt.at(n->_idx);
 958           assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
 959           ready_cnt.at_put(n->_idx, cnt-1);
 960         }
 961         n->del_req(TypeFunc::Parms);
 962         n->add_prec(x);
 963       }
 964     }
 965   }
 966   for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count


 979           if (m_cnt < 0) {
 980             m->add_flag(Node::Flag_is_scheduled);
 981           }
 982         }
 983         ready_cnt.at_put(m->_idx, m_cnt);   // Fix ready count
 984       }
 985     }
 986   }
 987 
 988   Node_List delay;
 989   // Make a worklist
 990   Node_List worklist;
 991   for(uint i4=i3; i4<node_cnt; i4++ ) {    // Put ready guys on worklist
 992     Node *m = block->get_node(i4);
 993     if( !ready_cnt.at(m->_idx) ) {   // Zero ready count?
 994       if (m->is_iteratively_computed()) {
 995         // Push induction variable increments last to allow other uses
 996         // of the phi to be scheduled first. The select() method breaks
 997         // ties in scheduling by worklist order.
 998         delay.push(m);
 999       } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Opcodes::Op_CreateEx) {
1000         // Force the CreateEx to the top of the list so it's processed
1001         // first and ends up at the start of the block.
1002         worklist.insert(0, m);
1003       } else {
1004         worklist.push(m);         // Then on to worklist!
1005       }
1006     }
1007   }
1008   while (delay.size()) {
1009     Node* d = delay.pop();
1010     worklist.push(d);
1011   }
1012 
1013   if (OptoRegScheduling && block_size_threshold_ok) {
1014     // To stage register pressure calculations we need to examine the live set variables
1015     // breaking them up by register class to compartmentalize the calculations.
1016     uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
1017     _regalloc->_sched_int_pressure.init(INTPRESSURE);
1018     _regalloc->_sched_float_pressure.init(float_pressure);
1019     _regalloc->_scratch_int_pressure.init(INTPRESSURE);


1075         for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1076           Node *n = worklist[i];      // Get Node on worklist
1077           tty->print(" %d", n->_idx);
1078         }
1079         tty->cr();
1080       }
1081     }
1082 
1083 #endif
1084     if( n->is_MachCall() ) {
1085       MachCallNode *mcall = n->as_MachCall();
1086       phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1087       continue;
1088     }
1089 
1090     if (n->is_Mach() && n->as_Mach()->has_call()) {
1091       RegMask regs;
1092       regs.Insert(_matcher.c_frame_pointer());
1093       regs.OR(n->out_RegMask());
1094 
1095       MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, static_cast<Opcodes>(MachProjNode::projType::fat_proj) );
1096       map_node_to_block(proj, block);
1097       block->insert_node(proj, phi_cnt++);
1098 
1099       add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1100     }
1101 
1102     // Children are now all ready
1103     for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1104       Node* m = n->fast_out(i5); // Get user
1105       if (get_block_for_node(m) != block) {
1106         continue;
1107       }
1108       if( m->is_Phi() ) continue;
1109       if (m->_idx >= max_idx) { // new node, skip it
1110         assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1111         continue;
1112       }
1113       int m_cnt = ready_cnt.at(m->_idx) - 1;
1114       ready_cnt.at_put(m->_idx, m_cnt);
1115       if( m_cnt == 0 )


1339     block->remove_node(beg);
1340   }
1341 
1342   // If the successor blocks have a CreateEx node, move it back to the top
1343   for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
1344     Block *sb = block->_succs[i4];
1345     uint new_cnt = end - beg;
1346     // Remove any newly created, but dead, nodes.
1347     for( uint j = new_cnt; j > 0; j-- ) {
1348       Node *n = sb->get_node(j);
1349       if (n->outcnt() == 0 &&
1350           (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
1351         n->disconnect_inputs(NULL, C);
1352         sb->remove_node(j);
1353         new_cnt--;
1354       }
1355     }
1356     // If any newly created nodes remain, move the CreateEx node to the top
1357     if (new_cnt > 0) {
1358       Node *cex = sb->get_node(1+new_cnt);
1359       if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Opcodes::Op_CreateEx ) {
1360         sb->remove_node(1+new_cnt);
1361         sb->insert_node(cex, 1);
1362       }
1363     }
1364   }
1365 }
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