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src/share/vm/opto/output.cpp

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  88       _cfg->insert( broot, 0, new MachUEPNode() );
  89     }
  90 
  91   }
  92 
  93   // Break before main entry point
  94   if ((_method && C->directive()->BreakAtExecuteOption) ||
  95       (OptoBreakpoint && is_method_compilation())       ||
  96       (OptoBreakpointOSR && is_osr_compilation())       ||
  97       (OptoBreakpointC2R && !_method)                   ) {
  98     // checking for _method means that OptoBreakpoint does not apply to
  99     // runtime stubs or frame converters
 100     _cfg->insert( entry, 1, new MachBreakpointNode() );
 101   }
 102 
 103   // Insert epilogs before every return
 104   for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
 105     Block* block = _cfg->get_block(i);
 106     if (!block->is_connector() && block->non_connector_successor(0) == _cfg->get_root_block()) { // Found a program exit point?
 107       Node* m = block->end();
 108       if (m->is_Mach() && m->as_Mach()->ideal_Opcode() != Op_Halt) {
 109         MachEpilogNode* epilog = new MachEpilogNode(m->as_Mach()->ideal_Opcode() == Op_Return);
 110         block->add_inst(epilog);
 111         _cfg->map_node_to_block(epilog, block);
 112       }
 113     }
 114   }
 115 
 116   uint* blk_starts = NEW_RESOURCE_ARRAY(uint, _cfg->number_of_blocks() + 1);
 117   blk_starts[0] = 0;
 118 
 119   // Initialize code buffer and process short branches.
 120   CodeBuffer* cb = init_buffer(blk_starts);
 121 
 122   if (cb == NULL || failing()) {
 123     return;
 124   }
 125 
 126   ScheduleAndBundle();
 127 
 128 #ifndef PRODUCT
 129   if (trace_opto_output()) {


 364   }
 365 
 366   // Step two, replace eligible long jumps.
 367   bool progress = true;
 368   uint last_may_be_short_branch_adr = max_juint;
 369   while (has_short_branch_candidate && progress) {
 370     progress = false;
 371     has_short_branch_candidate = false;
 372     int adjust_block_start = 0;
 373     for (uint i = 0; i < nblocks; i++) {
 374       Block* block = _cfg->get_block(i);
 375       int idx = jmp_nidx[i];
 376       MachNode* mach = (idx == -1) ? NULL: block->get_node(idx)->as_Mach();
 377       if (mach != NULL && mach->may_be_short_branch()) {
 378 #ifdef ASSERT
 379         assert(jmp_size[i] > 0 && mach->is_MachBranch(), "sanity");
 380         int j;
 381         // Find the branch; ignore trailing NOPs.
 382         for (j = block->number_of_nodes()-1; j>=0; j--) {
 383           Node* n = block->get_node(j);
 384           if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con)
 385             break;
 386         }
 387         assert(j >= 0 && j == idx && block->get_node(j) == (Node*)mach, "sanity");
 388 #endif
 389         int br_size = jmp_size[i];
 390         int br_offs = blk_starts[i] + jmp_offset[i];
 391 
 392         // This requires the TRUE branch target be in succs[0]
 393         uint bnum = block->non_connector_successor(0)->_pre_order;
 394         int offset = blk_starts[bnum] - br_offs;
 395         if (bnum > i) { // adjust following block's offset
 396           offset -= adjust_block_start;
 397         }
 398 
 399         // This block can be a loop header, account for the padding
 400         // in the previous block.
 401         int block_padding = block_worst_case_pad[i];
 402         assert(i == 0 || block_padding == 0 || br_offs >= block_padding, "Should have at least a padding on top");
 403         // In the following code a nop could be inserted before
 404         // the branch which will increase the backward distance.


1296                 block->insert_node(nop, j++);
1297                 _cfg->map_node_to_block(nop, block);
1298                 last_inst++;
1299                 nop->emit(*cb, _regalloc);
1300                 cb->flush_bundle(true);
1301                 current_offset = cb->insts_size();
1302               }
1303 #ifdef ASSERT
1304               jmp_target[i] = block_num;
1305               jmp_offset[i] = current_offset - blk_offset;
1306               jmp_size[i]   = new_size;
1307               jmp_rule[i]   = mach->rule();
1308 #endif
1309               block->map_node(replacement, j);
1310               mach->subsume_by(replacement, C);
1311               n    = replacement;
1312               mach = replacement;
1313             }
1314           }
1315           mach->as_MachBranch()->label_set( &blk_labels[block_num], block_num );
1316         } else if (mach->ideal_Opcode() == Op_Jump) {
1317           for (uint h = 0; h < block->_num_succs; h++) {
1318             Block* succs_block = block->_succs[h];
1319             for (uint j = 1; j < succs_block->num_preds(); j++) {
1320               Node* jpn = succs_block->pred(j);
1321               if (jpn->is_JumpProj() && jpn->in(0) == mach) {
1322                 uint block_num = succs_block->non_connector()->_pre_order;
1323                 Label *blkLabel = &blk_labels[block_num];
1324                 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
1325               }
1326             }
1327           }
1328         }
1329 #ifdef ASSERT
1330         // Check that oop-store precedes the card-mark
1331         else if (mach->ideal_Opcode() == Op_StoreCM) {
1332           uint storeCM_idx = j;
1333           int count = 0;
1334           for (uint prec = mach->req(); prec < mach->len(); prec++) {
1335             Node *oop_store = mach->in(prec);  // Precedence edge
1336             if (oop_store == NULL) continue;
1337             count++;
1338             uint i4;
1339             for (i4 = 0; i4 < last_inst; ++i4) {
1340               if (block->get_node(i4) == oop_store) {
1341                 break;
1342               }
1343             }
1344             // Note: This test can provide a false failure if other precedence
1345             // edges have been added to the storeCMNode.
1346             assert(i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
1347           }
1348           assert(count > 0, "storeCM expects at least one precedence edge");
1349         }
1350 #endif
1351         else if (!n->is_Proj()) {


1555         xtty->tail("opto_assembly");
1556       }
1557     }
1558   }
1559 #endif
1560 
1561 }
1562 
1563 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
1564   _inc_table.set_size(cnt);
1565 
1566   uint inct_cnt = 0;
1567   for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
1568     Block* block = _cfg->get_block(i);
1569     Node *n = NULL;
1570     int j;
1571 
1572     // Find the branch; ignore trailing NOPs.
1573     for (j = block->number_of_nodes() - 1; j >= 0; j--) {
1574       n = block->get_node(j);
1575       if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Op_Con) {
1576         break;
1577       }
1578     }
1579 
1580     // If we didn't find anything, continue
1581     if (j < 0) {
1582       continue;
1583     }
1584 
1585     // Compute ExceptionHandlerTable subtable entry and add it
1586     // (skip empty blocks)
1587     if (n->is_Catch()) {
1588 
1589       // Get the offset of the return from the call
1590       uint call_return = call_returns[block->_pre_order];
1591 #ifdef ASSERT
1592       assert( call_return > 0, "no call seen for this basic block" );
1593       while (block->get_node(--j)->is_MachProj()) ;
1594       assert(block->get_node(j)->is_MachCall(), "CatchProj must follow call");
1595 #endif


1950 
1951 void Scheduling::AddNodeToAvailableList(Node *n) {
1952   assert( !n->is_Proj(), "projections never directly made available" );
1953 #ifndef PRODUCT
1954   if (_cfg->C->trace_opto_output()) {
1955     tty->print("#   AddNodeToAvailableList: ");
1956     n->dump();
1957   }
1958 #endif
1959 
1960   int latency = _current_latency[n->_idx];
1961 
1962   // Insert in latency order (insertion sort)
1963   uint i;
1964   for ( i=0; i < _available.size(); i++ )
1965     if (_current_latency[_available[i]->_idx] > latency)
1966       break;
1967 
1968   // Special Check for compares following branches
1969   if( n->is_Mach() && _scheduled.size() > 0 ) {
1970     int op = n->as_Mach()->ideal_Opcode();
1971     Node *last = _scheduled[0];
1972     if( last->is_MachIf() && last->in(1) == n &&
1973         ( op == Op_CmpI ||
1974           op == Op_CmpU ||
1975           op == Op_CmpP ||
1976           op == Op_CmpF ||
1977           op == Op_CmpD ||
1978           op == Op_CmpL ) ) {
1979 
1980       // Recalculate position, moving to front of same latency
1981       for ( i=0 ; i < _available.size(); i++ )
1982         if (_current_latency[_available[i]->_idx] >= latency)
1983           break;
1984     }
1985   }
1986 
1987   // Insert the node in the available list
1988   _available.insert(i, n);
1989 
1990 #ifndef PRODUCT
1991   if (_cfg->C->trace_opto_output())
1992     dump_available();
1993 #endif
1994 }
1995 
1996 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
1997   for ( uint i=0; i < n->len(); i++ ) {
1998     Node *def = n->in(i);


2183 
2184     // Set the node's latency
2185     _current_latency[n->_idx] = _bundle_cycle_number;
2186 
2187     // Now merge the functional unit information
2188     if (instruction_count > 0 || !node_pipeline->mayHaveNoCode())
2189       _bundle_use.add_usage(node_usage);
2190 
2191     // Increment the number of instructions in this bundle
2192     _bundle_instr_count += instruction_count;
2193 
2194     // Remember this node for later
2195     if (n->is_Mach())
2196       _next_node = n;
2197   }
2198 
2199   // It's possible to have a BoxLock in the graph and in the _bbs mapping but
2200   // not in the bb->_nodes array.  This happens for debug-info-only BoxLocks.
2201   // 'Schedule' them (basically ignore in the schedule) but do not insert them
2202   // into the block.  All other scheduled nodes get put in the schedule here.
2203   int op = n->Opcode();
2204   if( (op == Op_Node && n->req() == 0) || // anti-dependence node OR
2205       (op != Op_Node &&         // Not an unused antidepedence node and
2206        // not an unallocated boxlock
2207        (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Op_BoxLock)) ) {
2208 
2209     // Push any trailing projections
2210     if( bb->get_node(bb->number_of_nodes()-1) != n ) {
2211       for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2212         Node *foi = n->fast_out(i);
2213         if( foi->is_Proj() )
2214           _scheduled.push(foi);
2215       }
2216     }
2217 
2218     // Put the instruction in the schedule list
2219     _scheduled.push(n);
2220   }
2221 
2222 #ifndef PRODUCT
2223   if (_cfg->C->trace_opto_output())
2224     dump_available();
2225 #endif
2226 
2227   // Walk all the definitions, decrementing use counts, and


2338     // this one, then reset the pipeline information
2339     if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) {
2340 #ifndef PRODUCT
2341       if (_cfg->C->trace_opto_output()) {
2342         tty->print("*** bundle start of next BB, node %d, for %d instructions\n",
2343                    _next_node->_idx, _bundle_instr_count);
2344       }
2345 #endif
2346       step_and_clear();
2347     }
2348 
2349     // Leave untouched the starting instruction, any Phis, a CreateEx node
2350     // or Top.  bb->get_node(_bb_start) is the first schedulable instruction.
2351     _bb_end = bb->number_of_nodes()-1;
2352     for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
2353       Node *n = bb->get_node(_bb_start);
2354       // Things not matched, like Phinodes and ProjNodes don't get scheduled.
2355       // Also, MachIdealNodes do not get scheduled
2356       if( !n->is_Mach() ) continue;     // Skip non-machine nodes
2357       MachNode *mach = n->as_Mach();
2358       int iop = mach->ideal_Opcode();
2359       if( iop == Op_CreateEx ) continue; // CreateEx is pinned
2360       if( iop == Op_Con ) continue;      // Do not schedule Top
2361       if( iop == Op_Node &&     // Do not schedule PhiNodes, ProjNodes
2362           mach->pipeline() == MachNode::pipeline_class() &&
2363           !n->is_SpillCopy() && !n->is_MachMerge() )  // Breakpoints, Prolog, etc
2364         continue;
2365       break;                    // Funny loop structure to be sure...
2366     }
2367     // Compute last "interesting" instruction in block - last instruction we
2368     // might schedule.  _bb_end points just after last schedulable inst.  We
2369     // normally schedule conditional branches (despite them being forced last
2370     // in the block), because they have delay slots we can fill.  Calls all
2371     // have their delay slots filled in the template expansions, so we don't
2372     // bother scheduling them.
2373     Node *last = bb->get_node(_bb_end);
2374     // Ignore trailing NOPs.
2375     while (_bb_end > 0 && last->is_Mach() &&
2376            last->as_Mach()->ideal_Opcode() == Op_Con) {
2377       last = bb->get_node(--_bb_end);
2378     }
2379     assert(!last->is_Mach() || last->as_Mach()->ideal_Opcode() != Op_Con, "");
2380     if( last->is_Catch() ||
2381        // Exclude unreachable path case when Halt node is in a separate block.
2382        (_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Op_Halt) ) {
2383       // There must be a prior call.  Skip it.
2384       while( !bb->get_node(--_bb_end)->is_MachCall() ) {
2385         assert( bb->get_node(_bb_end)->is_MachProj(), "skipping projections after expected call" );
2386       }
2387     } else if( last->is_MachNullCheck() ) {
2388       // Backup so the last null-checked memory instruction is
2389       // outside the schedulable range. Skip over the nullcheck,
2390       // projection, and the memory nodes.
2391       Node *mem = last->in(1);
2392       do {
2393         _bb_end--;
2394       } while (mem != bb->get_node(_bb_end));
2395     } else {
2396       // Set _bb_end to point after last schedulable inst.
2397       _bb_end++;
2398     }
2399 
2400     assert( _bb_start <= _bb_end, "inverted block ends" );
2401 
2402     // Compute the register antidependencies for the basic block


2485       tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2486       n->dump();
2487       tty->print_cr("...");
2488       prior_use->dump();
2489       assert(edge_from_to(prior_use,n), "%s", msg);
2490     }
2491     _reg_node.map(def,NULL); // Kill live USEs
2492   }
2493 }
2494 
2495 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2496 
2497   // Zap to something reasonable for the verify code
2498   _reg_node.clear();
2499 
2500   // Walk over the block backwards.  Check to make sure each DEF doesn't
2501   // kill a live value (other than the one it's supposed to).  Add each
2502   // USE to the live set.
2503   for( uint i = b->number_of_nodes()-1; i >= _bb_start; i-- ) {
2504     Node *n = b->get_node(i);
2505     int n_op = n->Opcode();
2506     if( n_op == Op_MachProj && n->ideal_reg() == MachProjNode::fat_proj ) {
2507       // Fat-proj kills a slew of registers
2508       RegMask rm = n->out_RegMask();// Make local copy
2509       while( rm.is_NotEmpty() ) {
2510         OptoReg::Name kill = rm.find_first_elem();
2511         rm.Remove(kill);
2512         verify_do_def( n, kill, msg );
2513       }
2514     } else if( n_op != Op_Node ) { // Avoid brand new antidependence nodes
2515       // Get DEF'd registers the normal way
2516       verify_do_def( n, _regalloc->get_reg_first(n), msg );
2517       verify_do_def( n, _regalloc->get_reg_second(n), msg );
2518     }
2519 
2520     // Now make all USEs live
2521     for( uint i=1; i<n->req(); i++ ) {
2522       Node *def = n->in(i);
2523       assert(def != 0, "input edge required");
2524       OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2525       OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2526       if( OptoReg::is_valid(reg_lo) ) {
2527         assert(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), "%s", msg);
2528         _reg_node.map(reg_lo,n);
2529       }
2530       if( OptoReg::is_valid(reg_hi) ) {
2531         assert(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), "%s", msg);
2532         _reg_node.map(reg_hi,n);
2533       }
2534     }


2554 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
2555   if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
2556     return;
2557 
2558   Node *pinch = _reg_node[def_reg]; // Get pinch point
2559   if ((pinch == NULL) || _cfg->get_block_for_node(pinch) != b || // No pinch-point yet?
2560       is_def ) {    // Check for a true def (not a kill)
2561     _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
2562     return;
2563   }
2564 
2565   Node *kill = def;             // Rename 'def' to more descriptive 'kill'
2566   debug_only( def = (Node*)0xdeadbeef; )
2567 
2568   // After some number of kills there _may_ be a later def
2569   Node *later_def = NULL;
2570 
2571   // Finding a kill requires a real pinch-point.
2572   // Check for not already having a pinch-point.
2573   // Pinch points are Op_Node's.
2574   if( pinch->Opcode() != Op_Node ) { // Or later-def/kill as pinch-point?
2575     later_def = pinch;            // Must be def/kill as optimistic pinch-point
2576     if ( _pinch_free_list.size() > 0) {
2577       pinch = _pinch_free_list.pop();
2578     } else {
2579       pinch = new Node(1); // Pinch point to-be
2580     }
2581     if (pinch->_idx >= _regalloc->node_regs_max_index()) {
2582       _cfg->C->record_method_not_compilable("too many D-U pinch points");
2583       return;
2584     }
2585     _cfg->map_node_to_block(pinch, b);      // Pretend it's valid in this block (lazy init)
2586     _reg_node.map(def_reg,pinch); // Record pinch-point
2587     //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
2588     if( later_def->outcnt() == 0 || later_def->ideal_reg() == MachProjNode::fat_proj ) { // Distinguish def from kill
2589       pinch->init_req(0, _cfg->C->top());     // set not NULL for the next call
2590       add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
2591       later_def = NULL;           // and no later def
2592     }
2593     pinch->set_req(0,later_def);  // Hook later def so we can find it
2594   } else {                        // Else have valid pinch point
2595     if( pinch->in(0) )            // If there is a later-def
2596       later_def = pinch->in(0);   // Get it
2597   }
2598 
2599   // Add output-dependence edge from later def to kill
2600   if( later_def )               // If there is some original def
2601     add_prec_edge_from_to(later_def,kill); // Add edge from def to kill
2602 
2603   // See if current kill is also a use, and so is forced to be the pinch-point.
2604   if( pinch->Opcode() == Op_Node ) {
2605     Node *uses = kill->is_Proj() ? kill->in(0) : kill;
2606     for( uint i=1; i<uses->req(); i++ ) {
2607       if( _regalloc->get_reg_first(uses->in(i)) == def_reg ||
2608           _regalloc->get_reg_second(uses->in(i)) == def_reg ) {
2609         // Yes, found a use/kill pinch-point
2610         pinch->set_req(0,NULL);  //
2611         pinch->replace_by(kill); // Move anti-dep edges up
2612         pinch = kill;
2613         _reg_node.map(def_reg,pinch);
2614         return;
2615       }
2616     }
2617   }
2618 
2619   // Add edge from kill to pinch-point
2620   add_prec_edge_from_to(kill,pinch);
2621 }
2622 
2623 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
2624   if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
2625     return;
2626   Node *pinch = _reg_node[use_reg]; // Get pinch point
2627   // Check for no later def_reg/kill in block
2628   if ((pinch != NULL) && _cfg->get_block_for_node(pinch) == b &&
2629       // Use has to be block-local as well
2630       _cfg->get_block_for_node(use) == b) {
2631     if( pinch->Opcode() == Op_Node && // Real pinch-point (not optimistic?)
2632         pinch->req() == 1 ) {   // pinch not yet in block?
2633       pinch->del_req(0);        // yank pointer to later-def, also set flag
2634       // Insert the pinch-point in the block just after the last use
2635       b->insert_node(pinch, b->find_node(use) + 1);
2636       _bb_end++;                // Increase size scheduled region in block
2637     }
2638 
2639     add_prec_edge_from_to(pinch,use);
2640   }
2641 }
2642 
2643 // We insert antidependences between the reads and following write of
2644 // allocated registers to prevent illegal code motion. Hopefully, the
2645 // number of added references should be fairly small, especially as we
2646 // are only adding references within the current basic block.
2647 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
2648 
2649 #ifdef ASSERT
2650   verify_good_schedule(b,"before block local scheduling");
2651 #endif


2672   // We put edges from the prior and current DEF/KILLs to the pinch point.
2673   // We put the pinch point in _reg_node.  If there's already a pinch point
2674   // we merely add an edge from the current DEF/KILL to the pinch point.
2675 
2676   // After doing the DEF/KILLs, we handle USEs.  For each used register, we
2677   // put an edge from the pinch point to the USE.
2678 
2679   // To be expedient, the _reg_node array is pre-allocated for the whole
2680   // compilation.  _reg_node is lazily initialized; it either contains a NULL,
2681   // or a valid def/kill/pinch-point, or a leftover node from some prior
2682   // block.  Leftover node from some prior block is treated like a NULL (no
2683   // prior def, so no anti-dependence needed).  Valid def is distinguished by
2684   // it being in the current block.
2685   bool fat_proj_seen = false;
2686   uint last_safept = _bb_end-1;
2687   Node* end_node         = (_bb_end-1 >= _bb_start) ? b->get_node(last_safept) : NULL;
2688   Node* last_safept_node = end_node;
2689   for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
2690     Node *n = b->get_node(i);
2691     int is_def = n->outcnt();   // def if some uses prior to adding precedence edges
2692     if( n->is_MachProj() && n->ideal_reg() == MachProjNode::fat_proj ) {
2693       // Fat-proj kills a slew of registers
2694       // This can add edges to 'n' and obscure whether or not it was a def,
2695       // hence the is_def flag.
2696       fat_proj_seen = true;
2697       RegMask rm = n->out_RegMask();// Make local copy
2698       while( rm.is_NotEmpty() ) {
2699         OptoReg::Name kill = rm.find_first_elem();
2700         rm.Remove(kill);
2701         anti_do_def( b, n, kill, is_def );
2702       }
2703     } else {
2704       // Get DEF'd registers the normal way
2705       anti_do_def( b, n, _regalloc->get_reg_first(n), is_def );
2706       anti_do_def( b, n, _regalloc->get_reg_second(n), is_def );
2707     }
2708 
2709     // Kill projections on a branch should appear to occur on the
2710     // branch, not afterwards, so grab the masks from the projections
2711     // and process them.
2712     if (n->is_MachBranch() || n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_Jump) {
2713       for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2714         Node* use = n->fast_out(i);
2715         if (use->is_Proj()) {
2716           RegMask rm = use->out_RegMask();// Make local copy
2717           while( rm.is_NotEmpty() ) {
2718             OptoReg::Name kill = rm.find_first_elem();
2719             rm.Remove(kill);
2720             anti_do_def( b, n, kill, false );
2721           }
2722         }
2723       }
2724     }
2725 
2726     // Check each register used by this instruction for a following DEF/KILL
2727     // that must occur afterward and requires an anti-dependence edge.
2728     for( uint j=0; j<n->req(); j++ ) {
2729       Node *def = n->in(j);
2730       if( def ) {
2731         assert( !def->is_MachProj() || def->ideal_reg() != MachProjNode::fat_proj, "" );
2732         anti_do_use( b, n, _regalloc->get_reg_first(def) );
2733         anti_do_use( b, n, _regalloc->get_reg_second(def) );
2734       }
2735     }
2736     // Do not allow defs of new derived values to float above GC
2737     // points unless the base is definitely available at the GC point.
2738 
2739     Node *m = b->get_node(i);
2740 
2741     // Add precedence edge from following safepoint to use of derived pointer
2742     if( last_safept_node != end_node &&
2743         m != last_safept_node) {
2744       for (uint k = 1; k < m->req(); k++) {
2745         const Type *t = m->in(k)->bottom_type();
2746         if( t->isa_oop_ptr() &&
2747             t->is_ptr()->offset() != 0 ) {
2748           last_safept_node->add_prec( m );
2749           break;
2750         }
2751       }
2752     }
2753 
2754     if( n->jvms() ) {           // Precedence edge from derived to safept
2755       // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
2756       if( b->get_node(last_safept) != last_safept_node ) {
2757         last_safept = b->find_node(last_safept_node);
2758       }
2759       for( uint j=last_safept; j > i; j-- ) {
2760         Node *mach = b->get_node(j);
2761         if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Op_AddP )
2762           mach->add_prec( n );
2763       }
2764       last_safept = i;
2765       last_safept_node = m;
2766     }
2767   }
2768 
2769   if (fat_proj_seen) {
2770     // Garbage collect pinch nodes that were not consumed.
2771     // They are usually created by a fat kill MachProj for a call.
2772     garbage_collect_pinch_nodes();
2773   }
2774 }
2775 
2776 // Garbage collect pinch nodes for reuse by other blocks.
2777 //
2778 // The block scheduler's insertion of anti-dependence
2779 // edges creates many pinch nodes when the block contains
2780 // 2 or more Calls.  A pinch node is used to prevent a
2781 // combinatorial explosion of edges.  If a set of kills for a


2787 //                \   |   /
2788 //                 \  |  /
2789 //                  pinch
2790 //                 /  |  \
2791 //                /   |   \
2792 //            kill1 kill2 kill3
2793 //
2794 // One pinch node is created per register killed when
2795 // the second call is encountered during a backwards pass
2796 // over the block.  Most of these pinch nodes are never
2797 // wired into the graph because the register is never
2798 // used or def'ed in the block.
2799 //
2800 void Scheduling::garbage_collect_pinch_nodes() {
2801 #ifndef PRODUCT
2802     if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
2803 #endif
2804     int trace_cnt = 0;
2805     for (uint k = 0; k < _reg_node.Size(); k++) {
2806       Node* pinch = _reg_node[k];
2807       if ((pinch != NULL) && pinch->Opcode() == Op_Node &&
2808           // no predecence input edges
2809           (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
2810         cleanup_pinch(pinch);
2811         _pinch_free_list.push(pinch);
2812         _reg_node.map(k, NULL);
2813 #ifndef PRODUCT
2814         if (_cfg->C->trace_opto_output()) {
2815           trace_cnt++;
2816           if (trace_cnt > 40) {
2817             tty->print("\n");
2818             trace_cnt = 0;
2819           }
2820           tty->print(" %d", pinch->_idx);
2821         }
2822 #endif
2823       }
2824     }
2825 #ifndef PRODUCT
2826     if (_cfg->C->trace_opto_output()) tty->print("\n");
2827 #endif
2828 }
2829 
2830 // Clean up a pinch node for reuse.
2831 void Scheduling::cleanup_pinch( Node *pinch ) {
2832   assert (pinch && pinch->Opcode() == Op_Node && pinch->req() == 1, "just checking");
2833 
2834   for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) {
2835     Node* use = pinch->last_out(i);
2836     uint uses_found = 0;
2837     for (uint j = use->req(); j < use->len(); j++) {
2838       if (use->in(j) == pinch) {
2839         use->rm_prec(j);
2840         uses_found++;
2841       }
2842     }
2843     assert(uses_found > 0, "must be a precedence edge");
2844     i -= uses_found;    // we deleted 1 or more copies of this edge
2845   }
2846   // May have a later_def entry
2847   pinch->set_req(0, NULL);
2848 }
2849 
2850 #ifndef PRODUCT
2851 
2852 void Scheduling::dump_available() const {




  88       _cfg->insert( broot, 0, new MachUEPNode() );
  89     }
  90 
  91   }
  92 
  93   // Break before main entry point
  94   if ((_method && C->directive()->BreakAtExecuteOption) ||
  95       (OptoBreakpoint && is_method_compilation())       ||
  96       (OptoBreakpointOSR && is_osr_compilation())       ||
  97       (OptoBreakpointC2R && !_method)                   ) {
  98     // checking for _method means that OptoBreakpoint does not apply to
  99     // runtime stubs or frame converters
 100     _cfg->insert( entry, 1, new MachBreakpointNode() );
 101   }
 102 
 103   // Insert epilogs before every return
 104   for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
 105     Block* block = _cfg->get_block(i);
 106     if (!block->is_connector() && block->non_connector_successor(0) == _cfg->get_root_block()) { // Found a program exit point?
 107       Node* m = block->end();
 108       if (m->is_Mach() && m->as_Mach()->ideal_Opcode() != Opcodes::Op_Halt) {
 109         MachEpilogNode* epilog = new MachEpilogNode(m->as_Mach()->ideal_Opcode() == Opcodes::Op_Return);
 110         block->add_inst(epilog);
 111         _cfg->map_node_to_block(epilog, block);
 112       }
 113     }
 114   }
 115 
 116   uint* blk_starts = NEW_RESOURCE_ARRAY(uint, _cfg->number_of_blocks() + 1);
 117   blk_starts[0] = 0;
 118 
 119   // Initialize code buffer and process short branches.
 120   CodeBuffer* cb = init_buffer(blk_starts);
 121 
 122   if (cb == NULL || failing()) {
 123     return;
 124   }
 125 
 126   ScheduleAndBundle();
 127 
 128 #ifndef PRODUCT
 129   if (trace_opto_output()) {


 364   }
 365 
 366   // Step two, replace eligible long jumps.
 367   bool progress = true;
 368   uint last_may_be_short_branch_adr = max_juint;
 369   while (has_short_branch_candidate && progress) {
 370     progress = false;
 371     has_short_branch_candidate = false;
 372     int adjust_block_start = 0;
 373     for (uint i = 0; i < nblocks; i++) {
 374       Block* block = _cfg->get_block(i);
 375       int idx = jmp_nidx[i];
 376       MachNode* mach = (idx == -1) ? NULL: block->get_node(idx)->as_Mach();
 377       if (mach != NULL && mach->may_be_short_branch()) {
 378 #ifdef ASSERT
 379         assert(jmp_size[i] > 0 && mach->is_MachBranch(), "sanity");
 380         int j;
 381         // Find the branch; ignore trailing NOPs.
 382         for (j = block->number_of_nodes()-1; j>=0; j--) {
 383           Node* n = block->get_node(j);
 384           if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Opcodes::Op_Con)
 385             break;
 386         }
 387         assert(j >= 0 && j == idx && block->get_node(j) == (Node*)mach, "sanity");
 388 #endif
 389         int br_size = jmp_size[i];
 390         int br_offs = blk_starts[i] + jmp_offset[i];
 391 
 392         // This requires the TRUE branch target be in succs[0]
 393         uint bnum = block->non_connector_successor(0)->_pre_order;
 394         int offset = blk_starts[bnum] - br_offs;
 395         if (bnum > i) { // adjust following block's offset
 396           offset -= adjust_block_start;
 397         }
 398 
 399         // This block can be a loop header, account for the padding
 400         // in the previous block.
 401         int block_padding = block_worst_case_pad[i];
 402         assert(i == 0 || block_padding == 0 || br_offs >= block_padding, "Should have at least a padding on top");
 403         // In the following code a nop could be inserted before
 404         // the branch which will increase the backward distance.


1296                 block->insert_node(nop, j++);
1297                 _cfg->map_node_to_block(nop, block);
1298                 last_inst++;
1299                 nop->emit(*cb, _regalloc);
1300                 cb->flush_bundle(true);
1301                 current_offset = cb->insts_size();
1302               }
1303 #ifdef ASSERT
1304               jmp_target[i] = block_num;
1305               jmp_offset[i] = current_offset - blk_offset;
1306               jmp_size[i]   = new_size;
1307               jmp_rule[i]   = mach->rule();
1308 #endif
1309               block->map_node(replacement, j);
1310               mach->subsume_by(replacement, C);
1311               n    = replacement;
1312               mach = replacement;
1313             }
1314           }
1315           mach->as_MachBranch()->label_set( &blk_labels[block_num], block_num );
1316         } else if (mach->ideal_Opcode() == Opcodes::Op_Jump) {
1317           for (uint h = 0; h < block->_num_succs; h++) {
1318             Block* succs_block = block->_succs[h];
1319             for (uint j = 1; j < succs_block->num_preds(); j++) {
1320               Node* jpn = succs_block->pred(j);
1321               if (jpn->is_JumpProj() && jpn->in(0) == mach) {
1322                 uint block_num = succs_block->non_connector()->_pre_order;
1323                 Label *blkLabel = &blk_labels[block_num];
1324                 mach->add_case_label(jpn->as_JumpProj()->proj_no(), blkLabel);
1325               }
1326             }
1327           }
1328         }
1329 #ifdef ASSERT
1330         // Check that oop-store precedes the card-mark
1331         else if (mach->ideal_Opcode() == Opcodes::Op_StoreCM) {
1332           uint storeCM_idx = j;
1333           int count = 0;
1334           for (uint prec = mach->req(); prec < mach->len(); prec++) {
1335             Node *oop_store = mach->in(prec);  // Precedence edge
1336             if (oop_store == NULL) continue;
1337             count++;
1338             uint i4;
1339             for (i4 = 0; i4 < last_inst; ++i4) {
1340               if (block->get_node(i4) == oop_store) {
1341                 break;
1342               }
1343             }
1344             // Note: This test can provide a false failure if other precedence
1345             // edges have been added to the storeCMNode.
1346             assert(i4 == last_inst || i4 < storeCM_idx, "CM card-mark executes before oop-store");
1347           }
1348           assert(count > 0, "storeCM expects at least one precedence edge");
1349         }
1350 #endif
1351         else if (!n->is_Proj()) {


1555         xtty->tail("opto_assembly");
1556       }
1557     }
1558   }
1559 #endif
1560 
1561 }
1562 
1563 void Compile::FillExceptionTables(uint cnt, uint *call_returns, uint *inct_starts, Label *blk_labels) {
1564   _inc_table.set_size(cnt);
1565 
1566   uint inct_cnt = 0;
1567   for (uint i = 0; i < _cfg->number_of_blocks(); i++) {
1568     Block* block = _cfg->get_block(i);
1569     Node *n = NULL;
1570     int j;
1571 
1572     // Find the branch; ignore trailing NOPs.
1573     for (j = block->number_of_nodes() - 1; j >= 0; j--) {
1574       n = block->get_node(j);
1575       if (!n->is_Mach() || n->as_Mach()->ideal_Opcode() != Opcodes::Op_Con) {
1576         break;
1577       }
1578     }
1579 
1580     // If we didn't find anything, continue
1581     if (j < 0) {
1582       continue;
1583     }
1584 
1585     // Compute ExceptionHandlerTable subtable entry and add it
1586     // (skip empty blocks)
1587     if (n->is_Catch()) {
1588 
1589       // Get the offset of the return from the call
1590       uint call_return = call_returns[block->_pre_order];
1591 #ifdef ASSERT
1592       assert( call_return > 0, "no call seen for this basic block" );
1593       while (block->get_node(--j)->is_MachProj()) ;
1594       assert(block->get_node(j)->is_MachCall(), "CatchProj must follow call");
1595 #endif


1950 
1951 void Scheduling::AddNodeToAvailableList(Node *n) {
1952   assert( !n->is_Proj(), "projections never directly made available" );
1953 #ifndef PRODUCT
1954   if (_cfg->C->trace_opto_output()) {
1955     tty->print("#   AddNodeToAvailableList: ");
1956     n->dump();
1957   }
1958 #endif
1959 
1960   int latency = _current_latency[n->_idx];
1961 
1962   // Insert in latency order (insertion sort)
1963   uint i;
1964   for ( i=0; i < _available.size(); i++ )
1965     if (_current_latency[_available[i]->_idx] > latency)
1966       break;
1967 
1968   // Special Check for compares following branches
1969   if( n->is_Mach() && _scheduled.size() > 0 ) {
1970     Opcodes op = n->as_Mach()->ideal_Opcode();
1971     Node *last = _scheduled[0];
1972     if( last->is_MachIf() && last->in(1) == n &&
1973         ( op == Opcodes::Op_CmpI ||
1974           op == Opcodes::Op_CmpU ||
1975           op == Opcodes::Op_CmpP ||
1976           op == Opcodes::Op_CmpF ||
1977           op == Opcodes::Op_CmpD ||
1978           op == Opcodes::Op_CmpL ) ) {
1979 
1980       // Recalculate position, moving to front of same latency
1981       for ( i=0 ; i < _available.size(); i++ )
1982         if (_current_latency[_available[i]->_idx] >= latency)
1983           break;
1984     }
1985   }
1986 
1987   // Insert the node in the available list
1988   _available.insert(i, n);
1989 
1990 #ifndef PRODUCT
1991   if (_cfg->C->trace_opto_output())
1992     dump_available();
1993 #endif
1994 }
1995 
1996 void Scheduling::DecrementUseCounts(Node *n, const Block *bb) {
1997   for ( uint i=0; i < n->len(); i++ ) {
1998     Node *def = n->in(i);


2183 
2184     // Set the node's latency
2185     _current_latency[n->_idx] = _bundle_cycle_number;
2186 
2187     // Now merge the functional unit information
2188     if (instruction_count > 0 || !node_pipeline->mayHaveNoCode())
2189       _bundle_use.add_usage(node_usage);
2190 
2191     // Increment the number of instructions in this bundle
2192     _bundle_instr_count += instruction_count;
2193 
2194     // Remember this node for later
2195     if (n->is_Mach())
2196       _next_node = n;
2197   }
2198 
2199   // It's possible to have a BoxLock in the graph and in the _bbs mapping but
2200   // not in the bb->_nodes array.  This happens for debug-info-only BoxLocks.
2201   // 'Schedule' them (basically ignore in the schedule) but do not insert them
2202   // into the block.  All other scheduled nodes get put in the schedule here.
2203   Opcodes op = n->Opcode();
2204   if( (op == Opcodes::Op_Node && n->req() == 0) || // anti-dependence node OR
2205       (op != Opcodes::Op_Node &&         // Not an unused antidepedence node and
2206        // not an unallocated boxlock
2207        (OptoReg::is_valid(_regalloc->get_reg_first(n)) || op != Opcodes::Op_BoxLock)) ) {
2208 
2209     // Push any trailing projections
2210     if( bb->get_node(bb->number_of_nodes()-1) != n ) {
2211       for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2212         Node *foi = n->fast_out(i);
2213         if( foi->is_Proj() )
2214           _scheduled.push(foi);
2215       }
2216     }
2217 
2218     // Put the instruction in the schedule list
2219     _scheduled.push(n);
2220   }
2221 
2222 #ifndef PRODUCT
2223   if (_cfg->C->trace_opto_output())
2224     dump_available();
2225 #endif
2226 
2227   // Walk all the definitions, decrementing use counts, and


2338     // this one, then reset the pipeline information
2339     if (bb->_num_succs != 1 || bb->non_connector_successor(0) != succ_bb) {
2340 #ifndef PRODUCT
2341       if (_cfg->C->trace_opto_output()) {
2342         tty->print("*** bundle start of next BB, node %d, for %d instructions\n",
2343                    _next_node->_idx, _bundle_instr_count);
2344       }
2345 #endif
2346       step_and_clear();
2347     }
2348 
2349     // Leave untouched the starting instruction, any Phis, a CreateEx node
2350     // or Top.  bb->get_node(_bb_start) is the first schedulable instruction.
2351     _bb_end = bb->number_of_nodes()-1;
2352     for( _bb_start=1; _bb_start <= _bb_end; _bb_start++ ) {
2353       Node *n = bb->get_node(_bb_start);
2354       // Things not matched, like Phinodes and ProjNodes don't get scheduled.
2355       // Also, MachIdealNodes do not get scheduled
2356       if( !n->is_Mach() ) continue;     // Skip non-machine nodes
2357       MachNode *mach = n->as_Mach();
2358       Opcodes iop = mach->ideal_Opcode();
2359       if( iop == Opcodes::Op_CreateEx ) continue; // CreateEx is pinned
2360       if( iop == Opcodes::Op_Con ) continue;      // Do not schedule Top
2361       if( iop == Opcodes::Op_Node &&     // Do not schedule PhiNodes, ProjNodes
2362           mach->pipeline() == MachNode::pipeline_class() &&
2363           !n->is_SpillCopy() && !n->is_MachMerge() )  // Breakpoints, Prolog, etc
2364         continue;
2365       break;                    // Funny loop structure to be sure...
2366     }
2367     // Compute last "interesting" instruction in block - last instruction we
2368     // might schedule.  _bb_end points just after last schedulable inst.  We
2369     // normally schedule conditional branches (despite them being forced last
2370     // in the block), because they have delay slots we can fill.  Calls all
2371     // have their delay slots filled in the template expansions, so we don't
2372     // bother scheduling them.
2373     Node *last = bb->get_node(_bb_end);
2374     // Ignore trailing NOPs.
2375     while (_bb_end > 0 && last->is_Mach() &&
2376            last->as_Mach()->ideal_Opcode() == Opcodes::Op_Con) {
2377       last = bb->get_node(--_bb_end);
2378     }
2379     assert(!last->is_Mach() || last->as_Mach()->ideal_Opcode() != Opcodes::Op_Con, "");
2380     if( last->is_Catch() ||
2381        // Exclude unreachable path case when Halt node is in a separate block.
2382        (_bb_end > 1 && last->is_Mach() && last->as_Mach()->ideal_Opcode() == Opcodes::Op_Halt) ) {
2383       // There must be a prior call.  Skip it.
2384       while( !bb->get_node(--_bb_end)->is_MachCall() ) {
2385         assert( bb->get_node(_bb_end)->is_MachProj(), "skipping projections after expected call" );
2386       }
2387     } else if( last->is_MachNullCheck() ) {
2388       // Backup so the last null-checked memory instruction is
2389       // outside the schedulable range. Skip over the nullcheck,
2390       // projection, and the memory nodes.
2391       Node *mem = last->in(1);
2392       do {
2393         _bb_end--;
2394       } while (mem != bb->get_node(_bb_end));
2395     } else {
2396       // Set _bb_end to point after last schedulable inst.
2397       _bb_end++;
2398     }
2399 
2400     assert( _bb_start <= _bb_end, "inverted block ends" );
2401 
2402     // Compute the register antidependencies for the basic block


2485       tty->print("%s = ",OptoReg::as_VMReg(def)->name());
2486       n->dump();
2487       tty->print_cr("...");
2488       prior_use->dump();
2489       assert(edge_from_to(prior_use,n), "%s", msg);
2490     }
2491     _reg_node.map(def,NULL); // Kill live USEs
2492   }
2493 }
2494 
2495 void Scheduling::verify_good_schedule( Block *b, const char *msg ) {
2496 
2497   // Zap to something reasonable for the verify code
2498   _reg_node.clear();
2499 
2500   // Walk over the block backwards.  Check to make sure each DEF doesn't
2501   // kill a live value (other than the one it's supposed to).  Add each
2502   // USE to the live set.
2503   for( uint i = b->number_of_nodes()-1; i >= _bb_start; i-- ) {
2504     Node *n = b->get_node(i);
2505     Opcodes n_op = n->Opcode();
2506     if( n_op == Opcodes::Op_MachProj && n->ideal_reg() == static_cast<Opcodes>(MachProjNode::projType::fat_proj) ) {
2507       // Fat-proj kills a slew of registers
2508       RegMask rm = n->out_RegMask();// Make local copy
2509       while( rm.is_NotEmpty() ) {
2510         OptoReg::Name kill = rm.find_first_elem();
2511         rm.Remove(kill);
2512         verify_do_def( n, kill, msg );
2513       }
2514     } else if( n_op != Opcodes::Op_Node ) { // Avoid brand new antidependence nodes
2515       // Get DEF'd registers the normal way
2516       verify_do_def( n, _regalloc->get_reg_first(n), msg );
2517       verify_do_def( n, _regalloc->get_reg_second(n), msg );
2518     }
2519 
2520     // Now make all USEs live
2521     for( uint i=1; i<n->req(); i++ ) {
2522       Node *def = n->in(i);
2523       assert(def != 0, "input edge required");
2524       OptoReg::Name reg_lo = _regalloc->get_reg_first(def);
2525       OptoReg::Name reg_hi = _regalloc->get_reg_second(def);
2526       if( OptoReg::is_valid(reg_lo) ) {
2527         assert(!_reg_node[reg_lo] || edge_from_to(_reg_node[reg_lo],def), "%s", msg);
2528         _reg_node.map(reg_lo,n);
2529       }
2530       if( OptoReg::is_valid(reg_hi) ) {
2531         assert(!_reg_node[reg_hi] || edge_from_to(_reg_node[reg_hi],def), "%s", msg);
2532         _reg_node.map(reg_hi,n);
2533       }
2534     }


2554 void Scheduling::anti_do_def( Block *b, Node *def, OptoReg::Name def_reg, int is_def ) {
2555   if( !OptoReg::is_valid(def_reg) ) // Ignore stores & control flow
2556     return;
2557 
2558   Node *pinch = _reg_node[def_reg]; // Get pinch point
2559   if ((pinch == NULL) || _cfg->get_block_for_node(pinch) != b || // No pinch-point yet?
2560       is_def ) {    // Check for a true def (not a kill)
2561     _reg_node.map(def_reg,def); // Record def/kill as the optimistic pinch-point
2562     return;
2563   }
2564 
2565   Node *kill = def;             // Rename 'def' to more descriptive 'kill'
2566   debug_only( def = (Node*)0xdeadbeef; )
2567 
2568   // After some number of kills there _may_ be a later def
2569   Node *later_def = NULL;
2570 
2571   // Finding a kill requires a real pinch-point.
2572   // Check for not already having a pinch-point.
2573   // Pinch points are Op_Node's.
2574   if( pinch->Opcode() != Opcodes::Op_Node ) { // Or later-def/kill as pinch-point?
2575     later_def = pinch;            // Must be def/kill as optimistic pinch-point
2576     if ( _pinch_free_list.size() > 0) {
2577       pinch = _pinch_free_list.pop();
2578     } else {
2579       pinch = new Node(1); // Pinch point to-be
2580     }
2581     if (pinch->_idx >= _regalloc->node_regs_max_index()) {
2582       _cfg->C->record_method_not_compilable("too many D-U pinch points");
2583       return;
2584     }
2585     _cfg->map_node_to_block(pinch, b);      // Pretend it's valid in this block (lazy init)
2586     _reg_node.map(def_reg,pinch); // Record pinch-point
2587     //_regalloc->set_bad(pinch->_idx); // Already initialized this way.
2588     if( later_def->outcnt() == 0 || later_def->ideal_reg() == static_cast<Opcodes>(MachProjNode::projType::fat_proj) ) { // Distinguish def from kill
2589       pinch->init_req(0, _cfg->C->top());     // set not NULL for the next call
2590       add_prec_edge_from_to(later_def,pinch); // Add edge from kill to pinch
2591       later_def = NULL;           // and no later def
2592     }
2593     pinch->set_req(0,later_def);  // Hook later def so we can find it
2594   } else {                        // Else have valid pinch point
2595     if( pinch->in(0) )            // If there is a later-def
2596       later_def = pinch->in(0);   // Get it
2597   }
2598 
2599   // Add output-dependence edge from later def to kill
2600   if( later_def )               // If there is some original def
2601     add_prec_edge_from_to(later_def,kill); // Add edge from def to kill
2602 
2603   // See if current kill is also a use, and so is forced to be the pinch-point.
2604   if( pinch->Opcode() == Opcodes::Op_Node ) {
2605     Node *uses = kill->is_Proj() ? kill->in(0) : kill;
2606     for( uint i=1; i<uses->req(); i++ ) {
2607       if( _regalloc->get_reg_first(uses->in(i)) == def_reg ||
2608           _regalloc->get_reg_second(uses->in(i)) == def_reg ) {
2609         // Yes, found a use/kill pinch-point
2610         pinch->set_req(0,NULL);  //
2611         pinch->replace_by(kill); // Move anti-dep edges up
2612         pinch = kill;
2613         _reg_node.map(def_reg,pinch);
2614         return;
2615       }
2616     }
2617   }
2618 
2619   // Add edge from kill to pinch-point
2620   add_prec_edge_from_to(kill,pinch);
2621 }
2622 
2623 void Scheduling::anti_do_use( Block *b, Node *use, OptoReg::Name use_reg ) {
2624   if( !OptoReg::is_valid(use_reg) ) // Ignore stores & control flow
2625     return;
2626   Node *pinch = _reg_node[use_reg]; // Get pinch point
2627   // Check for no later def_reg/kill in block
2628   if ((pinch != NULL) && _cfg->get_block_for_node(pinch) == b &&
2629       // Use has to be block-local as well
2630       _cfg->get_block_for_node(use) == b) {
2631     if( pinch->Opcode() == Opcodes::Op_Node && // Real pinch-point (not optimistic?)
2632         pinch->req() == 1 ) {   // pinch not yet in block?
2633       pinch->del_req(0);        // yank pointer to later-def, also set flag
2634       // Insert the pinch-point in the block just after the last use
2635       b->insert_node(pinch, b->find_node(use) + 1);
2636       _bb_end++;                // Increase size scheduled region in block
2637     }
2638 
2639     add_prec_edge_from_to(pinch,use);
2640   }
2641 }
2642 
2643 // We insert antidependences between the reads and following write of
2644 // allocated registers to prevent illegal code motion. Hopefully, the
2645 // number of added references should be fairly small, especially as we
2646 // are only adding references within the current basic block.
2647 void Scheduling::ComputeRegisterAntidependencies(Block *b) {
2648 
2649 #ifdef ASSERT
2650   verify_good_schedule(b,"before block local scheduling");
2651 #endif


2672   // We put edges from the prior and current DEF/KILLs to the pinch point.
2673   // We put the pinch point in _reg_node.  If there's already a pinch point
2674   // we merely add an edge from the current DEF/KILL to the pinch point.
2675 
2676   // After doing the DEF/KILLs, we handle USEs.  For each used register, we
2677   // put an edge from the pinch point to the USE.
2678 
2679   // To be expedient, the _reg_node array is pre-allocated for the whole
2680   // compilation.  _reg_node is lazily initialized; it either contains a NULL,
2681   // or a valid def/kill/pinch-point, or a leftover node from some prior
2682   // block.  Leftover node from some prior block is treated like a NULL (no
2683   // prior def, so no anti-dependence needed).  Valid def is distinguished by
2684   // it being in the current block.
2685   bool fat_proj_seen = false;
2686   uint last_safept = _bb_end-1;
2687   Node* end_node         = (_bb_end-1 >= _bb_start) ? b->get_node(last_safept) : NULL;
2688   Node* last_safept_node = end_node;
2689   for( uint i = _bb_end-1; i >= _bb_start; i-- ) {
2690     Node *n = b->get_node(i);
2691     int is_def = n->outcnt();   // def if some uses prior to adding precedence edges
2692     if( n->is_MachProj() && n->ideal_reg() == static_cast<Opcodes>(MachProjNode::projType::fat_proj) ) {
2693       // Fat-proj kills a slew of registers
2694       // This can add edges to 'n' and obscure whether or not it was a def,
2695       // hence the is_def flag.
2696       fat_proj_seen = true;
2697       RegMask rm = n->out_RegMask();// Make local copy
2698       while( rm.is_NotEmpty() ) {
2699         OptoReg::Name kill = rm.find_first_elem();
2700         rm.Remove(kill);
2701         anti_do_def( b, n, kill, is_def );
2702       }
2703     } else {
2704       // Get DEF'd registers the normal way
2705       anti_do_def( b, n, _regalloc->get_reg_first(n), is_def );
2706       anti_do_def( b, n, _regalloc->get_reg_second(n), is_def );
2707     }
2708 
2709     // Kill projections on a branch should appear to occur on the
2710     // branch, not afterwards, so grab the masks from the projections
2711     // and process them.
2712     if (n->is_MachBranch() || n->is_Mach() && n->as_Mach()->ideal_Opcode() == Opcodes::Op_Jump) {
2713       for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
2714         Node* use = n->fast_out(i);
2715         if (use->is_Proj()) {
2716           RegMask rm = use->out_RegMask();// Make local copy
2717           while( rm.is_NotEmpty() ) {
2718             OptoReg::Name kill = rm.find_first_elem();
2719             rm.Remove(kill);
2720             anti_do_def( b, n, kill, false );
2721           }
2722         }
2723       }
2724     }
2725 
2726     // Check each register used by this instruction for a following DEF/KILL
2727     // that must occur afterward and requires an anti-dependence edge.
2728     for( uint j=0; j<n->req(); j++ ) {
2729       Node *def = n->in(j);
2730       if( def ) {
2731         assert( !def->is_MachProj() || def->ideal_reg() != static_cast<Opcodes>(MachProjNode::projType::fat_proj), "" );
2732         anti_do_use( b, n, _regalloc->get_reg_first(def) );
2733         anti_do_use( b, n, _regalloc->get_reg_second(def) );
2734       }
2735     }
2736     // Do not allow defs of new derived values to float above GC
2737     // points unless the base is definitely available at the GC point.
2738 
2739     Node *m = b->get_node(i);
2740 
2741     // Add precedence edge from following safepoint to use of derived pointer
2742     if( last_safept_node != end_node &&
2743         m != last_safept_node) {
2744       for (uint k = 1; k < m->req(); k++) {
2745         const Type *t = m->in(k)->bottom_type();
2746         if( t->isa_oop_ptr() &&
2747             t->is_ptr()->offset() != 0 ) {
2748           last_safept_node->add_prec( m );
2749           break;
2750         }
2751       }
2752     }
2753 
2754     if( n->jvms() ) {           // Precedence edge from derived to safept
2755       // Check if last_safept_node was moved by pinch-point insertion in anti_do_use()
2756       if( b->get_node(last_safept) != last_safept_node ) {
2757         last_safept = b->find_node(last_safept_node);
2758       }
2759       for( uint j=last_safept; j > i; j-- ) {
2760         Node *mach = b->get_node(j);
2761         if( mach->is_Mach() && mach->as_Mach()->ideal_Opcode() == Opcodes::Op_AddP )
2762           mach->add_prec( n );
2763       }
2764       last_safept = i;
2765       last_safept_node = m;
2766     }
2767   }
2768 
2769   if (fat_proj_seen) {
2770     // Garbage collect pinch nodes that were not consumed.
2771     // They are usually created by a fat kill MachProj for a call.
2772     garbage_collect_pinch_nodes();
2773   }
2774 }
2775 
2776 // Garbage collect pinch nodes for reuse by other blocks.
2777 //
2778 // The block scheduler's insertion of anti-dependence
2779 // edges creates many pinch nodes when the block contains
2780 // 2 or more Calls.  A pinch node is used to prevent a
2781 // combinatorial explosion of edges.  If a set of kills for a


2787 //                \   |   /
2788 //                 \  |  /
2789 //                  pinch
2790 //                 /  |  \
2791 //                /   |   \
2792 //            kill1 kill2 kill3
2793 //
2794 // One pinch node is created per register killed when
2795 // the second call is encountered during a backwards pass
2796 // over the block.  Most of these pinch nodes are never
2797 // wired into the graph because the register is never
2798 // used or def'ed in the block.
2799 //
2800 void Scheduling::garbage_collect_pinch_nodes() {
2801 #ifndef PRODUCT
2802     if (_cfg->C->trace_opto_output()) tty->print("Reclaimed pinch nodes:");
2803 #endif
2804     int trace_cnt = 0;
2805     for (uint k = 0; k < _reg_node.Size(); k++) {
2806       Node* pinch = _reg_node[k];
2807       if ((pinch != NULL) && pinch->Opcode() == Opcodes::Op_Node &&
2808           // no predecence input edges
2809           (pinch->req() == pinch->len() || pinch->in(pinch->req()) == NULL) ) {
2810         cleanup_pinch(pinch);
2811         _pinch_free_list.push(pinch);
2812         _reg_node.map(k, NULL);
2813 #ifndef PRODUCT
2814         if (_cfg->C->trace_opto_output()) {
2815           trace_cnt++;
2816           if (trace_cnt > 40) {
2817             tty->print("\n");
2818             trace_cnt = 0;
2819           }
2820           tty->print(" %d", pinch->_idx);
2821         }
2822 #endif
2823       }
2824     }
2825 #ifndef PRODUCT
2826     if (_cfg->C->trace_opto_output()) tty->print("\n");
2827 #endif
2828 }
2829 
2830 // Clean up a pinch node for reuse.
2831 void Scheduling::cleanup_pinch( Node *pinch ) {
2832   assert (pinch && pinch->Opcode() == Opcodes::Op_Node && pinch->req() == 1, "just checking");
2833 
2834   for (DUIterator_Last imin, i = pinch->last_outs(imin); i >= imin; ) {
2835     Node* use = pinch->last_out(i);
2836     uint uses_found = 0;
2837     for (uint j = use->req(); j < use->len(); j++) {
2838       if (use->in(j) == pinch) {
2839         use->rm_prec(j);
2840         uses_found++;
2841       }
2842     }
2843     assert(uses_found > 0, "must be a precedence edge");
2844     i -= uses_found;    // we deleted 1 or more copies of this edge
2845   }
2846   // May have a later_def entry
2847   pinch->set_req(0, NULL);
2848 }
2849 
2850 #ifndef PRODUCT
2851 
2852 void Scheduling::dump_available() const {


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