--- old/src/share/vm/opto/vectornode.cpp	2016-07-11 22:46:59.080333387 +0900
+++ new/src/share/vm/opto/vectornode.cpp	2016-07-11 22:46:58.942333870 +0900
@@ -30,177 +30,177 @@
 
 // Return the vector operator for the specified scalar operation
 // and vector length.
-int VectorNode::opcode(int sopc, BasicType bt) {
+Opcodes VectorNode::opcode(Opcodes sopc, BasicType bt) {
   switch (sopc) {
-  case Op_AddI:
+  case Opcodes::Op_AddI:
     switch (bt) {
     case T_BOOLEAN:
-    case T_BYTE:      return Op_AddVB;
+    case T_BYTE:      return Opcodes::Op_AddVB;
     case T_CHAR:
-    case T_SHORT:     return Op_AddVS;
-    case T_INT:       return Op_AddVI;
+    case T_SHORT:     return Opcodes::Op_AddVS;
+    case T_INT:       return Opcodes::Op_AddVI;
     }
     ShouldNotReachHere();
-  case Op_AddL:
+  case Opcodes::Op_AddL:
     assert(bt == T_LONG, "must be");
-    return Op_AddVL;
-  case Op_AddF:
+    return Opcodes::Op_AddVL;
+  case Opcodes::Op_AddF:
     assert(bt == T_FLOAT, "must be");
-    return Op_AddVF;
-  case Op_AddD:
+    return Opcodes::Op_AddVF;
+  case Opcodes::Op_AddD:
     assert(bt == T_DOUBLE, "must be");
-    return Op_AddVD;
-  case Op_SubI:
+    return Opcodes::Op_AddVD;
+  case Opcodes::Op_SubI:
     switch (bt) {
     case T_BOOLEAN:
-    case T_BYTE:   return Op_SubVB;
+    case T_BYTE:   return Opcodes::Op_SubVB;
     case T_CHAR:
-    case T_SHORT:  return Op_SubVS;
-    case T_INT:    return Op_SubVI;
+    case T_SHORT:  return Opcodes::Op_SubVS;
+    case T_INT:    return Opcodes::Op_SubVI;
     }
     ShouldNotReachHere();
-  case Op_SubL:
+  case Opcodes::Op_SubL:
     assert(bt == T_LONG, "must be");
-    return Op_SubVL;
-  case Op_SubF:
+    return Opcodes::Op_SubVL;
+  case Opcodes::Op_SubF:
     assert(bt == T_FLOAT, "must be");
-    return Op_SubVF;
-  case Op_SubD:
+    return Opcodes::Op_SubVF;
+  case Opcodes::Op_SubD:
     assert(bt == T_DOUBLE, "must be");
-    return Op_SubVD;
-  case Op_MulI:
+    return Opcodes::Op_SubVD;
+  case Opcodes::Op_MulI:
     switch (bt) {
     case T_BOOLEAN:
-    case T_BYTE:   return 0;   // Unimplemented
+    case T_BYTE:   return Opcodes::Op_Node;   // Unimplemented
     case T_CHAR:
-    case T_SHORT:  return Op_MulVS;
-    case T_INT:    return Op_MulVI;
+    case T_SHORT:  return Opcodes::Op_MulVS;
+    case T_INT:    return Opcodes::Op_MulVI;
     }
     ShouldNotReachHere();
-  case Op_MulL:
+  case Opcodes::Op_MulL:
     assert(bt == T_LONG, "must be");
-    return Op_MulVL;
-  case Op_MulF:
+    return Opcodes::Op_MulVL;
+  case Opcodes::Op_MulF:
     assert(bt == T_FLOAT, "must be");
-    return Op_MulVF;
-  case Op_MulD:
+    return Opcodes::Op_MulVF;
+  case Opcodes::Op_MulD:
     assert(bt == T_DOUBLE, "must be");
-    return Op_MulVD;
-  case Op_CMoveD:
+    return Opcodes::Op_MulVD;
+  case Opcodes::Op_CMoveD:
     assert(bt == T_DOUBLE, "must be");
-    return Op_CMoveVD;
-  case Op_DivF:
+    return Opcodes::Op_CMoveVD;
+  case Opcodes::Op_DivF:
     assert(bt == T_FLOAT, "must be");
-    return Op_DivVF;
-  case Op_DivD:
+    return Opcodes::Op_DivVF;
+  case Opcodes::Op_DivD:
     assert(bt == T_DOUBLE, "must be");
-    return Op_DivVD;
-  case Op_AbsF:
+    return Opcodes::Op_DivVD;
+  case Opcodes::Op_AbsF:
     assert(bt == T_FLOAT, "must be");
-    return Op_AbsVF;
-  case Op_AbsD:
+    return Opcodes::Op_AbsVF;
+  case Opcodes::Op_AbsD:
     assert(bt == T_DOUBLE, "must be");
-    return Op_AbsVD;
-  case Op_NegF:
+    return Opcodes::Op_AbsVD;
+  case Opcodes::Op_NegF:
     assert(bt == T_FLOAT, "must be");
-    return Op_NegVF;
-  case Op_NegD:
+    return Opcodes::Op_NegVF;
+  case Opcodes::Op_NegD:
     assert(bt == T_DOUBLE, "must be");
-    return Op_NegVD;
-  case Op_SqrtD:
+    return Opcodes::Op_NegVD;
+  case Opcodes::Op_SqrtD:
     assert(bt == T_DOUBLE, "must be");
-    return Op_SqrtVD;
-  case Op_LShiftI:
+    return Opcodes::Op_SqrtVD;
+  case Opcodes::Op_LShiftI:
     switch (bt) {
     case T_BOOLEAN:
-    case T_BYTE:   return Op_LShiftVB;
+    case T_BYTE:   return Opcodes::Op_LShiftVB;
     case T_CHAR:
-    case T_SHORT:  return Op_LShiftVS;
-    case T_INT:    return Op_LShiftVI;
+    case T_SHORT:  return Opcodes::Op_LShiftVS;
+    case T_INT:    return Opcodes::Op_LShiftVI;
     }
     ShouldNotReachHere();
-  case Op_LShiftL:
+  case Opcodes::Op_LShiftL:
     assert(bt == T_LONG, "must be");
-    return Op_LShiftVL;
-  case Op_RShiftI:
+    return Opcodes::Op_LShiftVL;
+  case Opcodes::Op_RShiftI:
     switch (bt) {
-    case T_BOOLEAN:return Op_URShiftVB; // boolean is unsigned value
-    case T_CHAR:   return Op_URShiftVS; // char is unsigned value
-    case T_BYTE:   return Op_RShiftVB;
-    case T_SHORT:  return Op_RShiftVS;
-    case T_INT:    return Op_RShiftVI;
+    case T_BOOLEAN:return Opcodes::Op_URShiftVB; // boolean is unsigned value
+    case T_CHAR:   return Opcodes::Op_URShiftVS; // char is unsigned value
+    case T_BYTE:   return Opcodes::Op_RShiftVB;
+    case T_SHORT:  return Opcodes::Op_RShiftVS;
+    case T_INT:    return Opcodes::Op_RShiftVI;
     }
     ShouldNotReachHere();
-  case Op_RShiftL:
+  case Opcodes::Op_RShiftL:
     assert(bt == T_LONG, "must be");
-    return Op_RShiftVL;
-  case Op_URShiftI:
+    return Opcodes::Op_RShiftVL;
+  case Opcodes::Op_URShiftI:
     switch (bt) {
-    case T_BOOLEAN:return Op_URShiftVB;
-    case T_CHAR:   return Op_URShiftVS;
+    case T_BOOLEAN:return Opcodes::Op_URShiftVB;
+    case T_CHAR:   return Opcodes::Op_URShiftVS;
     case T_BYTE:
-    case T_SHORT:  return 0; // Vector logical right shift for signed short
+    case T_SHORT:  return Opcodes::Op_Node; // Vector logical right shift for signed short
                              // values produces incorrect Java result for
                              // negative data because java code should convert
                              // a short value into int value with sign
                              // extension before a shift.
-    case T_INT:    return Op_URShiftVI;
+    case T_INT:    return Opcodes::Op_URShiftVI;
     }
     ShouldNotReachHere();
-  case Op_URShiftL:
+  case Opcodes::Op_URShiftL:
     assert(bt == T_LONG, "must be");
-    return Op_URShiftVL;
-  case Op_AndI:
-  case Op_AndL:
-    return Op_AndV;
-  case Op_OrI:
-  case Op_OrL:
-    return Op_OrV;
-  case Op_XorI:
-  case Op_XorL:
-    return Op_XorV;
-
-  case Op_LoadB:
-  case Op_LoadUB:
-  case Op_LoadUS:
-  case Op_LoadS:
-  case Op_LoadI:
-  case Op_LoadL:
-  case Op_LoadF:
-  case Op_LoadD:
-    return Op_LoadVector;
-
-  case Op_StoreB:
-  case Op_StoreC:
-  case Op_StoreI:
-  case Op_StoreL:
-  case Op_StoreF:
-  case Op_StoreD:
-    return Op_StoreVector;
+    return Opcodes::Op_URShiftVL;
+  case Opcodes::Op_AndI:
+  case Opcodes::Op_AndL:
+    return Opcodes::Op_AndV;
+  case Opcodes::Op_OrI:
+  case Opcodes::Op_OrL:
+    return Opcodes::Op_OrV;
+  case Opcodes::Op_XorI:
+  case Opcodes::Op_XorL:
+    return Opcodes::Op_XorV;
+
+  case Opcodes::Op_LoadB:
+  case Opcodes::Op_LoadUB:
+  case Opcodes::Op_LoadUS:
+  case Opcodes::Op_LoadS:
+  case Opcodes::Op_LoadI:
+  case Opcodes::Op_LoadL:
+  case Opcodes::Op_LoadF:
+  case Opcodes::Op_LoadD:
+    return Opcodes::Op_LoadVector;
+
+  case Opcodes::Op_StoreB:
+  case Opcodes::Op_StoreC:
+  case Opcodes::Op_StoreI:
+  case Opcodes::Op_StoreL:
+  case Opcodes::Op_StoreF:
+  case Opcodes::Op_StoreD:
+    return Opcodes::Op_StoreVector;
   }
-  return 0; // Unimplemented
+  return Opcodes::Op_Node; // Unimplemented
 }
 
 // Also used to check if the code generator
 // supports the vector operation.
-bool VectorNode::implemented(int opc, uint vlen, BasicType bt) {
+bool VectorNode::implemented(Opcodes opc, uint vlen, BasicType bt) {
   if (is_java_primitive(bt) &&
       (vlen > 1) && is_power_of_2(vlen) &&
       Matcher::vector_size_supported(bt, vlen)) {
-    int vopc = VectorNode::opcode(opc, bt);
-    return vopc > 0 && Matcher::match_rule_supported_vector(vopc, vlen);
+    Opcodes vopc = VectorNode::opcode(opc, bt);
+    return vopc > Opcodes::Op_Node && Matcher::match_rule_supported_vector(vopc, vlen);
   }
   return false;
 }
 
 bool VectorNode::is_shift(Node* n) {
   switch (n->Opcode()) {
-  case Op_LShiftI:
-  case Op_LShiftL:
-  case Op_RShiftI:
-  case Op_RShiftL:
-  case Op_URShiftI:
-  case Op_URShiftL:
+  case Opcodes::Op_LShiftI:
+  case Opcodes::Op_LShiftL:
+  case Opcodes::Op_RShiftI:
+  case Opcodes::Op_RShiftL:
+  case Opcodes::Op_URShiftI:
+  case Opcodes::Op_URShiftL:
     return true;
   }
   return false;
@@ -210,12 +210,12 @@
 bool VectorNode::is_invariant_vector(Node* n) {
   // Only Replicate vector nodes are loop invariant for now.
   switch (n->Opcode()) {
-  case Op_ReplicateB:
-  case Op_ReplicateS:
-  case Op_ReplicateI:
-  case Op_ReplicateL:
-  case Op_ReplicateF:
-  case Op_ReplicateD:
+  case Opcodes::Op_ReplicateB:
+  case Opcodes::Op_ReplicateS:
+  case Opcodes::Op_ReplicateI:
+  case Opcodes::Op_ReplicateL:
+  case Opcodes::Op_ReplicateF:
+  case Opcodes::Op_ReplicateD:
     return true;
   }
   return false;
@@ -224,38 +224,38 @@
 // [Start, end) half-open range defining which operands are vectors
 void VectorNode::vector_operands(Node* n, uint* start, uint* end) {
   switch (n->Opcode()) {
-  case Op_LoadB:   case Op_LoadUB:
-  case Op_LoadS:   case Op_LoadUS:
-  case Op_LoadI:   case Op_LoadL:
-  case Op_LoadF:   case Op_LoadD:
-  case Op_LoadP:   case Op_LoadN:
+  case Opcodes::Op_LoadB:   case Opcodes::Op_LoadUB:
+  case Opcodes::Op_LoadS:   case Opcodes::Op_LoadUS:
+  case Opcodes::Op_LoadI:   case Opcodes::Op_LoadL:
+  case Opcodes::Op_LoadF:   case Opcodes::Op_LoadD:
+  case Opcodes::Op_LoadP:   case Opcodes::Op_LoadN:
     *start = 0;
     *end   = 0; // no vector operands
     break;
-  case Op_StoreB:  case Op_StoreC:
-  case Op_StoreI:  case Op_StoreL:
-  case Op_StoreF:  case Op_StoreD:
-  case Op_StoreP:  case Op_StoreN:
+  case Opcodes::Op_StoreB:  case Opcodes::Op_StoreC:
+  case Opcodes::Op_StoreI:  case Opcodes::Op_StoreL:
+  case Opcodes::Op_StoreF:  case Opcodes::Op_StoreD:
+  case Opcodes::Op_StoreP:  case Opcodes::Op_StoreN:
     *start = MemNode::ValueIn;
     *end   = MemNode::ValueIn + 1; // 1 vector operand
     break;
-  case Op_LShiftI:  case Op_LShiftL:
-  case Op_RShiftI:  case Op_RShiftL:
-  case Op_URShiftI: case Op_URShiftL:
+  case Opcodes::Op_LShiftI:  case Opcodes::Op_LShiftL:
+  case Opcodes::Op_RShiftI:  case Opcodes::Op_RShiftL:
+  case Opcodes::Op_URShiftI: case Opcodes::Op_URShiftL:
     *start = 1;
     *end   = 2; // 1 vector operand
     break;
-  case Op_AddI: case Op_AddL: case Op_AddF: case Op_AddD:
-  case Op_SubI: case Op_SubL: case Op_SubF: case Op_SubD:
-  case Op_MulI: case Op_MulL: case Op_MulF: case Op_MulD:
-  case Op_DivF: case Op_DivD:
-  case Op_AndI: case Op_AndL:
-  case Op_OrI:  case Op_OrL:
-  case Op_XorI: case Op_XorL:
+  case Opcodes::Op_AddI: case Opcodes::Op_AddL: case Opcodes::Op_AddF: case Opcodes::Op_AddD:
+  case Opcodes::Op_SubI: case Opcodes::Op_SubL: case Opcodes::Op_SubF: case Opcodes::Op_SubD:
+  case Opcodes::Op_MulI: case Opcodes::Op_MulL: case Opcodes::Op_MulF: case Opcodes::Op_MulD:
+  case Opcodes::Op_DivF: case Opcodes::Op_DivD:
+  case Opcodes::Op_AndI: case Opcodes::Op_AndL:
+  case Opcodes::Op_OrI:  case Opcodes::Op_OrL:
+  case Opcodes::Op_XorI: case Opcodes::Op_XorL:
     *start = 1;
     *end   = 3; // 2 vector operands
     break;
-  case Op_CMoveI:  case Op_CMoveL:  case Op_CMoveF:  case Op_CMoveD:
+  case Opcodes::Op_CMoveI:  case Opcodes::Op_CMoveL:  case Opcodes::Op_CMoveF:  case Opcodes::Op_CMoveD:
     *start = 2;
     *end   = n->req();
     break;
@@ -266,64 +266,64 @@
 }
 
 // Return the vector version of a scalar operation node.
-VectorNode* VectorNode::make(int opc, Node* n1, Node* n2, uint vlen, BasicType bt) {
+VectorNode* VectorNode::make(Opcodes opc, Node* n1, Node* n2, uint vlen, BasicType bt) {
   const TypeVect* vt = TypeVect::make(bt, vlen);
-  int vopc = VectorNode::opcode(opc, bt);
+  Opcodes vopc = VectorNode::opcode(opc, bt);
   // This method should not be called for unimplemented vectors.
-  guarantee(vopc > 0, "Vector for '%s' is not implemented", NodeClassNames[opc]);
+  guarantee(vopc > Opcodes::Op_Node, "Vector for '%s' is not implemented", NodeClassNames[static_cast<uint>(opc)]);
   switch (vopc) {
-  case Op_AddVB: return new AddVBNode(n1, n2, vt);
-  case Op_AddVS: return new AddVSNode(n1, n2, vt);
-  case Op_AddVI: return new AddVINode(n1, n2, vt);
-  case Op_AddVL: return new AddVLNode(n1, n2, vt);
-  case Op_AddVF: return new AddVFNode(n1, n2, vt);
-  case Op_AddVD: return new AddVDNode(n1, n2, vt);
-
-  case Op_SubVB: return new SubVBNode(n1, n2, vt);
-  case Op_SubVS: return new SubVSNode(n1, n2, vt);
-  case Op_SubVI: return new SubVINode(n1, n2, vt);
-  case Op_SubVL: return new SubVLNode(n1, n2, vt);
-  case Op_SubVF: return new SubVFNode(n1, n2, vt);
-  case Op_SubVD: return new SubVDNode(n1, n2, vt);
-
-  case Op_MulVS: return new MulVSNode(n1, n2, vt);
-  case Op_MulVI: return new MulVINode(n1, n2, vt);
-  case Op_MulVL: return new MulVLNode(n1, n2, vt);
-  case Op_MulVF: return new MulVFNode(n1, n2, vt);
-  case Op_MulVD: return new MulVDNode(n1, n2, vt);
+  case Opcodes::Op_AddVB: return new AddVBNode(n1, n2, vt);
+  case Opcodes::Op_AddVS: return new AddVSNode(n1, n2, vt);
+  case Opcodes::Op_AddVI: return new AddVINode(n1, n2, vt);
+  case Opcodes::Op_AddVL: return new AddVLNode(n1, n2, vt);
+  case Opcodes::Op_AddVF: return new AddVFNode(n1, n2, vt);
+  case Opcodes::Op_AddVD: return new AddVDNode(n1, n2, vt);
+
+  case Opcodes::Op_SubVB: return new SubVBNode(n1, n2, vt);
+  case Opcodes::Op_SubVS: return new SubVSNode(n1, n2, vt);
+  case Opcodes::Op_SubVI: return new SubVINode(n1, n2, vt);
+  case Opcodes::Op_SubVL: return new SubVLNode(n1, n2, vt);
+  case Opcodes::Op_SubVF: return new SubVFNode(n1, n2, vt);
+  case Opcodes::Op_SubVD: return new SubVDNode(n1, n2, vt);
+
+  case Opcodes::Op_MulVS: return new MulVSNode(n1, n2, vt);
+  case Opcodes::Op_MulVI: return new MulVINode(n1, n2, vt);
+  case Opcodes::Op_MulVL: return new MulVLNode(n1, n2, vt);
+  case Opcodes::Op_MulVF: return new MulVFNode(n1, n2, vt);
+  case Opcodes::Op_MulVD: return new MulVDNode(n1, n2, vt);
 
-  case Op_DivVF: return new DivVFNode(n1, n2, vt);
-  case Op_DivVD: return new DivVDNode(n1, n2, vt);
+  case Opcodes::Op_DivVF: return new DivVFNode(n1, n2, vt);
+  case Opcodes::Op_DivVD: return new DivVDNode(n1, n2, vt);
 
-  case Op_AbsVF: return new AbsVFNode(n1, vt);
-  case Op_AbsVD: return new AbsVDNode(n1, vt);
+  case Opcodes::Op_AbsVF: return new AbsVFNode(n1, vt);
+  case Opcodes::Op_AbsVD: return new AbsVDNode(n1, vt);
 
-  case Op_NegVF: return new NegVFNode(n1, vt);
-  case Op_NegVD: return new NegVDNode(n1, vt);
+  case Opcodes::Op_NegVF: return new NegVFNode(n1, vt);
+  case Opcodes::Op_NegVD: return new NegVDNode(n1, vt);
 
   // Currently only supports double precision sqrt
-  case Op_SqrtVD: return new SqrtVDNode(n1, vt);
+  case Opcodes::Op_SqrtVD: return new SqrtVDNode(n1, vt);
 
-  case Op_LShiftVB: return new LShiftVBNode(n1, n2, vt);
-  case Op_LShiftVS: return new LShiftVSNode(n1, n2, vt);
-  case Op_LShiftVI: return new LShiftVINode(n1, n2, vt);
-  case Op_LShiftVL: return new LShiftVLNode(n1, n2, vt);
-
-  case Op_RShiftVB: return new RShiftVBNode(n1, n2, vt);
-  case Op_RShiftVS: return new RShiftVSNode(n1, n2, vt);
-  case Op_RShiftVI: return new RShiftVINode(n1, n2, vt);
-  case Op_RShiftVL: return new RShiftVLNode(n1, n2, vt);
-
-  case Op_URShiftVB: return new URShiftVBNode(n1, n2, vt);
-  case Op_URShiftVS: return new URShiftVSNode(n1, n2, vt);
-  case Op_URShiftVI: return new URShiftVINode(n1, n2, vt);
-  case Op_URShiftVL: return new URShiftVLNode(n1, n2, vt);
-
-  case Op_AndV: return new AndVNode(n1, n2, vt);
-  case Op_OrV:  return new OrVNode (n1, n2, vt);
-  case Op_XorV: return new XorVNode(n1, n2, vt);
+  case Opcodes::Op_LShiftVB: return new LShiftVBNode(n1, n2, vt);
+  case Opcodes::Op_LShiftVS: return new LShiftVSNode(n1, n2, vt);
+  case Opcodes::Op_LShiftVI: return new LShiftVINode(n1, n2, vt);
+  case Opcodes::Op_LShiftVL: return new LShiftVLNode(n1, n2, vt);
+
+  case Opcodes::Op_RShiftVB: return new RShiftVBNode(n1, n2, vt);
+  case Opcodes::Op_RShiftVS: return new RShiftVSNode(n1, n2, vt);
+  case Opcodes::Op_RShiftVI: return new RShiftVINode(n1, n2, vt);
+  case Opcodes::Op_RShiftVL: return new RShiftVLNode(n1, n2, vt);
+
+  case Opcodes::Op_URShiftVB: return new URShiftVBNode(n1, n2, vt);
+  case Opcodes::Op_URShiftVS: return new URShiftVSNode(n1, n2, vt);
+  case Opcodes::Op_URShiftVI: return new URShiftVINode(n1, n2, vt);
+  case Opcodes::Op_URShiftVL: return new URShiftVLNode(n1, n2, vt);
+
+  case Opcodes::Op_AndV: return new AndVNode(n1, n2, vt);
+  case Opcodes::Op_OrV:  return new OrVNode (n1, n2, vt);
+  case Opcodes::Op_XorV: return new XorVNode(n1, n2, vt);
   }
-  fatal("Missed vector creation for '%s'", NodeClassNames[vopc]);
+  fatal("Missed vector creation for '%s'", NodeClassNames[static_cast<uint>(vopc)]);
   return NULL;
 
 }
@@ -358,16 +358,16 @@
   // Match shift count type with shift vector type.
   const TypeVect* vt = TypeVect::make(bt, vlen);
   switch (shift->Opcode()) {
-  case Op_LShiftI:
-  case Op_LShiftL:
+  case Opcodes::Op_LShiftI:
+  case Opcodes::Op_LShiftL:
     return new LShiftCntVNode(cnt, vt);
-  case Op_RShiftI:
-  case Op_RShiftL:
-  case Op_URShiftI:
-  case Op_URShiftL:
+  case Opcodes::Op_RShiftI:
+  case Opcodes::Op_RShiftL:
+  case Opcodes::Op_URShiftI:
+  case Opcodes::Op_URShiftL:
     return new RShiftCntVNode(cnt, vt);
   }
-  fatal("Missed vector creation for '%s'", NodeClassNames[shift->Opcode()]);
+  fatal("Missed vector creation for '%s'", NodeClassNames[static_cast<uint>(shift->Opcode())]);
   return NULL;
 }
 
@@ -432,7 +432,7 @@
 }
 
 // Return the vector version of a scalar load node.
-LoadVectorNode* LoadVectorNode::make(int opc, Node* ctl, Node* mem,
+LoadVectorNode* LoadVectorNode::make(Opcodes opc, Node* ctl, Node* mem,
                                      Node* adr, const TypePtr* atyp,
                                      uint vlen, BasicType bt,
                                      ControlDependency control_dependency) {
@@ -441,7 +441,7 @@
 }
 
 // Return the vector version of a scalar store node.
-StoreVectorNode* StoreVectorNode::make(int opc, Node* ctl, Node* mem,
+StoreVectorNode* StoreVectorNode::make(Opcodes opc, Node* ctl, Node* mem,
                                        Node* adr, const TypePtr* atyp, Node* val,
                                        uint vlen) {
   return new StoreVectorNode(ctl, mem, adr, atyp, val);
@@ -473,40 +473,40 @@
   return NULL;
 }
 
-int ReductionNode::opcode(int opc, BasicType bt) {
-  int vopc = opc;
+Opcodes ReductionNode::opcode(Opcodes opc, BasicType bt) {
+  Opcodes vopc = opc;
   switch (opc) {
-    case Op_AddI:
+    case Opcodes::Op_AddI:
       assert(bt == T_INT, "must be");
-      vopc = Op_AddReductionVI;
+      vopc = Opcodes::Op_AddReductionVI;
       break;
-    case Op_AddL:
+    case Opcodes::Op_AddL:
       assert(bt == T_LONG, "must be");
-      vopc = Op_AddReductionVL;
+      vopc = Opcodes::Op_AddReductionVL;
       break;
-    case Op_AddF:
+    case Opcodes::Op_AddF:
       assert(bt == T_FLOAT, "must be");
-      vopc = Op_AddReductionVF;
+      vopc = Opcodes::Op_AddReductionVF;
       break;
-    case Op_AddD:
+    case Opcodes::Op_AddD:
       assert(bt == T_DOUBLE, "must be");
-      vopc = Op_AddReductionVD;
+      vopc = Opcodes::Op_AddReductionVD;
       break;
-    case Op_MulI:
+    case Opcodes::Op_MulI:
       assert(bt == T_INT, "must be");
-      vopc = Op_MulReductionVI;
+      vopc = Opcodes::Op_MulReductionVI;
       break;
-    case Op_MulL:
+    case Opcodes::Op_MulL:
       assert(bt == T_LONG, "must be");
-      vopc = Op_MulReductionVL;
+      vopc = Opcodes::Op_MulReductionVL;
       break;
-    case Op_MulF:
+    case Opcodes::Op_MulF:
       assert(bt == T_FLOAT, "must be");
-      vopc = Op_MulReductionVF;
+      vopc = Opcodes::Op_MulReductionVF;
       break;
-    case Op_MulD:
+    case Opcodes::Op_MulD:
       assert(bt == T_DOUBLE, "must be");
-      vopc = Op_MulReductionVD;
+      vopc = Opcodes::Op_MulReductionVD;
       break;
     // TODO: add MulL for targets that support it
     default:
@@ -516,32 +516,32 @@
 }
 
 // Return the appropriate reduction node.
-ReductionNode* ReductionNode::make(int opc, Node *ctrl, Node* n1, Node* n2, BasicType bt) {
+ReductionNode* ReductionNode::make(Opcodes opc, Node *ctrl, Node* n1, Node* n2, BasicType bt) {
 
-  int vopc = opcode(opc, bt);
+  Opcodes vopc = opcode(opc, bt);
 
   // This method should not be called for unimplemented vectors.
-  guarantee(vopc != opc, "Vector for '%s' is not implemented", NodeClassNames[opc]);
+  guarantee(vopc != opc, "Vector for '%s' is not implemented", NodeClassNames[static_cast<uint>(opc)]);
 
   switch (vopc) {
-  case Op_AddReductionVI: return new AddReductionVINode(ctrl, n1, n2);
-  case Op_AddReductionVL: return new AddReductionVLNode(ctrl, n1, n2);
-  case Op_AddReductionVF: return new AddReductionVFNode(ctrl, n1, n2);
-  case Op_AddReductionVD: return new AddReductionVDNode(ctrl, n1, n2);
-  case Op_MulReductionVI: return new MulReductionVINode(ctrl, n1, n2);
-  case Op_MulReductionVL: return new MulReductionVLNode(ctrl, n1, n2);
-  case Op_MulReductionVF: return new MulReductionVFNode(ctrl, n1, n2);
-  case Op_MulReductionVD: return new MulReductionVDNode(ctrl, n1, n2);
+  case Opcodes::Op_AddReductionVI: return new AddReductionVINode(ctrl, n1, n2);
+  case Opcodes::Op_AddReductionVL: return new AddReductionVLNode(ctrl, n1, n2);
+  case Opcodes::Op_AddReductionVF: return new AddReductionVFNode(ctrl, n1, n2);
+  case Opcodes::Op_AddReductionVD: return new AddReductionVDNode(ctrl, n1, n2);
+  case Opcodes::Op_MulReductionVI: return new MulReductionVINode(ctrl, n1, n2);
+  case Opcodes::Op_MulReductionVL: return new MulReductionVLNode(ctrl, n1, n2);
+  case Opcodes::Op_MulReductionVF: return new MulReductionVFNode(ctrl, n1, n2);
+  case Opcodes::Op_MulReductionVD: return new MulReductionVDNode(ctrl, n1, n2);
   }
-  fatal("Missed vector creation for '%s'", NodeClassNames[vopc]);
+  fatal("Missed vector creation for '%s'", NodeClassNames[static_cast<uint>(vopc)]);
   return NULL;
 }
 
-bool ReductionNode::implemented(int opc, uint vlen, BasicType bt) {
+bool ReductionNode::implemented(Opcodes opc, uint vlen, BasicType bt) {
   if (is_java_primitive(bt) &&
       (vlen > 1) && is_power_of_2(vlen) &&
       Matcher::vector_size_supported(bt, vlen)) {
-    int vopc = ReductionNode::opcode(opc, bt);
+    Opcodes vopc = ReductionNode::opcode(opc, bt);
     return vopc != opc && Matcher::match_rule_supported(vopc);
   }
   return false;