1 /* 2 * Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "asm/macroAssembler.hpp" 27 #include "asm/macroAssembler.inline.hpp" 28 #include "code/debugInfoRec.hpp" 29 #include "code/icBuffer.hpp" 30 #include "code/nativeInst.hpp" 31 #include "code/vtableStubs.hpp" 32 #include "gc/shared/gcLocker.hpp" 33 #include "interpreter/interpreter.hpp" 34 #include "logging/log.hpp" 35 #include "memory/resourceArea.hpp" 36 #include "oops/compiledICHolder.hpp" 37 #include "runtime/safepointMechanism.hpp" 38 #include "runtime/sharedRuntime.hpp" 39 #include "runtime/vframeArray.hpp" 40 #include "utilities/align.hpp" 41 #include "vmreg_x86.inline.hpp" 42 #ifdef COMPILER1 43 #include "c1/c1_Runtime1.hpp" 44 #endif 45 #ifdef COMPILER2 46 #include "opto/runtime.hpp" 47 #endif 48 #include "vm_version_x86.hpp" 49 50 #define __ masm-> 51 52 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; 53 54 class RegisterSaver { 55 // Capture info about frame layout 56 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off 57 enum layout { 58 fpu_state_off = 0, 59 fpu_state_end = fpu_state_off+FPUStateSizeInWords, 60 st0_off, st0H_off, 61 st1_off, st1H_off, 62 st2_off, st2H_off, 63 st3_off, st3H_off, 64 st4_off, st4H_off, 65 st5_off, st5H_off, 66 st6_off, st6H_off, 67 st7_off, st7H_off, 68 xmm_off, 69 DEF_XMM_OFFS(0), 70 DEF_XMM_OFFS(1), 71 DEF_XMM_OFFS(2), 72 DEF_XMM_OFFS(3), 73 DEF_XMM_OFFS(4), 74 DEF_XMM_OFFS(5), 75 DEF_XMM_OFFS(6), 76 DEF_XMM_OFFS(7), 77 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word 78 rdi_off, 79 rsi_off, 80 ignore_off, // extra copy of rbp, 81 rsp_off, 82 rbx_off, 83 rdx_off, 84 rcx_off, 85 rax_off, 86 // The frame sender code expects that rbp will be in the "natural" place and 87 // will override any oopMap setting for it. We must therefore force the layout 88 // so that it agrees with the frame sender code. 89 rbp_off, 90 return_off, // slot for return address 91 reg_save_size }; 92 enum { FPU_regs_live = flags_off - fpu_state_end }; 93 94 public: 95 96 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, 97 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false); 98 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); 99 100 static int rax_offset() { return rax_off; } 101 static int rbx_offset() { return rbx_off; } 102 103 // Offsets into the register save area 104 // Used by deoptimization when it is managing result register 105 // values on its own 106 107 static int raxOffset(void) { return rax_off; } 108 static int rdxOffset(void) { return rdx_off; } 109 static int rbxOffset(void) { return rbx_off; } 110 static int xmm0Offset(void) { return xmm0_off; } 111 // This really returns a slot in the fp save area, which one is not important 112 static int fpResultOffset(void) { return st0_off; } 113 114 // During deoptimization only the result register need to be restored 115 // all the other values have already been extracted. 116 117 static void restore_result_registers(MacroAssembler* masm); 118 119 }; 120 121 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, 122 int* total_frame_words, bool verify_fpu, bool save_vectors) { 123 int num_xmm_regs = XMMRegisterImpl::number_of_registers; 124 int ymm_bytes = num_xmm_regs * 16; 125 int zmm_bytes = num_xmm_regs * 32; 126 #ifdef COMPILER2 127 if (save_vectors) { 128 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX"); 129 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported"); 130 // Save upper half of YMM registers 131 int vect_bytes = ymm_bytes; 132 if (UseAVX > 2) { 133 // Save upper half of ZMM registers as well 134 vect_bytes += zmm_bytes; 135 } 136 additional_frame_words += vect_bytes / wordSize; 137 } 138 #else 139 assert(!save_vectors, "vectors are generated only by C2"); 140 #endif 141 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize; 142 int frame_words = frame_size_in_bytes / wordSize; 143 *total_frame_words = frame_words; 144 145 assert(FPUStateSizeInWords == 27, "update stack layout"); 146 147 // save registers, fpu state, and flags 148 // We assume caller has already has return address slot on the stack 149 // We push epb twice in this sequence because we want the real rbp, 150 // to be under the return like a normal enter and we want to use pusha 151 // We push by hand instead of using push. 152 __ enter(); 153 __ pusha(); 154 __ pushf(); 155 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space 156 __ push_FPU_state(); // Save FPU state & init 157 158 if (verify_fpu) { 159 // Some stubs may have non standard FPU control word settings so 160 // only check and reset the value when it required to be the 161 // standard value. The safepoint blob in particular can be used 162 // in methods which are using the 24 bit control word for 163 // optimized float math. 164 165 #ifdef ASSERT 166 // Make sure the control word has the expected value 167 Label ok; 168 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); 169 __ jccb(Assembler::equal, ok); 170 __ stop("corrupted control word detected"); 171 __ bind(ok); 172 #endif 173 174 // Reset the control word to guard against exceptions being unmasked 175 // since fstp_d can cause FPU stack underflow exceptions. Write it 176 // into the on stack copy and then reload that to make sure that the 177 // current and future values are correct. 178 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std()); 179 } 180 181 __ frstor(Address(rsp, 0)); 182 if (!verify_fpu) { 183 // Set the control word so that exceptions are masked for the 184 // following code. 185 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); 186 } 187 188 int off = st0_off; 189 int delta = st1_off - off; 190 191 // Save the FPU registers in de-opt-able form 192 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) { 193 __ fstp_d(Address(rsp, off*wordSize)); 194 off += delta; 195 } 196 197 off = xmm0_off; 198 delta = xmm1_off - off; 199 if(UseSSE == 1) { 200 // Save the XMM state 201 for (int n = 0; n < num_xmm_regs; n++) { 202 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n)); 203 off += delta; 204 } 205 } else if(UseSSE >= 2) { 206 // Save whole 128bit (16 bytes) XMM registers 207 for (int n = 0; n < num_xmm_regs; n++) { 208 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n)); 209 off += delta; 210 } 211 } 212 213 if (save_vectors) { 214 __ subptr(rsp, ymm_bytes); 215 // Save upper half of YMM registers 216 for (int n = 0; n < num_xmm_regs; n++) { 217 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n)); 218 } 219 if (UseAVX > 2) { 220 __ subptr(rsp, zmm_bytes); 221 // Save upper half of ZMM registers 222 for (int n = 0; n < num_xmm_regs; n++) { 223 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n)); 224 } 225 } 226 } 227 __ vzeroupper(); 228 229 // Set an oopmap for the call site. This oopmap will map all 230 // oop-registers and debug-info registers as callee-saved. This 231 // will allow deoptimization at this safepoint to find all possible 232 // debug-info recordings, as well as let GC find all oops. 233 234 OopMapSet *oop_maps = new OopMapSet(); 235 OopMap* map = new OopMap( frame_words, 0 ); 236 237 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words) 238 #define NEXTREG(x) (x)->as_VMReg()->next() 239 240 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg()); 241 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg()); 242 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg()); 243 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg()); 244 // rbp, location is known implicitly, no oopMap 245 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg()); 246 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg()); 247 // %%% This is really a waste but we'll keep things as they were for now for the upper component 248 off = st0_off; 249 delta = st1_off - off; 250 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) { 251 FloatRegister freg_name = as_FloatRegister(n); 252 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg()); 253 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name)); 254 off += delta; 255 } 256 off = xmm0_off; 257 delta = xmm1_off - off; 258 for (int n = 0; n < num_xmm_regs; n++) { 259 XMMRegister xmm_name = as_XMMRegister(n); 260 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg()); 261 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name)); 262 off += delta; 263 } 264 #undef NEXTREG 265 #undef STACK_OFFSET 266 267 return map; 268 } 269 270 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { 271 int num_xmm_regs = XMMRegisterImpl::number_of_registers; 272 int ymm_bytes = num_xmm_regs * 16; 273 int zmm_bytes = num_xmm_regs * 32; 274 // Recover XMM & FPU state 275 int additional_frame_bytes = 0; 276 #ifdef COMPILER2 277 if (restore_vectors) { 278 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX"); 279 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported"); 280 // Save upper half of YMM registers 281 additional_frame_bytes = ymm_bytes; 282 if (UseAVX > 2) { 283 // Save upper half of ZMM registers as well 284 additional_frame_bytes += zmm_bytes; 285 } 286 } 287 #else 288 assert(!restore_vectors, "vectors are generated only by C2"); 289 #endif 290 291 int off = xmm0_off; 292 int delta = xmm1_off - off; 293 294 __ vzeroupper(); 295 296 if (UseSSE == 1) { 297 // Restore XMM registers 298 assert(additional_frame_bytes == 0, ""); 299 for (int n = 0; n < num_xmm_regs; n++) { 300 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize)); 301 off += delta; 302 } 303 } else if (UseSSE >= 2) { 304 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and 305 // ZMM because the movdqu instruction zeros the upper part of the XMM register. 306 for (int n = 0; n < num_xmm_regs; n++) { 307 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes)); 308 off += delta; 309 } 310 } 311 312 if (restore_vectors) { 313 if (UseAVX > 2) { 314 // Restore upper half of ZMM registers. 315 for (int n = 0; n < num_xmm_regs; n++) { 316 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32)); 317 } 318 __ addptr(rsp, zmm_bytes); 319 } 320 // Restore upper half of YMM registers. 321 for (int n = 0; n < num_xmm_regs; n++) { 322 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16)); 323 } 324 __ addptr(rsp, ymm_bytes); 325 } 326 327 __ pop_FPU_state(); 328 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers 329 330 __ popf(); 331 __ popa(); 332 // Get the rbp, described implicitly by the frame sender code (no oopMap) 333 __ pop(rbp); 334 } 335 336 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { 337 338 // Just restore result register. Only used by deoptimization. By 339 // now any callee save register that needs to be restore to a c2 340 // caller of the deoptee has been extracted into the vframeArray 341 // and will be stuffed into the c2i adapter we create for later 342 // restoration so only result registers need to be restored here. 343 // 344 345 __ frstor(Address(rsp, 0)); // Restore fpu state 346 347 // Recover XMM & FPU state 348 if( UseSSE == 1 ) { 349 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize)); 350 } else if( UseSSE >= 2 ) { 351 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize)); 352 } 353 __ movptr(rax, Address(rsp, rax_off*wordSize)); 354 __ movptr(rdx, Address(rsp, rdx_off*wordSize)); 355 // Pop all of the register save are off the stack except the return address 356 __ addptr(rsp, return_off * wordSize); 357 } 358 359 // Is vector's size (in bytes) bigger than a size saved by default? 360 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions. 361 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated. 362 bool SharedRuntime::is_wide_vector(int size) { 363 return size > 16; 364 } 365 366 size_t SharedRuntime::trampoline_size() { 367 return 16; 368 } 369 370 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) { 371 __ jump(RuntimeAddress(destination)); 372 } 373 374 // The java_calling_convention describes stack locations as ideal slots on 375 // a frame with no abi restrictions. Since we must observe abi restrictions 376 // (like the placement of the register window) the slots must be biased by 377 // the following value. 378 static int reg2offset_in(VMReg r) { 379 // Account for saved rbp, and return address 380 // This should really be in_preserve_stack_slots 381 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size; 382 } 383 384 static int reg2offset_out(VMReg r) { 385 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 386 } 387 388 // --------------------------------------------------------------------------- 389 // Read the array of BasicTypes from a signature, and compute where the 390 // arguments should go. Values in the VMRegPair regs array refer to 4-byte 391 // quantities. Values less than SharedInfo::stack0 are registers, those above 392 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer 393 // as framesizes are fixed. 394 // VMRegImpl::stack0 refers to the first slot 0(sp). 395 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register 396 // up to RegisterImpl::number_of_registers) are the 32-bit 397 // integer registers. 398 399 // Pass first two oop/int args in registers ECX and EDX. 400 // Pass first two float/double args in registers XMM0 and XMM1. 401 // Doubles have precedence, so if you pass a mix of floats and doubles 402 // the doubles will grab the registers before the floats will. 403 404 // Note: the INPUTS in sig_bt are in units of Java argument words, which are 405 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit 406 // units regardless of build. Of course for i486 there is no 64 bit build 407 408 409 // --------------------------------------------------------------------------- 410 // The compiled Java calling convention. 411 // Pass first two oop/int args in registers ECX and EDX. 412 // Pass first two float/double args in registers XMM0 and XMM1. 413 // Doubles have precedence, so if you pass a mix of floats and doubles 414 // the doubles will grab the registers before the floats will. 415 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, 416 VMRegPair *regs, 417 int total_args_passed, 418 int is_outgoing) { 419 uint stack = 0; // Starting stack position for args on stack 420 421 422 // Pass first two oop/int args in registers ECX and EDX. 423 uint reg_arg0 = 9999; 424 uint reg_arg1 = 9999; 425 426 // Pass first two float/double args in registers XMM0 and XMM1. 427 // Doubles have precedence, so if you pass a mix of floats and doubles 428 // the doubles will grab the registers before the floats will. 429 // CNC - TURNED OFF FOR non-SSE. 430 // On Intel we have to round all doubles (and most floats) at 431 // call sites by storing to the stack in any case. 432 // UseSSE=0 ==> Don't Use ==> 9999+0 433 // UseSSE=1 ==> Floats only ==> 9999+1 434 // UseSSE>=2 ==> Floats or doubles ==> 9999+2 435 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 }; 436 uint fargs = (UseSSE>=2) ? 2 : UseSSE; 437 uint freg_arg0 = 9999+fargs; 438 uint freg_arg1 = 9999+fargs; 439 440 // Pass doubles & longs aligned on the stack. First count stack slots for doubles 441 int i; 442 for( i = 0; i < total_args_passed; i++) { 443 if( sig_bt[i] == T_DOUBLE ) { 444 // first 2 doubles go in registers 445 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i; 446 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i; 447 else // Else double is passed low on the stack to be aligned. 448 stack += 2; 449 } else if( sig_bt[i] == T_LONG ) { 450 stack += 2; 451 } 452 } 453 int dstack = 0; // Separate counter for placing doubles 454 455 // Now pick where all else goes. 456 for( i = 0; i < total_args_passed; i++) { 457 // From the type and the argument number (count) compute the location 458 switch( sig_bt[i] ) { 459 case T_SHORT: 460 case T_CHAR: 461 case T_BYTE: 462 case T_BOOLEAN: 463 case T_INT: 464 case T_ARRAY: 465 case T_OBJECT: 466 case T_ADDRESS: 467 if( reg_arg0 == 9999 ) { 468 reg_arg0 = i; 469 regs[i].set1(rcx->as_VMReg()); 470 } else if( reg_arg1 == 9999 ) { 471 reg_arg1 = i; 472 regs[i].set1(rdx->as_VMReg()); 473 } else { 474 regs[i].set1(VMRegImpl::stack2reg(stack++)); 475 } 476 break; 477 case T_FLOAT: 478 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) { 479 freg_arg0 = i; 480 regs[i].set1(xmm0->as_VMReg()); 481 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) { 482 freg_arg1 = i; 483 regs[i].set1(xmm1->as_VMReg()); 484 } else { 485 regs[i].set1(VMRegImpl::stack2reg(stack++)); 486 } 487 break; 488 case T_LONG: 489 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" ); 490 regs[i].set2(VMRegImpl::stack2reg(dstack)); 491 dstack += 2; 492 break; 493 case T_DOUBLE: 494 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" ); 495 if( freg_arg0 == (uint)i ) { 496 regs[i].set2(xmm0->as_VMReg()); 497 } else if( freg_arg1 == (uint)i ) { 498 regs[i].set2(xmm1->as_VMReg()); 499 } else { 500 regs[i].set2(VMRegImpl::stack2reg(dstack)); 501 dstack += 2; 502 } 503 break; 504 case T_VOID: regs[i].set_bad(); break; 505 break; 506 default: 507 ShouldNotReachHere(); 508 break; 509 } 510 } 511 512 // return value can be odd number of VMRegImpl stack slots make multiple of 2 513 return align_up(stack, 2); 514 } 515 516 // Patch the callers callsite with entry to compiled code if it exists. 517 static void patch_callers_callsite(MacroAssembler *masm) { 518 Label L; 519 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); 520 __ jcc(Assembler::equal, L); 521 // Schedule the branch target address early. 522 // Call into the VM to patch the caller, then jump to compiled callee 523 // rax, isn't live so capture return address while we easily can 524 __ movptr(rax, Address(rsp, 0)); 525 __ pusha(); 526 __ pushf(); 527 528 if (UseSSE == 1) { 529 __ subptr(rsp, 2*wordSize); 530 __ movflt(Address(rsp, 0), xmm0); 531 __ movflt(Address(rsp, wordSize), xmm1); 532 } 533 if (UseSSE >= 2) { 534 __ subptr(rsp, 4*wordSize); 535 __ movdbl(Address(rsp, 0), xmm0); 536 __ movdbl(Address(rsp, 2*wordSize), xmm1); 537 } 538 #ifdef COMPILER2 539 // C2 may leave the stack dirty if not in SSE2+ mode 540 if (UseSSE >= 2) { 541 __ verify_FPU(0, "c2i transition should have clean FPU stack"); 542 } else { 543 __ empty_FPU_stack(); 544 } 545 #endif /* COMPILER2 */ 546 547 // VM needs caller's callsite 548 __ push(rax); 549 // VM needs target method 550 __ push(rbx); 551 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); 552 __ addptr(rsp, 2*wordSize); 553 554 if (UseSSE == 1) { 555 __ movflt(xmm0, Address(rsp, 0)); 556 __ movflt(xmm1, Address(rsp, wordSize)); 557 __ addptr(rsp, 2*wordSize); 558 } 559 if (UseSSE >= 2) { 560 __ movdbl(xmm0, Address(rsp, 0)); 561 __ movdbl(xmm1, Address(rsp, 2*wordSize)); 562 __ addptr(rsp, 4*wordSize); 563 } 564 565 __ popf(); 566 __ popa(); 567 __ bind(L); 568 } 569 570 571 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) { 572 int next_off = st_off - Interpreter::stackElementSize; 573 __ movdbl(Address(rsp, next_off), r); 574 } 575 576 static void gen_c2i_adapter(MacroAssembler *masm, 577 int total_args_passed, 578 int comp_args_on_stack, 579 const BasicType *sig_bt, 580 const VMRegPair *regs, 581 Label& skip_fixup) { 582 // Before we get into the guts of the C2I adapter, see if we should be here 583 // at all. We've come from compiled code and are attempting to jump to the 584 // interpreter, which means the caller made a static call to get here 585 // (vcalls always get a compiled target if there is one). Check for a 586 // compiled target. If there is one, we need to patch the caller's call. 587 patch_callers_callsite(masm); 588 589 __ bind(skip_fixup); 590 591 #ifdef COMPILER2 592 // C2 may leave the stack dirty if not in SSE2+ mode 593 if (UseSSE >= 2) { 594 __ verify_FPU(0, "c2i transition should have clean FPU stack"); 595 } else { 596 __ empty_FPU_stack(); 597 } 598 #endif /* COMPILER2 */ 599 600 // Since all args are passed on the stack, total_args_passed * interpreter_ 601 // stack_element_size is the 602 // space we need. 603 int extraspace = total_args_passed * Interpreter::stackElementSize; 604 605 // Get return address 606 __ pop(rax); 607 608 // set senderSP value 609 __ movptr(rsi, rsp); 610 611 __ subptr(rsp, extraspace); 612 613 // Now write the args into the outgoing interpreter space 614 for (int i = 0; i < total_args_passed; i++) { 615 if (sig_bt[i] == T_VOID) { 616 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 617 continue; 618 } 619 620 // st_off points to lowest address on stack. 621 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize; 622 int next_off = st_off - Interpreter::stackElementSize; 623 624 // Say 4 args: 625 // i st_off 626 // 0 12 T_LONG 627 // 1 8 T_VOID 628 // 2 4 T_OBJECT 629 // 3 0 T_BOOL 630 VMReg r_1 = regs[i].first(); 631 VMReg r_2 = regs[i].second(); 632 if (!r_1->is_valid()) { 633 assert(!r_2->is_valid(), ""); 634 continue; 635 } 636 637 if (r_1->is_stack()) { 638 // memory to memory use fpu stack top 639 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace; 640 641 if (!r_2->is_valid()) { 642 __ movl(rdi, Address(rsp, ld_off)); 643 __ movptr(Address(rsp, st_off), rdi); 644 } else { 645 646 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW 647 // st_off == MSW, st_off-wordSize == LSW 648 649 __ movptr(rdi, Address(rsp, ld_off)); 650 __ movptr(Address(rsp, next_off), rdi); 651 #ifndef _LP64 652 __ movptr(rdi, Address(rsp, ld_off + wordSize)); 653 __ movptr(Address(rsp, st_off), rdi); 654 #else 655 #ifdef ASSERT 656 // Overwrite the unused slot with known junk 657 __ mov64(rax, CONST64(0xdeadffffdeadaaaa)); 658 __ movptr(Address(rsp, st_off), rax); 659 #endif /* ASSERT */ 660 #endif // _LP64 661 } 662 } else if (r_1->is_Register()) { 663 Register r = r_1->as_Register(); 664 if (!r_2->is_valid()) { 665 __ movl(Address(rsp, st_off), r); 666 } else { 667 // long/double in gpr 668 NOT_LP64(ShouldNotReachHere()); 669 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG 670 // T_DOUBLE and T_LONG use two slots in the interpreter 671 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 672 // long/double in gpr 673 #ifdef ASSERT 674 // Overwrite the unused slot with known junk 675 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab))); 676 __ movptr(Address(rsp, st_off), rax); 677 #endif /* ASSERT */ 678 __ movptr(Address(rsp, next_off), r); 679 } else { 680 __ movptr(Address(rsp, st_off), r); 681 } 682 } 683 } else { 684 assert(r_1->is_XMMRegister(), ""); 685 if (!r_2->is_valid()) { 686 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister()); 687 } else { 688 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type"); 689 move_c2i_double(masm, r_1->as_XMMRegister(), st_off); 690 } 691 } 692 } 693 694 // Schedule the branch target address early. 695 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset()))); 696 // And repush original return address 697 __ push(rax); 698 __ jmp(rcx); 699 } 700 701 702 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) { 703 int next_val_off = ld_off - Interpreter::stackElementSize; 704 __ movdbl(r, Address(saved_sp, next_val_off)); 705 } 706 707 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, 708 address code_start, address code_end, 709 Label& L_ok) { 710 Label L_fail; 711 __ lea(temp_reg, ExternalAddress(code_start)); 712 __ cmpptr(pc_reg, temp_reg); 713 __ jcc(Assembler::belowEqual, L_fail); 714 __ lea(temp_reg, ExternalAddress(code_end)); 715 __ cmpptr(pc_reg, temp_reg); 716 __ jcc(Assembler::below, L_ok); 717 __ bind(L_fail); 718 } 719 720 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, 721 int total_args_passed, 722 int comp_args_on_stack, 723 const BasicType *sig_bt, 724 const VMRegPair *regs) { 725 // Note: rsi contains the senderSP on entry. We must preserve it since 726 // we may do a i2c -> c2i transition if we lose a race where compiled 727 // code goes non-entrant while we get args ready. 728 729 // Adapters can be frameless because they do not require the caller 730 // to perform additional cleanup work, such as correcting the stack pointer. 731 // An i2c adapter is frameless because the *caller* frame, which is interpreted, 732 // routinely repairs its own stack pointer (from interpreter_frame_last_sp), 733 // even if a callee has modified the stack pointer. 734 // A c2i adapter is frameless because the *callee* frame, which is interpreted, 735 // routinely repairs its caller's stack pointer (from sender_sp, which is set 736 // up via the senderSP register). 737 // In other words, if *either* the caller or callee is interpreted, we can 738 // get the stack pointer repaired after a call. 739 // This is why c2i and i2c adapters cannot be indefinitely composed. 740 // In particular, if a c2i adapter were to somehow call an i2c adapter, 741 // both caller and callee would be compiled methods, and neither would 742 // clean up the stack pointer changes performed by the two adapters. 743 // If this happens, control eventually transfers back to the compiled 744 // caller, but with an uncorrected stack, causing delayed havoc. 745 746 // Pick up the return address 747 __ movptr(rax, Address(rsp, 0)); 748 749 if (VerifyAdapterCalls && 750 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { 751 // So, let's test for cascading c2i/i2c adapters right now. 752 // assert(Interpreter::contains($return_addr) || 753 // StubRoutines::contains($return_addr), 754 // "i2c adapter must return to an interpreter frame"); 755 __ block_comment("verify_i2c { "); 756 Label L_ok; 757 if (Interpreter::code() != NULL) 758 range_check(masm, rax, rdi, 759 Interpreter::code()->code_start(), Interpreter::code()->code_end(), 760 L_ok); 761 if (StubRoutines::code1() != NULL) 762 range_check(masm, rax, rdi, 763 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), 764 L_ok); 765 if (StubRoutines::code2() != NULL) 766 range_check(masm, rax, rdi, 767 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), 768 L_ok); 769 const char* msg = "i2c adapter must return to an interpreter frame"; 770 __ block_comment(msg); 771 __ stop(msg); 772 __ bind(L_ok); 773 __ block_comment("} verify_i2ce "); 774 } 775 776 // Must preserve original SP for loading incoming arguments because 777 // we need to align the outgoing SP for compiled code. 778 __ movptr(rdi, rsp); 779 780 // Cut-out for having no stack args. Since up to 2 int/oop args are passed 781 // in registers, we will occasionally have no stack args. 782 int comp_words_on_stack = 0; 783 if (comp_args_on_stack) { 784 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in 785 // registers are below. By subtracting stack0, we either get a negative 786 // number (all values in registers) or the maximum stack slot accessed. 787 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg); 788 // Convert 4-byte stack slots to words. 789 comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord; 790 // Round up to miminum stack alignment, in wordSize 791 comp_words_on_stack = align_up(comp_words_on_stack, 2); 792 __ subptr(rsp, comp_words_on_stack * wordSize); 793 } 794 795 // Align the outgoing SP 796 __ andptr(rsp, -(StackAlignmentInBytes)); 797 798 // push the return address on the stack (note that pushing, rather 799 // than storing it, yields the correct frame alignment for the callee) 800 __ push(rax); 801 802 // Put saved SP in another register 803 const Register saved_sp = rax; 804 __ movptr(saved_sp, rdi); 805 806 807 // Will jump to the compiled code just as if compiled code was doing it. 808 // Pre-load the register-jump target early, to schedule it better. 809 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset()))); 810 811 // Now generate the shuffle code. Pick up all register args and move the 812 // rest through the floating point stack top. 813 for (int i = 0; i < total_args_passed; i++) { 814 if (sig_bt[i] == T_VOID) { 815 // Longs and doubles are passed in native word order, but misaligned 816 // in the 32-bit build. 817 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 818 continue; 819 } 820 821 // Pick up 0, 1 or 2 words from SP+offset. 822 823 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), 824 "scrambled load targets?"); 825 // Load in argument order going down. 826 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize; 827 // Point to interpreter value (vs. tag) 828 int next_off = ld_off - Interpreter::stackElementSize; 829 // 830 // 831 // 832 VMReg r_1 = regs[i].first(); 833 VMReg r_2 = regs[i].second(); 834 if (!r_1->is_valid()) { 835 assert(!r_2->is_valid(), ""); 836 continue; 837 } 838 if (r_1->is_stack()) { 839 // Convert stack slot to an SP offset (+ wordSize to account for return address ) 840 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize; 841 842 // We can use rsi as a temp here because compiled code doesn't need rsi as an input 843 // and if we end up going thru a c2i because of a miss a reasonable value of rsi 844 // we be generated. 845 if (!r_2->is_valid()) { 846 // __ fld_s(Address(saved_sp, ld_off)); 847 // __ fstp_s(Address(rsp, st_off)); 848 __ movl(rsi, Address(saved_sp, ld_off)); 849 __ movptr(Address(rsp, st_off), rsi); 850 } else { 851 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 852 // are accessed as negative so LSW is at LOW address 853 854 // ld_off is MSW so get LSW 855 // st_off is LSW (i.e. reg.first()) 856 // __ fld_d(Address(saved_sp, next_off)); 857 // __ fstp_d(Address(rsp, st_off)); 858 // 859 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE 860 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case 861 // So we must adjust where to pick up the data to match the interpreter. 862 // 863 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 864 // are accessed as negative so LSW is at LOW address 865 866 // ld_off is MSW so get LSW 867 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? 868 next_off : ld_off; 869 __ movptr(rsi, Address(saved_sp, offset)); 870 __ movptr(Address(rsp, st_off), rsi); 871 #ifndef _LP64 872 __ movptr(rsi, Address(saved_sp, ld_off)); 873 __ movptr(Address(rsp, st_off + wordSize), rsi); 874 #endif // _LP64 875 } 876 } else if (r_1->is_Register()) { // Register argument 877 Register r = r_1->as_Register(); 878 assert(r != rax, "must be different"); 879 if (r_2->is_valid()) { 880 // 881 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE 882 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case 883 // So we must adjust where to pick up the data to match the interpreter. 884 885 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? 886 next_off : ld_off; 887 888 // this can be a misaligned move 889 __ movptr(r, Address(saved_sp, offset)); 890 #ifndef _LP64 891 assert(r_2->as_Register() != rax, "need another temporary register"); 892 // Remember r_1 is low address (and LSB on x86) 893 // So r_2 gets loaded from high address regardless of the platform 894 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off)); 895 #endif // _LP64 896 } else { 897 __ movl(r, Address(saved_sp, ld_off)); 898 } 899 } else { 900 assert(r_1->is_XMMRegister(), ""); 901 if (!r_2->is_valid()) { 902 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off)); 903 } else { 904 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off); 905 } 906 } 907 } 908 909 // 6243940 We might end up in handle_wrong_method if 910 // the callee is deoptimized as we race thru here. If that 911 // happens we don't want to take a safepoint because the 912 // caller frame will look interpreted and arguments are now 913 // "compiled" so it is much better to make this transition 914 // invisible to the stack walking code. Unfortunately if 915 // we try and find the callee by normal means a safepoint 916 // is possible. So we stash the desired callee in the thread 917 // and the vm will find there should this case occur. 918 919 __ get_thread(rax); 920 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx); 921 922 // move Method* to rax, in case we end up in an c2i adapter. 923 // the c2i adapters expect Method* in rax, (c2) because c2's 924 // resolve stubs return the result (the method) in rax,. 925 // I'd love to fix this. 926 __ mov(rax, rbx); 927 928 __ jmp(rdi); 929 } 930 931 // --------------------------------------------------------------- 932 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, 933 int total_args_passed, 934 int comp_args_on_stack, 935 const BasicType *sig_bt, 936 const VMRegPair *regs, 937 AdapterFingerPrint* fingerprint) { 938 address i2c_entry = __ pc(); 939 940 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); 941 942 // ------------------------------------------------------------------------- 943 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls 944 // to the interpreter. The args start out packed in the compiled layout. They 945 // need to be unpacked into the interpreter layout. This will almost always 946 // require some stack space. We grow the current (compiled) stack, then repack 947 // the args. We finally end in a jump to the generic interpreter entry point. 948 // On exit from the interpreter, the interpreter will restore our SP (lest the 949 // compiled code, which relys solely on SP and not EBP, get sick). 950 951 address c2i_unverified_entry = __ pc(); 952 Label skip_fixup; 953 954 Register holder = rax; 955 Register receiver = rcx; 956 Register temp = rbx; 957 958 { 959 960 Label missed; 961 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes())); 962 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset())); 963 __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset())); 964 __ jcc(Assembler::notEqual, missed); 965 // Method might have been compiled since the call site was patched to 966 // interpreted if that is the case treat it as a miss so we can get 967 // the call site corrected. 968 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD); 969 __ jcc(Assembler::equal, skip_fixup); 970 971 __ bind(missed); 972 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 973 } 974 975 address c2i_entry = __ pc(); 976 977 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); 978 979 __ flush(); 980 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); 981 } 982 983 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, 984 VMRegPair *regs, 985 VMRegPair *regs2, 986 int total_args_passed) { 987 assert(regs2 == NULL, "not needed on x86"); 988 // We return the amount of VMRegImpl stack slots we need to reserve for all 989 // the arguments NOT counting out_preserve_stack_slots. 990 991 uint stack = 0; // All arguments on stack 992 993 for( int i = 0; i < total_args_passed; i++) { 994 // From the type and the argument number (count) compute the location 995 switch( sig_bt[i] ) { 996 case T_BOOLEAN: 997 case T_CHAR: 998 case T_FLOAT: 999 case T_BYTE: 1000 case T_SHORT: 1001 case T_INT: 1002 case T_OBJECT: 1003 case T_ARRAY: 1004 case T_ADDRESS: 1005 case T_METADATA: 1006 regs[i].set1(VMRegImpl::stack2reg(stack++)); 1007 break; 1008 case T_LONG: 1009 case T_DOUBLE: // The stack numbering is reversed from Java 1010 // Since C arguments do not get reversed, the ordering for 1011 // doubles on the stack must be opposite the Java convention 1012 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" ); 1013 regs[i].set2(VMRegImpl::stack2reg(stack)); 1014 stack += 2; 1015 break; 1016 case T_VOID: regs[i].set_bad(); break; 1017 default: 1018 ShouldNotReachHere(); 1019 break; 1020 } 1021 } 1022 return stack; 1023 } 1024 1025 // A simple move of integer like type 1026 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1027 if (src.first()->is_stack()) { 1028 if (dst.first()->is_stack()) { 1029 // stack to stack 1030 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5); 1031 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS); 1032 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first()))); 1033 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1034 } else { 1035 // stack to reg 1036 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first()))); 1037 } 1038 } else if (dst.first()->is_stack()) { 1039 // reg to stack 1040 // no need to sign extend on 64bit 1041 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register()); 1042 } else { 1043 if (dst.first() != src.first()) { 1044 __ mov(dst.first()->as_Register(), src.first()->as_Register()); 1045 } 1046 } 1047 } 1048 1049 // An oop arg. Must pass a handle not the oop itself 1050 static void object_move(MacroAssembler* masm, 1051 OopMap* map, 1052 int oop_handle_offset, 1053 int framesize_in_slots, 1054 VMRegPair src, 1055 VMRegPair dst, 1056 bool is_receiver, 1057 int* receiver_offset) { 1058 1059 // Because of the calling conventions we know that src can be a 1060 // register or a stack location. dst can only be a stack location. 1061 1062 assert(dst.first()->is_stack(), "must be stack"); 1063 // must pass a handle. First figure out the location we use as a handle 1064 1065 if (src.first()->is_stack()) { 1066 // Oop is already on the stack as an argument 1067 Register rHandle = rax; 1068 Label nil; 1069 __ xorptr(rHandle, rHandle); 1070 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD); 1071 __ jcc(Assembler::equal, nil); 1072 __ lea(rHandle, Address(rbp, reg2offset_in(src.first()))); 1073 __ bind(nil); 1074 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); 1075 1076 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 1077 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); 1078 if (is_receiver) { 1079 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; 1080 } 1081 } else { 1082 // Oop is in an a register we must store it to the space we reserve 1083 // on the stack for oop_handles 1084 const Register rOop = src.first()->as_Register(); 1085 const Register rHandle = rax; 1086 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset; 1087 int offset = oop_slot*VMRegImpl::stack_slot_size; 1088 Label skip; 1089 __ movptr(Address(rsp, offset), rOop); 1090 map->set_oop(VMRegImpl::stack2reg(oop_slot)); 1091 __ xorptr(rHandle, rHandle); 1092 __ cmpptr(rOop, (int32_t)NULL_WORD); 1093 __ jcc(Assembler::equal, skip); 1094 __ lea(rHandle, Address(rsp, offset)); 1095 __ bind(skip); 1096 // Store the handle parameter 1097 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle); 1098 if (is_receiver) { 1099 *receiver_offset = offset; 1100 } 1101 } 1102 } 1103 1104 // A float arg may have to do float reg int reg conversion 1105 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1106 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move"); 1107 1108 // Because of the calling convention we know that src is either a stack location 1109 // or an xmm register. dst can only be a stack location. 1110 1111 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters"); 1112 1113 if (src.first()->is_stack()) { 1114 __ movl(rax, Address(rbp, reg2offset_in(src.first()))); 1115 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1116 } else { 1117 // reg to stack 1118 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); 1119 } 1120 } 1121 1122 // A long move 1123 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1124 1125 // The only legal possibility for a long_move VMRegPair is: 1126 // 1: two stack slots (possibly unaligned) 1127 // as neither the java or C calling convention will use registers 1128 // for longs. 1129 1130 if (src.first()->is_stack() && dst.first()->is_stack()) { 1131 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack"); 1132 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); 1133 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); 1134 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1135 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); 1136 } else { 1137 ShouldNotReachHere(); 1138 } 1139 } 1140 1141 // A double move 1142 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1143 1144 // The only legal possibilities for a double_move VMRegPair are: 1145 // The painful thing here is that like long_move a VMRegPair might be 1146 1147 // Because of the calling convention we know that src is either 1148 // 1: a single physical register (xmm registers only) 1149 // 2: two stack slots (possibly unaligned) 1150 // dst can only be a pair of stack slots. 1151 1152 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args"); 1153 1154 if (src.first()->is_stack()) { 1155 // source is all stack 1156 __ movptr(rax, Address(rbp, reg2offset_in(src.first()))); 1157 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second())))); 1158 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax); 1159 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx)); 1160 } else { 1161 // reg to stack 1162 // No worries about stack alignment 1163 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister()); 1164 } 1165 } 1166 1167 1168 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1169 // We always ignore the frame_slots arg and just use the space just below frame pointer 1170 // which by this time is free to use 1171 switch (ret_type) { 1172 case T_FLOAT: 1173 __ fstp_s(Address(rbp, -wordSize)); 1174 break; 1175 case T_DOUBLE: 1176 __ fstp_d(Address(rbp, -2*wordSize)); 1177 break; 1178 case T_VOID: break; 1179 case T_LONG: 1180 __ movptr(Address(rbp, -wordSize), rax); 1181 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx)); 1182 break; 1183 default: { 1184 __ movptr(Address(rbp, -wordSize), rax); 1185 } 1186 } 1187 } 1188 1189 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1190 // We always ignore the frame_slots arg and just use the space just below frame pointer 1191 // which by this time is free to use 1192 switch (ret_type) { 1193 case T_FLOAT: 1194 __ fld_s(Address(rbp, -wordSize)); 1195 break; 1196 case T_DOUBLE: 1197 __ fld_d(Address(rbp, -2*wordSize)); 1198 break; 1199 case T_LONG: 1200 __ movptr(rax, Address(rbp, -wordSize)); 1201 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize))); 1202 break; 1203 case T_VOID: break; 1204 default: { 1205 __ movptr(rax, Address(rbp, -wordSize)); 1206 } 1207 } 1208 } 1209 1210 1211 static void save_or_restore_arguments(MacroAssembler* masm, 1212 const int stack_slots, 1213 const int total_in_args, 1214 const int arg_save_area, 1215 OopMap* map, 1216 VMRegPair* in_regs, 1217 BasicType* in_sig_bt) { 1218 // if map is non-NULL then the code should store the values, 1219 // otherwise it should load them. 1220 int handle_index = 0; 1221 // Save down double word first 1222 for ( int i = 0; i < total_in_args; i++) { 1223 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) { 1224 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; 1225 int offset = slot * VMRegImpl::stack_slot_size; 1226 handle_index += 2; 1227 assert(handle_index <= stack_slots, "overflow"); 1228 if (map != NULL) { 1229 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); 1230 } else { 1231 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); 1232 } 1233 } 1234 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) { 1235 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area; 1236 int offset = slot * VMRegImpl::stack_slot_size; 1237 handle_index += 2; 1238 assert(handle_index <= stack_slots, "overflow"); 1239 if (map != NULL) { 1240 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register()); 1241 if (in_regs[i].second()->is_Register()) { 1242 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register()); 1243 } 1244 } else { 1245 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset)); 1246 if (in_regs[i].second()->is_Register()) { 1247 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4)); 1248 } 1249 } 1250 } 1251 } 1252 // Save or restore single word registers 1253 for ( int i = 0; i < total_in_args; i++) { 1254 if (in_regs[i].first()->is_Register()) { 1255 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; 1256 int offset = slot * VMRegImpl::stack_slot_size; 1257 assert(handle_index <= stack_slots, "overflow"); 1258 if (in_sig_bt[i] == T_ARRAY && map != NULL) { 1259 map->set_oop(VMRegImpl::stack2reg(slot));; 1260 } 1261 1262 // Value is in an input register pass we must flush it to the stack 1263 const Register reg = in_regs[i].first()->as_Register(); 1264 switch (in_sig_bt[i]) { 1265 case T_ARRAY: 1266 if (map != NULL) { 1267 __ movptr(Address(rsp, offset), reg); 1268 } else { 1269 __ movptr(reg, Address(rsp, offset)); 1270 } 1271 break; 1272 case T_BOOLEAN: 1273 case T_CHAR: 1274 case T_BYTE: 1275 case T_SHORT: 1276 case T_INT: 1277 if (map != NULL) { 1278 __ movl(Address(rsp, offset), reg); 1279 } else { 1280 __ movl(reg, Address(rsp, offset)); 1281 } 1282 break; 1283 case T_OBJECT: 1284 default: ShouldNotReachHere(); 1285 } 1286 } else if (in_regs[i].first()->is_XMMRegister()) { 1287 if (in_sig_bt[i] == T_FLOAT) { 1288 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area; 1289 int offset = slot * VMRegImpl::stack_slot_size; 1290 assert(handle_index <= stack_slots, "overflow"); 1291 if (map != NULL) { 1292 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister()); 1293 } else { 1294 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset)); 1295 } 1296 } 1297 } else if (in_regs[i].first()->is_stack()) { 1298 if (in_sig_bt[i] == T_ARRAY && map != NULL) { 1299 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 1300 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots)); 1301 } 1302 } 1303 } 1304 } 1305 1306 // Registers need to be saved for runtime call 1307 static Register caller_saved_registers[] = { 1308 rcx, rdx, rsi, rdi 1309 }; 1310 1311 // Save caller saved registers except r1 and r2 1312 static void save_registers_except(MacroAssembler* masm, Register r1, Register r2) { 1313 int reg_len = (int)(sizeof(caller_saved_registers) / sizeof(Register)); 1314 for (int index = 0; index < reg_len; index ++) { 1315 Register this_reg = caller_saved_registers[index]; 1316 if (this_reg != r1 && this_reg != r2) { 1317 __ push(this_reg); 1318 } 1319 } 1320 } 1321 1322 // Restore caller saved registers except r1 and r2 1323 static void restore_registers_except(MacroAssembler* masm, Register r1, Register r2) { 1324 int reg_len = (int)(sizeof(caller_saved_registers) / sizeof(Register)); 1325 for (int index = reg_len - 1; index >= 0; index --) { 1326 Register this_reg = caller_saved_registers[index]; 1327 if (this_reg != r1 && this_reg != r2) { 1328 __ pop(this_reg); 1329 } 1330 } 1331 } 1332 1333 // Pin object, return pinned object or null in rax 1334 static void gen_pin_object(MacroAssembler* masm, 1335 Register thread, VMRegPair reg) { 1336 __ block_comment("gen_pin_object {"); 1337 1338 Label is_null; 1339 Register tmp_reg = rax; 1340 VMRegPair tmp(tmp_reg->as_VMReg()); 1341 if (reg.first()->is_stack()) { 1342 // Load the arg up from the stack 1343 simple_move32(masm, reg, tmp); 1344 reg = tmp; 1345 } else { 1346 __ movl(tmp_reg, reg.first()->as_Register()); 1347 } 1348 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); 1349 __ jccb(Assembler::equal, is_null); 1350 1351 // Save registers that may be used by runtime call 1352 Register arg = reg.first()->is_Register() ? reg.first()->as_Register() : noreg; 1353 save_registers_except(masm, arg, thread); 1354 1355 __ call_VM_leaf( 1356 CAST_FROM_FN_PTR(address, SharedRuntime::pin_object), 1357 thread, reg.first()->as_Register()); 1358 1359 // Restore saved registers 1360 restore_registers_except(masm, arg, thread); 1361 1362 __ bind(is_null); 1363 __ block_comment("} gen_pin_object"); 1364 } 1365 1366 // Unpin object 1367 static void gen_unpin_object(MacroAssembler* masm, 1368 Register thread, VMRegPair reg) { 1369 __ block_comment("gen_unpin_object {"); 1370 Label is_null; 1371 1372 // temp register 1373 __ push(rax); 1374 Register tmp_reg = rax; 1375 VMRegPair tmp(tmp_reg->as_VMReg()); 1376 1377 simple_move32(masm, reg, tmp); 1378 1379 __ testptr(rax, rax); 1380 __ jccb(Assembler::equal, is_null); 1381 1382 // Save registers that may be used by runtime call 1383 Register arg = reg.first()->is_Register() ? reg.first()->as_Register() : noreg; 1384 save_registers_except(masm, arg, thread); 1385 1386 __ call_VM_leaf( 1387 CAST_FROM_FN_PTR(address, SharedRuntime::unpin_object), 1388 thread, rax); 1389 1390 // Restore saved registers 1391 restore_registers_except(masm, arg, thread); 1392 __ bind(is_null); 1393 __ pop(rax); 1394 __ block_comment("} gen_unpin_object"); 1395 } 1396 1397 // Check GCLocker::needs_gc and enter the runtime if it's true. This 1398 // keeps a new JNI critical region from starting until a GC has been 1399 // forced. Save down any oops in registers and describe them in an 1400 // OopMap. 1401 static void check_needs_gc_for_critical_native(MacroAssembler* masm, 1402 Register thread, 1403 int stack_slots, 1404 int total_c_args, 1405 int total_in_args, 1406 int arg_save_area, 1407 OopMapSet* oop_maps, 1408 VMRegPair* in_regs, 1409 BasicType* in_sig_bt) { 1410 __ block_comment("check GCLocker::needs_gc"); 1411 Label cont; 1412 __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false); 1413 __ jcc(Assembler::equal, cont); 1414 1415 // Save down any incoming oops and call into the runtime to halt for a GC 1416 1417 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1418 1419 save_or_restore_arguments(masm, stack_slots, total_in_args, 1420 arg_save_area, map, in_regs, in_sig_bt); 1421 1422 address the_pc = __ pc(); 1423 oop_maps->add_gc_map( __ offset(), map); 1424 __ set_last_Java_frame(thread, rsp, noreg, the_pc); 1425 1426 __ block_comment("block_for_jni_critical"); 1427 __ push(thread); 1428 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical))); 1429 __ increment(rsp, wordSize); 1430 1431 __ get_thread(thread); 1432 __ reset_last_Java_frame(thread, false); 1433 1434 save_or_restore_arguments(masm, stack_slots, total_in_args, 1435 arg_save_area, NULL, in_regs, in_sig_bt); 1436 1437 __ bind(cont); 1438 #ifdef ASSERT 1439 if (StressCriticalJNINatives) { 1440 // Stress register saving 1441 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1442 save_or_restore_arguments(masm, stack_slots, total_in_args, 1443 arg_save_area, map, in_regs, in_sig_bt); 1444 // Destroy argument registers 1445 for (int i = 0; i < total_in_args - 1; i++) { 1446 if (in_regs[i].first()->is_Register()) { 1447 const Register reg = in_regs[i].first()->as_Register(); 1448 __ xorptr(reg, reg); 1449 } else if (in_regs[i].first()->is_XMMRegister()) { 1450 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister()); 1451 } else if (in_regs[i].first()->is_FloatRegister()) { 1452 ShouldNotReachHere(); 1453 } else if (in_regs[i].first()->is_stack()) { 1454 // Nothing to do 1455 } else { 1456 ShouldNotReachHere(); 1457 } 1458 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) { 1459 i++; 1460 } 1461 } 1462 1463 save_or_restore_arguments(masm, stack_slots, total_in_args, 1464 arg_save_area, NULL, in_regs, in_sig_bt); 1465 } 1466 #endif 1467 } 1468 1469 // Unpack an array argument into a pointer to the body and the length 1470 // if the array is non-null, otherwise pass 0 for both. 1471 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { 1472 Register tmp_reg = rax; 1473 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg, 1474 "possible collision"); 1475 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg, 1476 "possible collision"); 1477 1478 // Pass the length, ptr pair 1479 Label is_null, done; 1480 VMRegPair tmp(tmp_reg->as_VMReg()); 1481 if (reg.first()->is_stack()) { 1482 // Load the arg up from the stack 1483 simple_move32(masm, reg, tmp); 1484 reg = tmp; 1485 } 1486 __ testptr(reg.first()->as_Register(), reg.first()->as_Register()); 1487 __ jccb(Assembler::equal, is_null); 1488 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type))); 1489 simple_move32(masm, tmp, body_arg); 1490 // load the length relative to the body. 1491 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() - 1492 arrayOopDesc::base_offset_in_bytes(in_elem_type))); 1493 simple_move32(masm, tmp, length_arg); 1494 __ jmpb(done); 1495 __ bind(is_null); 1496 // Pass zeros 1497 __ xorptr(tmp_reg, tmp_reg); 1498 simple_move32(masm, tmp, body_arg); 1499 simple_move32(masm, tmp, length_arg); 1500 __ bind(done); 1501 } 1502 1503 static void verify_oop_args(MacroAssembler* masm, 1504 const methodHandle& method, 1505 const BasicType* sig_bt, 1506 const VMRegPair* regs) { 1507 Register temp_reg = rbx; // not part of any compiled calling seq 1508 if (VerifyOops) { 1509 for (int i = 0; i < method->size_of_parameters(); i++) { 1510 if (sig_bt[i] == T_OBJECT || 1511 sig_bt[i] == T_ARRAY) { 1512 VMReg r = regs[i].first(); 1513 assert(r->is_valid(), "bad oop arg"); 1514 if (r->is_stack()) { 1515 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1516 __ verify_oop(temp_reg); 1517 } else { 1518 __ verify_oop(r->as_Register()); 1519 } 1520 } 1521 } 1522 } 1523 } 1524 1525 static void gen_special_dispatch(MacroAssembler* masm, 1526 const methodHandle& method, 1527 const BasicType* sig_bt, 1528 const VMRegPair* regs) { 1529 verify_oop_args(masm, method, sig_bt, regs); 1530 vmIntrinsics::ID iid = method->intrinsic_id(); 1531 1532 // Now write the args into the outgoing interpreter space 1533 bool has_receiver = false; 1534 Register receiver_reg = noreg; 1535 int member_arg_pos = -1; 1536 Register member_reg = noreg; 1537 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); 1538 if (ref_kind != 0) { 1539 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument 1540 member_reg = rbx; // known to be free at this point 1541 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); 1542 } else if (iid == vmIntrinsics::_invokeBasic) { 1543 has_receiver = true; 1544 } else { 1545 fatal("unexpected intrinsic id %d", iid); 1546 } 1547 1548 if (member_reg != noreg) { 1549 // Load the member_arg into register, if necessary. 1550 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); 1551 VMReg r = regs[member_arg_pos].first(); 1552 if (r->is_stack()) { 1553 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1554 } else { 1555 // no data motion is needed 1556 member_reg = r->as_Register(); 1557 } 1558 } 1559 1560 if (has_receiver) { 1561 // Make sure the receiver is loaded into a register. 1562 assert(method->size_of_parameters() > 0, "oob"); 1563 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); 1564 VMReg r = regs[0].first(); 1565 assert(r->is_valid(), "bad receiver arg"); 1566 if (r->is_stack()) { 1567 // Porting note: This assumes that compiled calling conventions always 1568 // pass the receiver oop in a register. If this is not true on some 1569 // platform, pick a temp and load the receiver from stack. 1570 fatal("receiver always in a register"); 1571 receiver_reg = rcx; // known to be free at this point 1572 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize)); 1573 } else { 1574 // no data motion is needed 1575 receiver_reg = r->as_Register(); 1576 } 1577 } 1578 1579 // Figure out which address we are really jumping to: 1580 MethodHandles::generate_method_handle_dispatch(masm, iid, 1581 receiver_reg, member_reg, /*for_compiler_entry:*/ true); 1582 } 1583 1584 // --------------------------------------------------------------------------- 1585 // Generate a native wrapper for a given method. The method takes arguments 1586 // in the Java compiled code convention, marshals them to the native 1587 // convention (handlizes oops, etc), transitions to native, makes the call, 1588 // returns to java state (possibly blocking), unhandlizes any result and 1589 // returns. 1590 // 1591 // Critical native functions are a shorthand for the use of 1592 // GetPrimtiveArrayCritical and disallow the use of any other JNI 1593 // functions. The wrapper is expected to unpack the arguments before 1594 // passing them to the callee and perform checks before and after the 1595 // native call to ensure that they GCLocker 1596 // lock_critical/unlock_critical semantics are followed. Some other 1597 // parts of JNI setup are skipped like the tear down of the JNI handle 1598 // block and the check for pending exceptions it's impossible for them 1599 // to be thrown. 1600 // 1601 // They are roughly structured like this: 1602 // if (GCLocker::needs_gc()) 1603 // SharedRuntime::block_for_jni_critical(); 1604 // tranistion to thread_in_native 1605 // unpack arrray arguments and call native entry point 1606 // check for safepoint in progress 1607 // check if any thread suspend flags are set 1608 // call into JVM and possible unlock the JNI critical 1609 // if a GC was suppressed while in the critical native. 1610 // transition back to thread_in_Java 1611 // return to caller 1612 // 1613 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, 1614 const methodHandle& method, 1615 int compile_id, 1616 BasicType* in_sig_bt, 1617 VMRegPair* in_regs, 1618 BasicType ret_type, 1619 address critical_entry) { 1620 if (method->is_method_handle_intrinsic()) { 1621 vmIntrinsics::ID iid = method->intrinsic_id(); 1622 intptr_t start = (intptr_t)__ pc(); 1623 int vep_offset = ((intptr_t)__ pc()) - start; 1624 gen_special_dispatch(masm, 1625 method, 1626 in_sig_bt, 1627 in_regs); 1628 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period 1629 __ flush(); 1630 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually 1631 return nmethod::new_native_nmethod(method, 1632 compile_id, 1633 masm->code(), 1634 vep_offset, 1635 frame_complete, 1636 stack_slots / VMRegImpl::slots_per_word, 1637 in_ByteSize(-1), 1638 in_ByteSize(-1), 1639 (OopMapSet*)NULL); 1640 } 1641 bool is_critical_native = true; 1642 address native_func = critical_entry; 1643 if (native_func == NULL) { 1644 native_func = method->native_function(); 1645 is_critical_native = false; 1646 } 1647 assert(native_func != NULL, "must have function"); 1648 1649 // An OopMap for lock (and class if static) 1650 OopMapSet *oop_maps = new OopMapSet(); 1651 1652 // We have received a description of where all the java arg are located 1653 // on entry to the wrapper. We need to convert these args to where 1654 // the jni function will expect them. To figure out where they go 1655 // we convert the java signature to a C signature by inserting 1656 // the hidden arguments as arg[0] and possibly arg[1] (static method) 1657 1658 const int total_in_args = method->size_of_parameters(); 1659 int total_c_args = total_in_args; 1660 if (!is_critical_native) { 1661 total_c_args += 1; 1662 if (method->is_static()) { 1663 total_c_args++; 1664 } 1665 } else { 1666 for (int i = 0; i < total_in_args; i++) { 1667 if (in_sig_bt[i] == T_ARRAY) { 1668 total_c_args++; 1669 } 1670 } 1671 } 1672 1673 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); 1674 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1675 BasicType* in_elem_bt = NULL; 1676 1677 int argc = 0; 1678 if (!is_critical_native) { 1679 out_sig_bt[argc++] = T_ADDRESS; 1680 if (method->is_static()) { 1681 out_sig_bt[argc++] = T_OBJECT; 1682 } 1683 1684 for (int i = 0; i < total_in_args ; i++ ) { 1685 out_sig_bt[argc++] = in_sig_bt[i]; 1686 } 1687 } else { 1688 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); 1689 SignatureStream ss(method->signature()); 1690 for (int i = 0; i < total_in_args ; i++ ) { 1691 if (in_sig_bt[i] == T_ARRAY) { 1692 // Arrays are passed as int, elem* pair 1693 out_sig_bt[argc++] = T_INT; 1694 out_sig_bt[argc++] = T_ADDRESS; 1695 Symbol* atype = ss.as_symbol(); 1696 const char* at = atype->as_C_string(); 1697 if (strlen(at) == 2) { 1698 assert(at[0] == '[', "must be"); 1699 switch (at[1]) { 1700 case 'B': in_elem_bt[i] = T_BYTE; break; 1701 case 'C': in_elem_bt[i] = T_CHAR; break; 1702 case 'D': in_elem_bt[i] = T_DOUBLE; break; 1703 case 'F': in_elem_bt[i] = T_FLOAT; break; 1704 case 'I': in_elem_bt[i] = T_INT; break; 1705 case 'J': in_elem_bt[i] = T_LONG; break; 1706 case 'S': in_elem_bt[i] = T_SHORT; break; 1707 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; 1708 default: ShouldNotReachHere(); 1709 } 1710 } 1711 } else { 1712 out_sig_bt[argc++] = in_sig_bt[i]; 1713 in_elem_bt[i] = T_VOID; 1714 } 1715 if (in_sig_bt[i] != T_VOID) { 1716 assert(in_sig_bt[i] == ss.type(), "must match"); 1717 ss.next(); 1718 } 1719 } 1720 } 1721 1722 // Now figure out where the args must be stored and how much stack space 1723 // they require. 1724 int out_arg_slots; 1725 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); 1726 1727 // Compute framesize for the wrapper. We need to handlize all oops in 1728 // registers a max of 2 on x86. 1729 1730 // Calculate the total number of stack slots we will need. 1731 1732 // First count the abi requirement plus all of the outgoing args 1733 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; 1734 1735 // Now the space for the inbound oop handle area 1736 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers 1737 if (is_critical_native) { 1738 // Critical natives may have to call out so they need a save area 1739 // for register arguments. 1740 int double_slots = 0; 1741 int single_slots = 0; 1742 for ( int i = 0; i < total_in_args; i++) { 1743 if (in_regs[i].first()->is_Register()) { 1744 const Register reg = in_regs[i].first()->as_Register(); 1745 switch (in_sig_bt[i]) { 1746 case T_ARRAY: // critical array (uses 2 slots on LP64) 1747 case T_BOOLEAN: 1748 case T_BYTE: 1749 case T_SHORT: 1750 case T_CHAR: 1751 case T_INT: single_slots++; break; 1752 case T_LONG: double_slots++; break; 1753 default: ShouldNotReachHere(); 1754 } 1755 } else if (in_regs[i].first()->is_XMMRegister()) { 1756 switch (in_sig_bt[i]) { 1757 case T_FLOAT: single_slots++; break; 1758 case T_DOUBLE: double_slots++; break; 1759 default: ShouldNotReachHere(); 1760 } 1761 } else if (in_regs[i].first()->is_FloatRegister()) { 1762 ShouldNotReachHere(); 1763 } 1764 } 1765 total_save_slots = double_slots * 2 + single_slots; 1766 // align the save area 1767 if (double_slots != 0) { 1768 stack_slots = align_up(stack_slots, 2); 1769 } 1770 } 1771 1772 int oop_handle_offset = stack_slots; 1773 stack_slots += total_save_slots; 1774 1775 // Now any space we need for handlizing a klass if static method 1776 1777 int klass_slot_offset = 0; 1778 int klass_offset = -1; 1779 int lock_slot_offset = 0; 1780 bool is_static = false; 1781 1782 if (method->is_static()) { 1783 klass_slot_offset = stack_slots; 1784 stack_slots += VMRegImpl::slots_per_word; 1785 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; 1786 is_static = true; 1787 } 1788 1789 // Plus a lock if needed 1790 1791 if (method->is_synchronized()) { 1792 lock_slot_offset = stack_slots; 1793 stack_slots += VMRegImpl::slots_per_word; 1794 } 1795 1796 // Now a place (+2) to save return values or temp during shuffling 1797 // + 2 for return address (which we own) and saved rbp, 1798 stack_slots += 4; 1799 1800 // Ok The space we have allocated will look like: 1801 // 1802 // 1803 // FP-> | | 1804 // |---------------------| 1805 // | 2 slots for moves | 1806 // |---------------------| 1807 // | lock box (if sync) | 1808 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset) 1809 // | klass (if static) | 1810 // |---------------------| <- klass_slot_offset 1811 // | oopHandle area | 1812 // |---------------------| <- oop_handle_offset (a max of 2 registers) 1813 // | outbound memory | 1814 // | based arguments | 1815 // | | 1816 // |---------------------| 1817 // | | 1818 // SP-> | out_preserved_slots | 1819 // 1820 // 1821 // **************************************************************************** 1822 // WARNING - on Windows Java Natives use pascal calling convention and pop the 1823 // arguments off of the stack after the jni call. Before the call we can use 1824 // instructions that are SP relative. After the jni call we switch to FP 1825 // relative instructions instead of re-adjusting the stack on windows. 1826 // **************************************************************************** 1827 1828 1829 // Now compute actual number of stack words we need rounding to make 1830 // stack properly aligned. 1831 stack_slots = align_up(stack_slots, StackAlignmentInSlots); 1832 1833 int stack_size = stack_slots * VMRegImpl::stack_slot_size; 1834 1835 intptr_t start = (intptr_t)__ pc(); 1836 1837 // First thing make an ic check to see if we should even be here 1838 1839 // We are free to use all registers as temps without saving them and 1840 // restoring them except rbp. rbp is the only callee save register 1841 // as far as the interpreter and the compiler(s) are concerned. 1842 1843 1844 const Register ic_reg = rax; 1845 const Register receiver = rcx; 1846 Label hit; 1847 Label exception_pending; 1848 1849 __ verify_oop(receiver); 1850 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes())); 1851 __ jcc(Assembler::equal, hit); 1852 1853 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 1854 1855 // verified entry must be aligned for code patching. 1856 // and the first 5 bytes must be in the same cache line 1857 // if we align at 8 then we will be sure 5 bytes are in the same line 1858 __ align(8); 1859 1860 __ bind(hit); 1861 1862 int vep_offset = ((intptr_t)__ pc()) - start; 1863 1864 #ifdef COMPILER1 1865 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available. 1866 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) { 1867 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/); 1868 } 1869 #endif // COMPILER1 1870 1871 // The instruction at the verified entry point must be 5 bytes or longer 1872 // because it can be patched on the fly by make_non_entrant. The stack bang 1873 // instruction fits that requirement. 1874 1875 // Generate stack overflow check 1876 1877 if (UseStackBanging) { 1878 __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size()); 1879 } else { 1880 // need a 5 byte instruction to allow MT safe patching to non-entrant 1881 __ fat_nop(); 1882 } 1883 1884 // Generate a new frame for the wrapper. 1885 __ enter(); 1886 // -2 because return address is already present and so is saved rbp 1887 __ subptr(rsp, stack_size - 2*wordSize); 1888 1889 // Frame is now completed as far as size and linkage. 1890 int frame_complete = ((intptr_t)__ pc()) - start; 1891 1892 if (UseRTMLocking) { 1893 // Abort RTM transaction before calling JNI 1894 // because critical section will be large and will be 1895 // aborted anyway. Also nmethod could be deoptimized. 1896 __ xabort(0); 1897 } 1898 1899 // Calculate the difference between rsp and rbp,. We need to know it 1900 // after the native call because on windows Java Natives will pop 1901 // the arguments and it is painful to do rsp relative addressing 1902 // in a platform independent way. So after the call we switch to 1903 // rbp, relative addressing. 1904 1905 int fp_adjustment = stack_size - 2*wordSize; 1906 1907 #ifdef COMPILER2 1908 // C2 may leave the stack dirty if not in SSE2+ mode 1909 if (UseSSE >= 2) { 1910 __ verify_FPU(0, "c2i transition should have clean FPU stack"); 1911 } else { 1912 __ empty_FPU_stack(); 1913 } 1914 #endif /* COMPILER2 */ 1915 1916 // Compute the rbp, offset for any slots used after the jni call 1917 1918 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment; 1919 1920 // We use rdi as a thread pointer because it is callee save and 1921 // if we load it once it is usable thru the entire wrapper 1922 const Register thread = rdi; 1923 1924 // We use rsi as the oop handle for the receiver/klass 1925 // It is callee save so it survives the call to native 1926 1927 const Register oop_handle_reg = rsi; 1928 1929 __ get_thread(thread); 1930 1931 if (is_critical_native && !Universe::heap()->supports_object_pinning()) { 1932 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args, 1933 oop_handle_offset, oop_maps, in_regs, in_sig_bt); 1934 } 1935 1936 // 1937 // We immediately shuffle the arguments so that any vm call we have to 1938 // make from here on out (sync slow path, jvmti, etc.) we will have 1939 // captured the oops from our caller and have a valid oopMap for 1940 // them. 1941 1942 // ----------------- 1943 // The Grand Shuffle 1944 // 1945 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv* 1946 // and, if static, the class mirror instead of a receiver. This pretty much 1947 // guarantees that register layout will not match (and x86 doesn't use reg 1948 // parms though amd does). Since the native abi doesn't use register args 1949 // and the java conventions does we don't have to worry about collisions. 1950 // All of our moved are reg->stack or stack->stack. 1951 // We ignore the extra arguments during the shuffle and handle them at the 1952 // last moment. The shuffle is described by the two calling convention 1953 // vectors we have in our possession. We simply walk the java vector to 1954 // get the source locations and the c vector to get the destinations. 1955 1956 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 ); 1957 1958 // Record rsp-based slot for receiver on stack for non-static methods 1959 int receiver_offset = -1; 1960 1961 // This is a trick. We double the stack slots so we can claim 1962 // the oops in the caller's frame. Since we are sure to have 1963 // more args than the caller doubling is enough to make 1964 // sure we can capture all the incoming oop args from the 1965 // caller. 1966 // 1967 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1968 1969 // Inbound arguments that need to be pinned for critical natives 1970 GrowableArray<int> pinned_args(total_in_args); 1971 // Current stack slot for storing register based array argument 1972 int pinned_slot = oop_handle_offset; 1973 1974 // Mark location of rbp, 1975 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg()); 1976 1977 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx 1978 // Are free to temporaries if we have to do stack to steck moves. 1979 // All inbound args are referenced based on rbp, and all outbound args via rsp. 1980 1981 for (int i = 0; i < total_in_args ; i++, c_arg++ ) { 1982 switch (in_sig_bt[i]) { 1983 case T_ARRAY: 1984 if (is_critical_native) { 1985 VMRegPair in_arg = in_regs[i]; 1986 if (Universe::heap()->supports_object_pinning()) { 1987 gen_pin_object(masm, thread, in_arg); 1988 pinned_args.append(i); 1989 1990 // rax has pinned array 1991 VMRegPair result_reg(rax->as_VMReg()); 1992 if (!in_arg.first()->is_stack()) { 1993 assert(pinned_slot <= stack_slots, "overflow"); 1994 simple_move32(masm, result_reg, VMRegImpl::stack2reg(pinned_slot)); 1995 pinned_slot += VMRegImpl::slots_per_word; 1996 } else { 1997 // Write back pinned value, it will be used to unpin this argument 1998 __ movptr(Address(rbp, reg2offset_in(in_arg.first())), result_reg.first()->as_Register()); 1999 } 2000 // We have the array in register, use it 2001 in_arg = result_reg; 2002 } 2003 2004 unpack_array_argument(masm, in_arg, in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); 2005 c_arg++; 2006 break; 2007 } 2008 case T_OBJECT: 2009 assert(!is_critical_native, "no oop arguments"); 2010 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], 2011 ((i == 0) && (!is_static)), 2012 &receiver_offset); 2013 break; 2014 case T_VOID: 2015 break; 2016 2017 case T_FLOAT: 2018 float_move(masm, in_regs[i], out_regs[c_arg]); 2019 break; 2020 2021 case T_DOUBLE: 2022 assert( i + 1 < total_in_args && 2023 in_sig_bt[i + 1] == T_VOID && 2024 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); 2025 double_move(masm, in_regs[i], out_regs[c_arg]); 2026 break; 2027 2028 case T_LONG : 2029 long_move(masm, in_regs[i], out_regs[c_arg]); 2030 break; 2031 2032 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); 2033 2034 default: 2035 simple_move32(masm, in_regs[i], out_regs[c_arg]); 2036 } 2037 } 2038 2039 // Pre-load a static method's oop into rsi. Used both by locking code and 2040 // the normal JNI call code. 2041 if (method->is_static() && !is_critical_native) { 2042 2043 // load opp into a register 2044 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror())); 2045 2046 // Now handlize the static class mirror it's known not-null. 2047 __ movptr(Address(rsp, klass_offset), oop_handle_reg); 2048 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); 2049 2050 // Now get the handle 2051 __ lea(oop_handle_reg, Address(rsp, klass_offset)); 2052 // store the klass handle as second argument 2053 __ movptr(Address(rsp, wordSize), oop_handle_reg); 2054 } 2055 2056 // Change state to native (we save the return address in the thread, since it might not 2057 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() 2058 // points into the right code segment. It does not have to be the correct return pc. 2059 // We use the same pc/oopMap repeatedly when we call out 2060 2061 intptr_t the_pc = (intptr_t) __ pc(); 2062 oop_maps->add_gc_map(the_pc - start, map); 2063 2064 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc); 2065 2066 2067 // We have all of the arguments setup at this point. We must not touch any register 2068 // argument registers at this point (what if we save/restore them there are no oop? 2069 2070 { 2071 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); 2072 __ mov_metadata(rax, method()); 2073 __ call_VM_leaf( 2074 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), 2075 thread, rax); 2076 } 2077 2078 // RedefineClasses() tracing support for obsolete method entry 2079 if (log_is_enabled(Trace, redefine, class, obsolete)) { 2080 __ mov_metadata(rax, method()); 2081 __ call_VM_leaf( 2082 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), 2083 thread, rax); 2084 } 2085 2086 // These are register definitions we need for locking/unlocking 2087 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction 2088 const Register obj_reg = rcx; // Will contain the oop 2089 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock) 2090 2091 Label slow_path_lock; 2092 Label lock_done; 2093 2094 // Lock a synchronized method 2095 if (method->is_synchronized()) { 2096 assert(!is_critical_native, "unhandled"); 2097 2098 2099 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); 2100 2101 // Get the handle (the 2nd argument) 2102 __ movptr(oop_handle_reg, Address(rsp, wordSize)); 2103 2104 // Get address of the box 2105 2106 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset)); 2107 2108 // Load the oop from the handle 2109 __ movptr(obj_reg, Address(oop_handle_reg, 0)); 2110 2111 if (UseBiasedLocking) { 2112 // Note that oop_handle_reg is trashed during this call 2113 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock); 2114 } 2115 2116 // Load immediate 1 into swap_reg %rax, 2117 __ movptr(swap_reg, 1); 2118 2119 // Load (object->mark() | 1) into swap_reg %rax, 2120 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 2121 2122 // Save (object->mark() | 1) into BasicLock's displaced header 2123 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); 2124 2125 // src -> dest iff dest == rax, else rax, <- dest 2126 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg) 2127 __ lock(); 2128 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 2129 __ jcc(Assembler::equal, lock_done); 2130 2131 // Test if the oopMark is an obvious stack pointer, i.e., 2132 // 1) (mark & 3) == 0, and 2133 // 2) rsp <= mark < mark + os::pagesize() 2134 // These 3 tests can be done by evaluating the following 2135 // expression: ((mark - rsp) & (3 - os::vm_page_size())), 2136 // assuming both stack pointer and pagesize have their 2137 // least significant 2 bits clear. 2138 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg 2139 2140 __ subptr(swap_reg, rsp); 2141 __ andptr(swap_reg, 3 - os::vm_page_size()); 2142 2143 // Save the test result, for recursive case, the result is zero 2144 __ movptr(Address(lock_reg, mark_word_offset), swap_reg); 2145 __ jcc(Assembler::notEqual, slow_path_lock); 2146 // Slow path will re-enter here 2147 __ bind(lock_done); 2148 2149 if (UseBiasedLocking) { 2150 // Re-fetch oop_handle_reg as we trashed it above 2151 __ movptr(oop_handle_reg, Address(rsp, wordSize)); 2152 } 2153 } 2154 2155 2156 // Finally just about ready to make the JNI call 2157 2158 2159 // get JNIEnv* which is first argument to native 2160 if (!is_critical_native) { 2161 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset()))); 2162 __ movptr(Address(rsp, 0), rdx); 2163 } 2164 2165 // Now set thread in native 2166 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native); 2167 2168 __ call(RuntimeAddress(native_func)); 2169 2170 // Verify or restore cpu control state after JNI call 2171 __ restore_cpu_control_state_after_jni(); 2172 2173 // WARNING - on Windows Java Natives use pascal calling convention and pop the 2174 // arguments off of the stack. We could just re-adjust the stack pointer here 2175 // and continue to do SP relative addressing but we instead switch to FP 2176 // relative addressing. 2177 2178 // Unpack native results. 2179 switch (ret_type) { 2180 case T_BOOLEAN: __ c2bool(rax); break; 2181 case T_CHAR : __ andptr(rax, 0xFFFF); break; 2182 case T_BYTE : __ sign_extend_byte (rax); break; 2183 case T_SHORT : __ sign_extend_short(rax); break; 2184 case T_INT : /* nothing to do */ break; 2185 case T_DOUBLE : 2186 case T_FLOAT : 2187 // Result is in st0 we'll save as needed 2188 break; 2189 case T_ARRAY: // Really a handle 2190 case T_OBJECT: // Really a handle 2191 break; // can't de-handlize until after safepoint check 2192 case T_VOID: break; 2193 case T_LONG: break; 2194 default : ShouldNotReachHere(); 2195 } 2196 2197 // unpin pinned arguments 2198 pinned_slot = oop_handle_offset; 2199 if (pinned_args.length() > 0) { 2200 // save return value that may be overwritten otherwise. 2201 save_native_result(masm, ret_type, stack_slots); 2202 for (int index = 0; index < pinned_args.length(); index ++) { 2203 int i = pinned_args.at(index); 2204 assert(pinned_slot <= stack_slots, "overflow"); 2205 if (!in_regs[i].first()->is_stack()) { 2206 int offset = pinned_slot * VMRegImpl::stack_slot_size; 2207 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset)); 2208 pinned_slot += VMRegImpl::slots_per_word; 2209 } 2210 gen_unpin_object(masm, thread, in_regs[i]); 2211 } 2212 restore_native_result(masm, ret_type, stack_slots); 2213 } 2214 2215 // Switch thread to "native transition" state before reading the synchronization state. 2216 // This additional state is necessary because reading and testing the synchronization 2217 // state is not atomic w.r.t. GC, as this scenario demonstrates: 2218 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. 2219 // VM thread changes sync state to synchronizing and suspends threads for GC. 2220 // Thread A is resumed to finish this native method, but doesn't block here since it 2221 // didn't see any synchronization is progress, and escapes. 2222 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans); 2223 2224 // Force this write out before the read below 2225 __ membar(Assembler::Membar_mask_bits( 2226 Assembler::LoadLoad | Assembler::LoadStore | 2227 Assembler::StoreLoad | Assembler::StoreStore)); 2228 2229 if (AlwaysRestoreFPU) { 2230 // Make sure the control word is correct. 2231 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); 2232 } 2233 2234 Label after_transition; 2235 2236 // check for safepoint operation in progress and/or pending suspend requests 2237 { Label Continue, slow_path; 2238 2239 __ safepoint_poll(slow_path, thread, noreg); 2240 2241 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0); 2242 __ jcc(Assembler::equal, Continue); 2243 __ bind(slow_path); 2244 2245 // Don't use call_VM as it will see a possible pending exception and forward it 2246 // and never return here preventing us from clearing _last_native_pc down below. 2247 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are 2248 // preserved and correspond to the bcp/locals pointers. So we do a runtime call 2249 // by hand. 2250 // 2251 __ vzeroupper(); 2252 2253 save_native_result(masm, ret_type, stack_slots); 2254 __ push(thread); 2255 if (!is_critical_native) { 2256 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, 2257 JavaThread::check_special_condition_for_native_trans))); 2258 } else { 2259 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, 2260 JavaThread::check_special_condition_for_native_trans_and_transition))); 2261 } 2262 __ increment(rsp, wordSize); 2263 // Restore any method result value 2264 restore_native_result(masm, ret_type, stack_slots); 2265 2266 if (is_critical_native) { 2267 // The call above performed the transition to thread_in_Java so 2268 // skip the transition logic below. 2269 __ jmpb(after_transition); 2270 } 2271 2272 __ bind(Continue); 2273 } 2274 2275 // change thread state 2276 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java); 2277 __ bind(after_transition); 2278 2279 Label reguard; 2280 Label reguard_done; 2281 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled); 2282 __ jcc(Assembler::equal, reguard); 2283 2284 // slow path reguard re-enters here 2285 __ bind(reguard_done); 2286 2287 // Handle possible exception (will unlock if necessary) 2288 2289 // native result if any is live 2290 2291 // Unlock 2292 Label slow_path_unlock; 2293 Label unlock_done; 2294 if (method->is_synchronized()) { 2295 2296 Label done; 2297 2298 // Get locked oop from the handle we passed to jni 2299 __ movptr(obj_reg, Address(oop_handle_reg, 0)); 2300 2301 if (UseBiasedLocking) { 2302 __ biased_locking_exit(obj_reg, rbx, done); 2303 } 2304 2305 // Simple recursive lock? 2306 2307 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD); 2308 __ jcc(Assembler::equal, done); 2309 2310 // Must save rax, if if it is live now because cmpxchg must use it 2311 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2312 save_native_result(masm, ret_type, stack_slots); 2313 } 2314 2315 // get old displaced header 2316 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset)); 2317 2318 // get address of the stack lock 2319 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); 2320 2321 // Atomic swap old header if oop still contains the stack lock 2322 // src -> dest iff dest == rax, else rax, <- dest 2323 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg) 2324 __ lock(); 2325 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 2326 __ jcc(Assembler::notEqual, slow_path_unlock); 2327 2328 // slow path re-enters here 2329 __ bind(unlock_done); 2330 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2331 restore_native_result(masm, ret_type, stack_slots); 2332 } 2333 2334 __ bind(done); 2335 2336 } 2337 2338 { 2339 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0); 2340 // Tell dtrace about this method exit 2341 save_native_result(masm, ret_type, stack_slots); 2342 __ mov_metadata(rax, method()); 2343 __ call_VM_leaf( 2344 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), 2345 thread, rax); 2346 restore_native_result(masm, ret_type, stack_slots); 2347 } 2348 2349 // We can finally stop using that last_Java_frame we setup ages ago 2350 2351 __ reset_last_Java_frame(thread, false); 2352 2353 // Unbox oop result, e.g. JNIHandles::resolve value. 2354 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { 2355 __ resolve_jobject(rax /* value */, 2356 thread /* thread */, 2357 rcx /* tmp */); 2358 } 2359 2360 if (CheckJNICalls) { 2361 // clear_pending_jni_exception_check 2362 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD); 2363 } 2364 2365 if (!is_critical_native) { 2366 // reset handle block 2367 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset())); 2368 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD); 2369 2370 // Any exception pending? 2371 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); 2372 __ jcc(Assembler::notEqual, exception_pending); 2373 } 2374 2375 // no exception, we're almost done 2376 2377 // check that only result value is on FPU stack 2378 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit"); 2379 2380 // Fixup floating pointer results so that result looks like a return from a compiled method 2381 if (ret_type == T_FLOAT) { 2382 if (UseSSE >= 1) { 2383 // Pop st0 and store as float and reload into xmm register 2384 __ fstp_s(Address(rbp, -4)); 2385 __ movflt(xmm0, Address(rbp, -4)); 2386 } 2387 } else if (ret_type == T_DOUBLE) { 2388 if (UseSSE >= 2) { 2389 // Pop st0 and store as double and reload into xmm register 2390 __ fstp_d(Address(rbp, -8)); 2391 __ movdbl(xmm0, Address(rbp, -8)); 2392 } 2393 } 2394 2395 // Return 2396 2397 __ leave(); 2398 __ ret(0); 2399 2400 // Unexpected paths are out of line and go here 2401 2402 // Slow path locking & unlocking 2403 if (method->is_synchronized()) { 2404 2405 // BEGIN Slow path lock 2406 2407 __ bind(slow_path_lock); 2408 2409 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM 2410 // args are (oop obj, BasicLock* lock, JavaThread* thread) 2411 __ push(thread); 2412 __ push(lock_reg); 2413 __ push(obj_reg); 2414 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C))); 2415 __ addptr(rsp, 3*wordSize); 2416 2417 #ifdef ASSERT 2418 { Label L; 2419 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD); 2420 __ jcc(Assembler::equal, L); 2421 __ stop("no pending exception allowed on exit from monitorenter"); 2422 __ bind(L); 2423 } 2424 #endif 2425 __ jmp(lock_done); 2426 2427 // END Slow path lock 2428 2429 // BEGIN Slow path unlock 2430 __ bind(slow_path_unlock); 2431 __ vzeroupper(); 2432 // Slow path unlock 2433 2434 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2435 save_native_result(masm, ret_type, stack_slots); 2436 } 2437 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) 2438 2439 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); 2440 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD); 2441 2442 2443 // should be a peal 2444 // +wordSize because of the push above 2445 // args are (oop obj, BasicLock* lock, JavaThread* thread) 2446 __ push(thread); 2447 __ lea(rax, Address(rbp, lock_slot_rbp_offset)); 2448 __ push(rax); 2449 2450 __ push(obj_reg); 2451 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C))); 2452 __ addptr(rsp, 3*wordSize); 2453 #ifdef ASSERT 2454 { 2455 Label L; 2456 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD); 2457 __ jcc(Assembler::equal, L); 2458 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); 2459 __ bind(L); 2460 } 2461 #endif /* ASSERT */ 2462 2463 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset()))); 2464 2465 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2466 restore_native_result(masm, ret_type, stack_slots); 2467 } 2468 __ jmp(unlock_done); 2469 // END Slow path unlock 2470 2471 } 2472 2473 // SLOW PATH Reguard the stack if needed 2474 2475 __ bind(reguard); 2476 __ vzeroupper(); 2477 save_native_result(masm, ret_type, stack_slots); 2478 { 2479 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages))); 2480 } 2481 restore_native_result(masm, ret_type, stack_slots); 2482 __ jmp(reguard_done); 2483 2484 2485 // BEGIN EXCEPTION PROCESSING 2486 2487 if (!is_critical_native) { 2488 // Forward the exception 2489 __ bind(exception_pending); 2490 2491 // remove possible return value from FPU register stack 2492 __ empty_FPU_stack(); 2493 2494 // pop our frame 2495 __ leave(); 2496 // and forward the exception 2497 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2498 } 2499 2500 __ flush(); 2501 2502 nmethod *nm = nmethod::new_native_nmethod(method, 2503 compile_id, 2504 masm->code(), 2505 vep_offset, 2506 frame_complete, 2507 stack_slots / VMRegImpl::slots_per_word, 2508 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), 2509 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), 2510 oop_maps); 2511 2512 if (is_critical_native) { 2513 nm->set_lazy_critical_native(true); 2514 } 2515 2516 return nm; 2517 2518 } 2519 2520 // this function returns the adjust size (in number of words) to a c2i adapter 2521 // activation for use during deoptimization 2522 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) { 2523 return (callee_locals - callee_parameters) * Interpreter::stackElementWords; 2524 } 2525 2526 2527 uint SharedRuntime::out_preserve_stack_slots() { 2528 return 0; 2529 } 2530 2531 //------------------------------generate_deopt_blob---------------------------- 2532 void SharedRuntime::generate_deopt_blob() { 2533 // allocate space for the code 2534 ResourceMark rm; 2535 // setup code generation tools 2536 // note: the buffer code size must account for StackShadowPages=50 2537 CodeBuffer buffer("deopt_blob", 1536, 1024); 2538 MacroAssembler* masm = new MacroAssembler(&buffer); 2539 int frame_size_in_words; 2540 OopMap* map = NULL; 2541 // Account for the extra args we place on the stack 2542 // by the time we call fetch_unroll_info 2543 const int additional_words = 2; // deopt kind, thread 2544 2545 OopMapSet *oop_maps = new OopMapSet(); 2546 2547 // ------------- 2548 // This code enters when returning to a de-optimized nmethod. A return 2549 // address has been pushed on the the stack, and return values are in 2550 // registers. 2551 // If we are doing a normal deopt then we were called from the patched 2552 // nmethod from the point we returned to the nmethod. So the return 2553 // address on the stack is wrong by NativeCall::instruction_size 2554 // We will adjust the value to it looks like we have the original return 2555 // address on the stack (like when we eagerly deoptimized). 2556 // In the case of an exception pending with deoptimized then we enter 2557 // with a return address on the stack that points after the call we patched 2558 // into the exception handler. We have the following register state: 2559 // rax,: exception 2560 // rbx,: exception handler 2561 // rdx: throwing pc 2562 // So in this case we simply jam rdx into the useless return address and 2563 // the stack looks just like we want. 2564 // 2565 // At this point we need to de-opt. We save the argument return 2566 // registers. We call the first C routine, fetch_unroll_info(). This 2567 // routine captures the return values and returns a structure which 2568 // describes the current frame size and the sizes of all replacement frames. 2569 // The current frame is compiled code and may contain many inlined 2570 // functions, each with their own JVM state. We pop the current frame, then 2571 // push all the new frames. Then we call the C routine unpack_frames() to 2572 // populate these frames. Finally unpack_frames() returns us the new target 2573 // address. Notice that callee-save registers are BLOWN here; they have 2574 // already been captured in the vframeArray at the time the return PC was 2575 // patched. 2576 address start = __ pc(); 2577 Label cont; 2578 2579 // Prolog for non exception case! 2580 2581 // Save everything in sight. 2582 2583 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); 2584 // Normal deoptimization 2585 __ push(Deoptimization::Unpack_deopt); 2586 __ jmp(cont); 2587 2588 int reexecute_offset = __ pc() - start; 2589 2590 // Reexecute case 2591 // return address is the pc describes what bci to do re-execute at 2592 2593 // No need to update map as each call to save_live_registers will produce identical oopmap 2594 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); 2595 2596 __ push(Deoptimization::Unpack_reexecute); 2597 __ jmp(cont); 2598 2599 int exception_offset = __ pc() - start; 2600 2601 // Prolog for exception case 2602 2603 // all registers are dead at this entry point, except for rax, and 2604 // rdx which contain the exception oop and exception pc 2605 // respectively. Set them in TLS and fall thru to the 2606 // unpack_with_exception_in_tls entry point. 2607 2608 __ get_thread(rdi); 2609 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx); 2610 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax); 2611 2612 int exception_in_tls_offset = __ pc() - start; 2613 2614 // new implementation because exception oop is now passed in JavaThread 2615 2616 // Prolog for exception case 2617 // All registers must be preserved because they might be used by LinearScan 2618 // Exceptiop oop and throwing PC are passed in JavaThread 2619 // tos: stack at point of call to method that threw the exception (i.e. only 2620 // args are on the stack, no return address) 2621 2622 // make room on stack for the return address 2623 // It will be patched later with the throwing pc. The correct value is not 2624 // available now because loading it from memory would destroy registers. 2625 __ push(0); 2626 2627 // Save everything in sight. 2628 2629 // No need to update map as each call to save_live_registers will produce identical oopmap 2630 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false); 2631 2632 // Now it is safe to overwrite any register 2633 2634 // store the correct deoptimization type 2635 __ push(Deoptimization::Unpack_exception); 2636 2637 // load throwing pc from JavaThread and patch it as the return address 2638 // of the current frame. Then clear the field in JavaThread 2639 __ get_thread(rdi); 2640 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset())); 2641 __ movptr(Address(rbp, wordSize), rdx); 2642 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD); 2643 2644 #ifdef ASSERT 2645 // verify that there is really an exception oop in JavaThread 2646 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset())); 2647 __ verify_oop(rax); 2648 2649 // verify that there is no pending exception 2650 Label no_pending_exception; 2651 __ movptr(rax, Address(rdi, Thread::pending_exception_offset())); 2652 __ testptr(rax, rax); 2653 __ jcc(Assembler::zero, no_pending_exception); 2654 __ stop("must not have pending exception here"); 2655 __ bind(no_pending_exception); 2656 #endif 2657 2658 __ bind(cont); 2659 2660 // Compiled code leaves the floating point stack dirty, empty it. 2661 __ empty_FPU_stack(); 2662 2663 2664 // Call C code. Need thread and this frame, but NOT official VM entry 2665 // crud. We cannot block on this call, no GC can happen. 2666 __ get_thread(rcx); 2667 __ push(rcx); 2668 // fetch_unroll_info needs to call last_java_frame() 2669 __ set_last_Java_frame(rcx, noreg, noreg, NULL); 2670 2671 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); 2672 2673 // Need to have an oopmap that tells fetch_unroll_info where to 2674 // find any register it might need. 2675 2676 oop_maps->add_gc_map( __ pc()-start, map); 2677 2678 // Discard args to fetch_unroll_info 2679 __ pop(rcx); 2680 __ pop(rcx); 2681 2682 __ get_thread(rcx); 2683 __ reset_last_Java_frame(rcx, false); 2684 2685 // Load UnrollBlock into EDI 2686 __ mov(rdi, rax); 2687 2688 // Move the unpack kind to a safe place in the UnrollBlock because 2689 // we are very short of registers 2690 2691 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()); 2692 // retrieve the deopt kind from the UnrollBlock. 2693 __ movl(rax, unpack_kind); 2694 2695 Label noException; 2696 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending? 2697 __ jcc(Assembler::notEqual, noException); 2698 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset())); 2699 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset())); 2700 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD); 2701 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD); 2702 2703 __ verify_oop(rax); 2704 2705 // Overwrite the result registers with the exception results. 2706 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); 2707 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); 2708 2709 __ bind(noException); 2710 2711 // Stack is back to only having register save data on the stack. 2712 // Now restore the result registers. Everything else is either dead or captured 2713 // in the vframeArray. 2714 2715 RegisterSaver::restore_result_registers(masm); 2716 2717 // Non standard control word may be leaked out through a safepoint blob, and we can 2718 // deopt at a poll point with the non standard control word. However, we should make 2719 // sure the control word is correct after restore_result_registers. 2720 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std())); 2721 2722 // All of the register save area has been popped of the stack. Only the 2723 // return address remains. 2724 2725 // Pop all the frames we must move/replace. 2726 // 2727 // Frame picture (youngest to oldest) 2728 // 1: self-frame (no frame link) 2729 // 2: deopting frame (no frame link) 2730 // 3: caller of deopting frame (could be compiled/interpreted). 2731 // 2732 // Note: by leaving the return address of self-frame on the stack 2733 // and using the size of frame 2 to adjust the stack 2734 // when we are done the return to frame 3 will still be on the stack. 2735 2736 // Pop deoptimized frame 2737 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); 2738 2739 // sp should be pointing at the return address to the caller (3) 2740 2741 // Pick up the initial fp we should save 2742 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) 2743 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); 2744 2745 #ifdef ASSERT 2746 // Compilers generate code that bang the stack by as much as the 2747 // interpreter would need. So this stack banging should never 2748 // trigger a fault. Verify that it does not on non product builds. 2749 if (UseStackBanging) { 2750 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); 2751 __ bang_stack_size(rbx, rcx); 2752 } 2753 #endif 2754 2755 // Load array of frame pcs into ECX 2756 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); 2757 2758 __ pop(rsi); // trash the old pc 2759 2760 // Load array of frame sizes into ESI 2761 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); 2762 2763 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); 2764 2765 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); 2766 __ movl(counter, rbx); 2767 2768 // Now adjust the caller's stack to make up for the extra locals 2769 // but record the original sp so that we can save it in the skeletal interpreter 2770 // frame and the stack walking of interpreter_sender will get the unextended sp 2771 // value and not the "real" sp value. 2772 2773 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); 2774 __ movptr(sp_temp, rsp); 2775 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); 2776 __ subptr(rsp, rbx); 2777 2778 // Push interpreter frames in a loop 2779 Label loop; 2780 __ bind(loop); 2781 __ movptr(rbx, Address(rsi, 0)); // Load frame size 2782 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand 2783 __ pushptr(Address(rcx, 0)); // save return address 2784 __ enter(); // save old & set new rbp, 2785 __ subptr(rsp, rbx); // Prolog! 2786 __ movptr(rbx, sp_temp); // sender's sp 2787 // This value is corrected by layout_activation_impl 2788 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD); 2789 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable 2790 __ movptr(sp_temp, rsp); // pass to next frame 2791 __ addptr(rsi, wordSize); // Bump array pointer (sizes) 2792 __ addptr(rcx, wordSize); // Bump array pointer (pcs) 2793 __ decrementl(counter); // decrement counter 2794 __ jcc(Assembler::notZero, loop); 2795 __ pushptr(Address(rcx, 0)); // save final return address 2796 2797 // Re-push self-frame 2798 __ enter(); // save old & set new rbp, 2799 2800 // Return address and rbp, are in place 2801 // We'll push additional args later. Just allocate a full sized 2802 // register save area 2803 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize); 2804 2805 // Restore frame locals after moving the frame 2806 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax); 2807 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx); 2808 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local 2809 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); 2810 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0); 2811 2812 // Set up the args to unpack_frame 2813 2814 __ pushl(unpack_kind); // get the unpack_kind value 2815 __ get_thread(rcx); 2816 __ push(rcx); 2817 2818 // set last_Java_sp, last_Java_fp 2819 __ set_last_Java_frame(rcx, noreg, rbp, NULL); 2820 2821 // Call C code. Need thread but NOT official VM entry 2822 // crud. We cannot block on this call, no GC can happen. Call should 2823 // restore return values to their stack-slots with the new SP. 2824 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2825 // Set an oopmap for the call site 2826 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 )); 2827 2828 // rax, contains the return result type 2829 __ push(rax); 2830 2831 __ get_thread(rcx); 2832 __ reset_last_Java_frame(rcx, false); 2833 2834 // Collect return values 2835 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize)); 2836 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize)); 2837 2838 // Clear floating point stack before returning to interpreter 2839 __ empty_FPU_stack(); 2840 2841 // Check if we should push the float or double return value. 2842 Label results_done, yes_double_value; 2843 __ cmpl(Address(rsp, 0), T_DOUBLE); 2844 __ jcc (Assembler::zero, yes_double_value); 2845 __ cmpl(Address(rsp, 0), T_FLOAT); 2846 __ jcc (Assembler::notZero, results_done); 2847 2848 // return float value as expected by interpreter 2849 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); 2850 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); 2851 __ jmp(results_done); 2852 2853 // return double value as expected by interpreter 2854 __ bind(yes_double_value); 2855 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize)); 2856 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize)); 2857 2858 __ bind(results_done); 2859 2860 // Pop self-frame. 2861 __ leave(); // Epilog! 2862 2863 // Jump to interpreter 2864 __ ret(0); 2865 2866 // ------------- 2867 // make sure all code is generated 2868 masm->flush(); 2869 2870 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); 2871 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); 2872 } 2873 2874 2875 #ifdef COMPILER2 2876 //------------------------------generate_uncommon_trap_blob-------------------- 2877 void SharedRuntime::generate_uncommon_trap_blob() { 2878 // allocate space for the code 2879 ResourceMark rm; 2880 // setup code generation tools 2881 CodeBuffer buffer("uncommon_trap_blob", 512, 512); 2882 MacroAssembler* masm = new MacroAssembler(&buffer); 2883 2884 enum frame_layout { 2885 arg0_off, // thread sp + 0 // Arg location for 2886 arg1_off, // unloaded_class_index sp + 1 // calling C 2887 arg2_off, // exec_mode sp + 2 2888 // The frame sender code expects that rbp will be in the "natural" place and 2889 // will override any oopMap setting for it. We must therefore force the layout 2890 // so that it agrees with the frame sender code. 2891 rbp_off, // callee saved register sp + 3 2892 return_off, // slot for return address sp + 4 2893 framesize 2894 }; 2895 2896 address start = __ pc(); 2897 2898 if (UseRTMLocking) { 2899 // Abort RTM transaction before possible nmethod deoptimization. 2900 __ xabort(0); 2901 } 2902 2903 // Push self-frame. 2904 __ subptr(rsp, return_off*wordSize); // Epilog! 2905 2906 // rbp, is an implicitly saved callee saved register (i.e. the calling 2907 // convention will save restore it in prolog/epilog) Other than that 2908 // there are no callee save registers no that adapter frames are gone. 2909 __ movptr(Address(rsp, rbp_off*wordSize), rbp); 2910 2911 // Clear the floating point exception stack 2912 __ empty_FPU_stack(); 2913 2914 // set last_Java_sp 2915 __ get_thread(rdx); 2916 __ set_last_Java_frame(rdx, noreg, noreg, NULL); 2917 2918 // Call C code. Need thread but NOT official VM entry 2919 // crud. We cannot block on this call, no GC can happen. Call should 2920 // capture callee-saved registers as well as return values. 2921 __ movptr(Address(rsp, arg0_off*wordSize), rdx); 2922 // argument already in ECX 2923 __ movl(Address(rsp, arg1_off*wordSize),rcx); 2924 __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap); 2925 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap))); 2926 2927 // Set an oopmap for the call site 2928 OopMapSet *oop_maps = new OopMapSet(); 2929 OopMap* map = new OopMap( framesize, 0 ); 2930 // No oopMap for rbp, it is known implicitly 2931 2932 oop_maps->add_gc_map( __ pc()-start, map); 2933 2934 __ get_thread(rcx); 2935 2936 __ reset_last_Java_frame(rcx, false); 2937 2938 // Load UnrollBlock into EDI 2939 __ movptr(rdi, rax); 2940 2941 #ifdef ASSERT 2942 { Label L; 2943 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()), 2944 (int32_t)Deoptimization::Unpack_uncommon_trap); 2945 __ jcc(Assembler::equal, L); 2946 __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap"); 2947 __ bind(L); 2948 } 2949 #endif 2950 2951 // Pop all the frames we must move/replace. 2952 // 2953 // Frame picture (youngest to oldest) 2954 // 1: self-frame (no frame link) 2955 // 2: deopting frame (no frame link) 2956 // 3: caller of deopting frame (could be compiled/interpreted). 2957 2958 // Pop self-frame. We have no frame, and must rely only on EAX and ESP. 2959 __ addptr(rsp,(framesize-1)*wordSize); // Epilog! 2960 2961 // Pop deoptimized frame 2962 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); 2963 __ addptr(rsp, rcx); 2964 2965 // sp should be pointing at the return address to the caller (3) 2966 2967 // Pick up the initial fp we should save 2968 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved) 2969 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes())); 2970 2971 #ifdef ASSERT 2972 // Compilers generate code that bang the stack by as much as the 2973 // interpreter would need. So this stack banging should never 2974 // trigger a fault. Verify that it does not on non product builds. 2975 if (UseStackBanging) { 2976 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); 2977 __ bang_stack_size(rbx, rcx); 2978 } 2979 #endif 2980 2981 // Load array of frame pcs into ECX 2982 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); 2983 2984 __ pop(rsi); // trash the pc 2985 2986 // Load array of frame sizes into ESI 2987 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); 2988 2989 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes()); 2990 2991 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); 2992 __ movl(counter, rbx); 2993 2994 // Now adjust the caller's stack to make up for the extra locals 2995 // but record the original sp so that we can save it in the skeletal interpreter 2996 // frame and the stack walking of interpreter_sender will get the unextended sp 2997 // value and not the "real" sp value. 2998 2999 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes()); 3000 __ movptr(sp_temp, rsp); 3001 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes())); 3002 __ subptr(rsp, rbx); 3003 3004 // Push interpreter frames in a loop 3005 Label loop; 3006 __ bind(loop); 3007 __ movptr(rbx, Address(rsi, 0)); // Load frame size 3008 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand 3009 __ pushptr(Address(rcx, 0)); // save return address 3010 __ enter(); // save old & set new rbp, 3011 __ subptr(rsp, rbx); // Prolog! 3012 __ movptr(rbx, sp_temp); // sender's sp 3013 // This value is corrected by layout_activation_impl 3014 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD ); 3015 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable 3016 __ movptr(sp_temp, rsp); // pass to next frame 3017 __ addptr(rsi, wordSize); // Bump array pointer (sizes) 3018 __ addptr(rcx, wordSize); // Bump array pointer (pcs) 3019 __ decrementl(counter); // decrement counter 3020 __ jcc(Assembler::notZero, loop); 3021 __ pushptr(Address(rcx, 0)); // save final return address 3022 3023 // Re-push self-frame 3024 __ enter(); // save old & set new rbp, 3025 __ subptr(rsp, (framesize-2) * wordSize); // Prolog! 3026 3027 3028 // set last_Java_sp, last_Java_fp 3029 __ get_thread(rdi); 3030 __ set_last_Java_frame(rdi, noreg, rbp, NULL); 3031 3032 // Call C code. Need thread but NOT official VM entry 3033 // crud. We cannot block on this call, no GC can happen. Call should 3034 // restore return values to their stack-slots with the new SP. 3035 __ movptr(Address(rsp,arg0_off*wordSize),rdi); 3036 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap); 3037 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 3038 // Set an oopmap for the call site 3039 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) ); 3040 3041 __ get_thread(rdi); 3042 __ reset_last_Java_frame(rdi, true); 3043 3044 // Pop self-frame. 3045 __ leave(); // Epilog! 3046 3047 // Jump to interpreter 3048 __ ret(0); 3049 3050 // ------------- 3051 // make sure all code is generated 3052 masm->flush(); 3053 3054 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize); 3055 } 3056 #endif // COMPILER2 3057 3058 //------------------------------generate_handler_blob------ 3059 // 3060 // Generate a special Compile2Runtime blob that saves all registers, 3061 // setup oopmap, and calls safepoint code to stop the compiled code for 3062 // a safepoint. 3063 // 3064 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { 3065 3066 // Account for thread arg in our frame 3067 const int additional_words = 1; 3068 int frame_size_in_words; 3069 3070 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); 3071 3072 ResourceMark rm; 3073 OopMapSet *oop_maps = new OopMapSet(); 3074 OopMap* map; 3075 3076 // allocate space for the code 3077 // setup code generation tools 3078 CodeBuffer buffer("handler_blob", 1024, 512); 3079 MacroAssembler* masm = new MacroAssembler(&buffer); 3080 3081 const Register java_thread = rdi; // callee-saved for VC++ 3082 address start = __ pc(); 3083 address call_pc = NULL; 3084 bool cause_return = (poll_type == POLL_AT_RETURN); 3085 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); 3086 3087 if (UseRTMLocking) { 3088 // Abort RTM transaction before calling runtime 3089 // because critical section will be large and will be 3090 // aborted anyway. Also nmethod could be deoptimized. 3091 __ xabort(0); 3092 } 3093 3094 // If cause_return is true we are at a poll_return and there is 3095 // the return address on the stack to the caller on the nmethod 3096 // that is safepoint. We can leave this return on the stack and 3097 // effectively complete the return and safepoint in the caller. 3098 // Otherwise we push space for a return address that the safepoint 3099 // handler will install later to make the stack walking sensible. 3100 if (!cause_return) 3101 __ push(rbx); // Make room for return address (or push it again) 3102 3103 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors); 3104 3105 // The following is basically a call_VM. However, we need the precise 3106 // address of the call in order to generate an oopmap. Hence, we do all the 3107 // work ourselves. 3108 3109 // Push thread argument and setup last_Java_sp 3110 __ get_thread(java_thread); 3111 __ push(java_thread); 3112 __ set_last_Java_frame(java_thread, noreg, noreg, NULL); 3113 3114 // if this was not a poll_return then we need to correct the return address now. 3115 if (!cause_return) { 3116 // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack. 3117 // Additionally, rbx is a callee saved register and we can look at it later to determine 3118 // if someone changed the return address for us! 3119 __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset())); 3120 __ movptr(Address(rbp, wordSize), rbx); 3121 } 3122 3123 // do the call 3124 __ call(RuntimeAddress(call_ptr)); 3125 3126 // Set an oopmap for the call site. This oopmap will map all 3127 // oop-registers and debug-info registers as callee-saved. This 3128 // will allow deoptimization at this safepoint to find all possible 3129 // debug-info recordings, as well as let GC find all oops. 3130 3131 oop_maps->add_gc_map( __ pc() - start, map); 3132 3133 // Discard arg 3134 __ pop(rcx); 3135 3136 Label noException; 3137 3138 // Clear last_Java_sp again 3139 __ get_thread(java_thread); 3140 __ reset_last_Java_frame(java_thread, false); 3141 3142 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); 3143 __ jcc(Assembler::equal, noException); 3144 3145 // Exception pending 3146 RegisterSaver::restore_live_registers(masm, save_vectors); 3147 3148 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 3149 3150 __ bind(noException); 3151 3152 Label no_adjust, bail, not_special; 3153 if (SafepointMechanism::uses_thread_local_poll() && !cause_return) { 3154 // If our stashed return pc was modified by the runtime we avoid touching it 3155 __ cmpptr(rbx, Address(rbp, wordSize)); 3156 __ jccb(Assembler::notEqual, no_adjust); 3157 3158 // Skip over the poll instruction. 3159 // See NativeInstruction::is_safepoint_poll() 3160 // Possible encodings: 3161 // 85 00 test %eax,(%rax) 3162 // 85 01 test %eax,(%rcx) 3163 // 85 02 test %eax,(%rdx) 3164 // 85 03 test %eax,(%rbx) 3165 // 85 06 test %eax,(%rsi) 3166 // 85 07 test %eax,(%rdi) 3167 // 3168 // 85 04 24 test %eax,(%rsp) 3169 // 85 45 00 test %eax,0x0(%rbp) 3170 3171 #ifdef ASSERT 3172 __ movptr(rax, rbx); // remember where 0x85 should be, for verification below 3173 #endif 3174 // rsp/rbp base encoding takes 3 bytes with the following register values: 3175 // rsp 0x04 3176 // rbp 0x05 3177 __ movzbl(rcx, Address(rbx, 1)); 3178 __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05 3179 __ subptr(rcx, 4); // looking for 0x00 .. 0x01 3180 __ cmpptr(rcx, 1); 3181 __ jcc(Assembler::above, not_special); 3182 __ addptr(rbx, 1); 3183 __ bind(not_special); 3184 #ifdef ASSERT 3185 // Verify the correct encoding of the poll we're about to skip. 3186 __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl); 3187 __ jcc(Assembler::notEqual, bail); 3188 // Mask out the modrm bits 3189 __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask); 3190 // rax encodes to 0, so if the bits are nonzero it's incorrect 3191 __ jcc(Assembler::notZero, bail); 3192 #endif 3193 // Adjust return pc forward to step over the safepoint poll instruction 3194 __ addptr(rbx, 2); 3195 __ movptr(Address(rbp, wordSize), rbx); 3196 } 3197 3198 __ bind(no_adjust); 3199 // Normal exit, register restoring and exit 3200 RegisterSaver::restore_live_registers(masm, save_vectors); 3201 3202 __ ret(0); 3203 3204 #ifdef ASSERT 3205 __ bind(bail); 3206 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected"); 3207 #endif 3208 3209 // make sure all code is generated 3210 masm->flush(); 3211 3212 // Fill-out other meta info 3213 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); 3214 } 3215 3216 // 3217 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss 3218 // 3219 // Generate a stub that calls into vm to find out the proper destination 3220 // of a java call. All the argument registers are live at this point 3221 // but since this is generic code we don't know what they are and the caller 3222 // must do any gc of the args. 3223 // 3224 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { 3225 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); 3226 3227 // allocate space for the code 3228 ResourceMark rm; 3229 3230 CodeBuffer buffer(name, 1000, 512); 3231 MacroAssembler* masm = new MacroAssembler(&buffer); 3232 3233 int frame_size_words; 3234 enum frame_layout { 3235 thread_off, 3236 extra_words }; 3237 3238 OopMapSet *oop_maps = new OopMapSet(); 3239 OopMap* map = NULL; 3240 3241 int start = __ offset(); 3242 3243 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words); 3244 3245 int frame_complete = __ offset(); 3246 3247 const Register thread = rdi; 3248 __ get_thread(rdi); 3249 3250 __ push(thread); 3251 __ set_last_Java_frame(thread, noreg, rbp, NULL); 3252 3253 __ call(RuntimeAddress(destination)); 3254 3255 3256 // Set an oopmap for the call site. 3257 // We need this not only for callee-saved registers, but also for volatile 3258 // registers that the compiler might be keeping live across a safepoint. 3259 3260 oop_maps->add_gc_map( __ offset() - start, map); 3261 3262 // rax, contains the address we are going to jump to assuming no exception got installed 3263 3264 __ addptr(rsp, wordSize); 3265 3266 // clear last_Java_sp 3267 __ reset_last_Java_frame(thread, true); 3268 // check for pending exceptions 3269 Label pending; 3270 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD); 3271 __ jcc(Assembler::notEqual, pending); 3272 3273 // get the returned Method* 3274 __ get_vm_result_2(rbx, thread); 3275 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx); 3276 3277 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax); 3278 3279 RegisterSaver::restore_live_registers(masm); 3280 3281 // We are back the the original state on entry and ready to go. 3282 3283 __ jmp(rax); 3284 3285 // Pending exception after the safepoint 3286 3287 __ bind(pending); 3288 3289 RegisterSaver::restore_live_registers(masm); 3290 3291 // exception pending => remove activation and forward to exception handler 3292 3293 __ get_thread(thread); 3294 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD); 3295 __ movptr(rax, Address(thread, Thread::pending_exception_offset())); 3296 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 3297 3298 // ------------- 3299 // make sure all code is generated 3300 masm->flush(); 3301 3302 // return the blob 3303 // frame_size_words or bytes?? 3304 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true); 3305 }