# HG changeset patch # User zgu # Date 1595686613 14400 # Sat Jul 25 10:16:53 2020 -0400 # Node ID cbf47177d14342a6829fb31205f27447de53e8f8 # Parent d847a98a32cf0b4daefa57ee76d61106c5d6f0ea 8250588: Shenandoah: LRB needs to save/restore fp registers for runtime call diff --git a/src/hotspot/cpu/x86/gc/shenandoah/shenandoahBarrierSetAssembler_x86.cpp b/src/hotspot/cpu/x86/gc/shenandoah/shenandoahBarrierSetAssembler_x86.cpp --- a/src/hotspot/cpu/x86/gc/shenandoah/shenandoahBarrierSetAssembler_x86.cpp +++ b/src/hotspot/cpu/x86/gc/shenandoah/shenandoahBarrierSetAssembler_x86.cpp @@ -46,6 +46,30 @@ address ShenandoahBarrierSetAssembler::_shenandoah_lrb = NULL; +static void save_xmm_registers(MacroAssembler* masm) { + __ subptr(rsp, 64); + __ movdbl(Address(rsp, 0), xmm0); + __ movdbl(Address(rsp, 8), xmm1); + __ movdbl(Address(rsp, 16), xmm2); + __ movdbl(Address(rsp, 24), xmm3); + __ movdbl(Address(rsp, 32), xmm4); + __ movdbl(Address(rsp, 40), xmm5); + __ movdbl(Address(rsp, 48), xmm6); + __ movdbl(Address(rsp, 56), xmm7); +} + +static void restore_xmm_registers(MacroAssembler* masm) { + __ movdbl(xmm0, Address(rsp, 0)); + __ movdbl(xmm1, Address(rsp, 8)); + __ movdbl(xmm2, Address(rsp, 16)); + __ movdbl(xmm3, Address(rsp, 24)); + __ movdbl(xmm4, Address(rsp, 32)); + __ movdbl(xmm5, Address(rsp, 40)); + __ movdbl(xmm6, Address(rsp, 48)); + __ movdbl(xmm7, Address(rsp, 56)); + __ addptr(rsp, 64); +} + void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type, Register src, Register dst, Register count) { @@ -290,7 +314,9 @@ __ lea(src_addr, src); } + save_xmm_registers(masm); __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, ShenandoahBarrierSetAssembler::shenandoah_lrb()))); + restore_xmm_registers(masm); if (need_addr_setup) { if (dst != rax) { @@ -368,7 +394,10 @@ assert_different_registers(dst, rsi); __ lea(rsi, src); + + save_xmm_registers(masm); __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_native), dst, rsi); + restore_xmm_registers(masm); #ifdef _LP64 __ pop(r15); @@ -514,15 +543,7 @@ // That path can be reached from the c2i adapter with live fp // arguments in registers. LP64_ONLY(assert(Argument::n_float_register_parameters_j == 8, "8 fp registers to save at java call")); - __ subptr(rsp, 64); - __ movdbl(Address(rsp, 0), xmm0); - __ movdbl(Address(rsp, 8), xmm1); - __ movdbl(Address(rsp, 16), xmm2); - __ movdbl(Address(rsp, 24), xmm3); - __ movdbl(Address(rsp, 32), xmm4); - __ movdbl(Address(rsp, 40), xmm5); - __ movdbl(Address(rsp, 48), xmm6); - __ movdbl(Address(rsp, 56), xmm7); + save_xmm_registers(masm); Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread); assert_different_registers(dst, tmp1, tmp_thread); @@ -539,15 +560,7 @@ tmp1 /* tmp */, true /* tosca_live */, true /* expand_call */); - __ movdbl(xmm0, Address(rsp, 0)); - __ movdbl(xmm1, Address(rsp, 8)); - __ movdbl(xmm2, Address(rsp, 16)); - __ movdbl(xmm3, Address(rsp, 24)); - __ movdbl(xmm4, Address(rsp, 32)); - __ movdbl(xmm5, Address(rsp, 40)); - __ movdbl(xmm6, Address(rsp, 48)); - __ movdbl(xmm7, Address(rsp, 56)); - __ addptr(rsp, 64); + restore_xmm_registers(masm); __ pop_IU_state(); } }