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src/cpu/aarch32/vm/globals_aarch32.hpp

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rev 8069 : 8164652: aarch32: C1 port


  50 // the uep and the vep doesn't get real alignment but just slops on by
  51 // only assured that the entry instruction meets the 5 byte size requirement.
  52 //#ifdef COMPILER2
  53 //define_pd_global(intx, CodeEntryAlignment,       64);
  54 //#else
  55 define_pd_global(intx, CodeEntryAlignment,       32);
  56 //#endif // COMPILER2
  57 define_pd_global(intx, OptoLoopAlignment,        32);
  58 define_pd_global(intx, InlineFrequencyCount,     100);
  59 
  60 define_pd_global(intx, StackYellowPages, 2);
  61 define_pd_global(intx, StackRedPages, 1);
  62 
  63 define_pd_global(intx, StackShadowPages, 4 DEBUG_ONLY(+5));
  64 
  65 define_pd_global(intx, PreInflateSpin,           10);
  66 
  67 define_pd_global(bool, RewriteBytecodes,     true);
  68 define_pd_global(bool, RewriteFrequentPairs, true);
  69 
  70 define_pd_global(bool, UseMembar,            true);
  71 
  72 define_pd_global(bool, PreserveFramePointer, false);
  73 
  74 // GC Ergo Flags
  75 define_pd_global(uintx, CMSYoungGenPerWorker, 64*M);  // default max size of CMS young gen, per GC worker thread
  76 
  77 define_pd_global(uintx, TypeProfileLevel, 111);
  78 
  79 // FIXME this turned out to be needed for the core build too?
  80 //#if defined(COMPILER1) || defined(COMPILER2)
  81 define_pd_global(intx, InlineSmallCode,          1000);
  82 //#endif
  83 




  84 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
  85                                                                         \
  86   product(bool, NearCpool, true,                                        \
  87          "constant pool is close to instructions")                      \
  88                                                                         \
  89   product(bool, UseBarriersForVolatile, false,                          \
  90           "Use memory barriers to implement volatile accesses")         \
  91   product(bool, TraceTraps, false, "Trace all traps the signal handler")\
  92   product(bool, UseSIMDForMemoryOps, false,                             \
  93       "Use SIMD instructions in generated memory move code")            \
  94   product(bool, UseNeon, false,                                         \
  95           "Use Neon for CRC32 computation")                             \
  96   product(bool, UseCRC32, false,                                        \
  97           "Use CRC32 instructions for CRC32 computation")
  98 
  99 
 100 #endif // CPU_AARCH32_VM_GLOBALS_AARCH32_HPP


  50 // the uep and the vep doesn't get real alignment but just slops on by
  51 // only assured that the entry instruction meets the 5 byte size requirement.
  52 //#ifdef COMPILER2
  53 //define_pd_global(intx, CodeEntryAlignment,       64);
  54 //#else
  55 define_pd_global(intx, CodeEntryAlignment,       32);
  56 //#endif // COMPILER2
  57 define_pd_global(intx, OptoLoopAlignment,        32);
  58 define_pd_global(intx, InlineFrequencyCount,     100);
  59 
  60 define_pd_global(intx, StackYellowPages, 2);
  61 define_pd_global(intx, StackRedPages, 1);
  62 
  63 define_pd_global(intx, StackShadowPages, 4 DEBUG_ONLY(+5));
  64 
  65 define_pd_global(intx, PreInflateSpin,           10);
  66 
  67 define_pd_global(bool, RewriteBytecodes,     true);
  68 define_pd_global(bool, RewriteFrequentPairs, true);
  69 


  70 define_pd_global(bool, PreserveFramePointer, false);
  71 
  72 // GC Ergo Flags
  73 define_pd_global(uintx, CMSYoungGenPerWorker, 64*M);  // default max size of CMS young gen, per GC worker thread
  74 
  75 define_pd_global(uintx, TypeProfileLevel, 111);
  76 
  77 // FIXME this turned out to be needed for the core build too?
  78 //#if defined(COMPILER1) || defined(COMPILER2)
  79 define_pd_global(intx, InlineSmallCode,          1000);
  80 //#endif
  81 
  82 // Define it instead providing as option, inlining the constant significantly
  83 // improves perfromance. The option is disabled for AARCH32 in globals.hpp too.
  84 #define UseMembar true
  85 
  86 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
  87                                                                            \
  88   product(bool, NearCpool, true,                                           \
  89          "constant pool is close to instructions")                      \
  90                                                                         \
  91   product(bool, UseBarriersForVolatile, false,                          \
  92           "Use memory barriers to implement volatile accesses")         \
  93   product(bool, TraceTraps, false, "Trace all traps the signal handler")\
  94   product(bool, UseSIMDForMemoryOps, false,                             \
  95       "Use SIMD instructions in generated memory move code")            \
  96   product(bool, UseNeon, false,                                         \
  97           "Use Neon for CRC32 computation")                             \
  98   product(bool, UseCRC32, false,                                        \
  99           "Use CRC32 instructions for CRC32 computation")
 100 
 101 
 102 #endif // CPU_AARCH32_VM_GLOBALS_AARCH32_HPP
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