16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 */
23 package jdk.vm.ci.amd64;
24
25 import static jdk.vm.ci.code.MemoryBarriers.LOAD_LOAD;
26 import static jdk.vm.ci.code.MemoryBarriers.LOAD_STORE;
27 import static jdk.vm.ci.code.MemoryBarriers.STORE_STORE;
28 import static jdk.vm.ci.code.Register.SPECIAL;
29
30 import java.nio.ByteOrder;
31 import java.util.EnumSet;
32
33 import jdk.vm.ci.code.Architecture;
34 import jdk.vm.ci.code.Register;
35 import jdk.vm.ci.code.Register.RegisterCategory;
36 import jdk.vm.ci.meta.JavaKind;
37 import jdk.vm.ci.meta.PlatformKind;
38
39 /**
40 * Represents the AMD64 architecture.
41 */
42 public class AMD64 extends Architecture {
43
44 public static final RegisterCategory CPU = new RegisterCategory("CPU");
45
46 // @formatter:off
47
48 // General purpose CPU registers
49 public static final Register rax = new Register(0, 0, "rax", CPU);
50 public static final Register rcx = new Register(1, 1, "rcx", CPU);
51 public static final Register rdx = new Register(2, 2, "rdx", CPU);
52 public static final Register rbx = new Register(3, 3, "rbx", CPU);
53 public static final Register rsp = new Register(4, 4, "rsp", CPU);
54 public static final Register rbp = new Register(5, 5, "rbp", CPU);
55 public static final Register rsi = new Register(6, 6, "rsi", CPU);
114 };
115
116 public static final Register[] xmmRegistersAVX512 = {
117 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
118 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
119 xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm22, xmm23,
120 xmm24, xmm25, xmm26, xmm27, xmm28, xmm29, xmm30, xmm31
121 };
122
123 public static final RegisterCategory MASK = new RegisterCategory("MASK", false);
124
125 public static final Register k0 = new Register(48, 0, "k0", MASK);
126 public static final Register k1 = new Register(49, 1, "k1", MASK);
127 public static final Register k2 = new Register(50, 2, "k2", MASK);
128 public static final Register k3 = new Register(51, 3, "k3", MASK);
129 public static final Register k4 = new Register(52, 4, "k4", MASK);
130 public static final Register k5 = new Register(53, 5, "k5", MASK);
131 public static final Register k6 = new Register(54, 6, "k6", MASK);
132 public static final Register k7 = new Register(55, 7, "k7", MASK);
133
134 public static final Register[] valueRegistersSSE = {
135 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
136 r8, r9, r10, r11, r12, r13, r14, r15,
137 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
138 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
139 };
140
141 public static final Register[] valueRegistersAVX512 = {
142 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
143 r8, r9, r10, r11, r12, r13, r14, r15,
144 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
145 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
146 xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm22, xmm23,
147 xmm24, xmm25, xmm26, xmm27, xmm28, xmm29, xmm30, xmm31,
148 k0, k1, k2, k3, k4, k5, k6, k7
149 };
150
151 /**
152 * Register used to construct an instruction-relative address.
153 */
154 public static final Register rip = new Register(56, -1, "rip", SPECIAL);
155
156 public static final Register[] allRegisters = {
157 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
158 r8, r9, r10, r11, r12, r13, r14, r15,
159 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
160 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
161 xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm22, xmm23,
162 xmm24, xmm25, xmm26, xmm27, xmm28, xmm29, xmm30, xmm31,
163 k0, k1, k2, k3, k4, k5, k6, k7,
164 rip
165 };
166
167 // @formatter:on
168
169 /**
170 * Basic set of CPU features mirroring what is returned from the cpuid instruction. See:
171 * {@code VM_Version::cpuFeatureFlags}.
172 */
173 public enum CPUFeature {
174 CX8,
175 CMOV,
176 FXSR,
177 HT,
178 MMX,
179 AMD_3DNOW_PREFETCH,
180 SSE,
181 SSE2,
182 SSE3,
183 SSSE3,
184 SSE4A,
185 SSE4_1,
228 assert features.contains(CPUFeature.SSE2) : "minimum config for x64";
229
230 if (features.contains(CPUFeature.AVX512F)) {
231 largestKind = AMD64Kind.V512_QWORD;
232 } else if (features.contains(CPUFeature.AVX)) {
233 largestKind = AMD64Kind.V256_QWORD;
234 } else {
235 largestKind = AMD64Kind.V128_QWORD;
236 }
237 }
238
239 public EnumSet<CPUFeature> getFeatures() {
240 return features;
241 }
242
243 public EnumSet<Flag> getFlags() {
244 return flags;
245 }
246
247 @Override
248 public Register[] getAvailableValueRegisters() {
249 if (features.contains(CPUFeature.AVX512F)) {
250 return valueRegistersAVX512;
251 } else {
252 return valueRegistersSSE;
253 }
254 }
255
256 @Override
257 public PlatformKind getPlatformKind(JavaKind javaKind) {
258 switch (javaKind) {
259 case Boolean:
260 case Byte:
261 return AMD64Kind.BYTE;
262 case Short:
263 case Char:
264 return AMD64Kind.WORD;
265 case Int:
266 return AMD64Kind.DWORD;
267 case Long:
268 case Object:
|
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 */
23 package jdk.vm.ci.amd64;
24
25 import static jdk.vm.ci.code.MemoryBarriers.LOAD_LOAD;
26 import static jdk.vm.ci.code.MemoryBarriers.LOAD_STORE;
27 import static jdk.vm.ci.code.MemoryBarriers.STORE_STORE;
28 import static jdk.vm.ci.code.Register.SPECIAL;
29
30 import java.nio.ByteOrder;
31 import java.util.EnumSet;
32
33 import jdk.vm.ci.code.Architecture;
34 import jdk.vm.ci.code.Register;
35 import jdk.vm.ci.code.Register.RegisterCategory;
36 import jdk.vm.ci.code.RegisterArray;
37 import jdk.vm.ci.meta.JavaKind;
38 import jdk.vm.ci.meta.PlatformKind;
39
40 /**
41 * Represents the AMD64 architecture.
42 */
43 public class AMD64 extends Architecture {
44
45 public static final RegisterCategory CPU = new RegisterCategory("CPU");
46
47 // @formatter:off
48
49 // General purpose CPU registers
50 public static final Register rax = new Register(0, 0, "rax", CPU);
51 public static final Register rcx = new Register(1, 1, "rcx", CPU);
52 public static final Register rdx = new Register(2, 2, "rdx", CPU);
53 public static final Register rbx = new Register(3, 3, "rbx", CPU);
54 public static final Register rsp = new Register(4, 4, "rsp", CPU);
55 public static final Register rbp = new Register(5, 5, "rbp", CPU);
56 public static final Register rsi = new Register(6, 6, "rsi", CPU);
115 };
116
117 public static final Register[] xmmRegistersAVX512 = {
118 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
119 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
120 xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm22, xmm23,
121 xmm24, xmm25, xmm26, xmm27, xmm28, xmm29, xmm30, xmm31
122 };
123
124 public static final RegisterCategory MASK = new RegisterCategory("MASK", false);
125
126 public static final Register k0 = new Register(48, 0, "k0", MASK);
127 public static final Register k1 = new Register(49, 1, "k1", MASK);
128 public static final Register k2 = new Register(50, 2, "k2", MASK);
129 public static final Register k3 = new Register(51, 3, "k3", MASK);
130 public static final Register k4 = new Register(52, 4, "k4", MASK);
131 public static final Register k5 = new Register(53, 5, "k5", MASK);
132 public static final Register k6 = new Register(54, 6, "k6", MASK);
133 public static final Register k7 = new Register(55, 7, "k7", MASK);
134
135 public static final RegisterArray valueRegistersSSE = new RegisterArray(
136 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
137 r8, r9, r10, r11, r12, r13, r14, r15,
138 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
139 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15
140 );
141
142 public static final RegisterArray valueRegistersAVX512 = new RegisterArray(
143 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
144 r8, r9, r10, r11, r12, r13, r14, r15,
145 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
146 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
147 xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm22, xmm23,
148 xmm24, xmm25, xmm26, xmm27, xmm28, xmm29, xmm30, xmm31,
149 k0, k1, k2, k3, k4, k5, k6, k7
150 );
151
152 /**
153 * Register used to construct an instruction-relative address.
154 */
155 public static final Register rip = new Register(56, -1, "rip", SPECIAL);
156
157 public static final RegisterArray allRegisters = new RegisterArray(
158 rax, rcx, rdx, rbx, rsp, rbp, rsi, rdi,
159 r8, r9, r10, r11, r12, r13, r14, r15,
160 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
161 xmm8, xmm9, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15,
162 xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm22, xmm23,
163 xmm24, xmm25, xmm26, xmm27, xmm28, xmm29, xmm30, xmm31,
164 k0, k1, k2, k3, k4, k5, k6, k7,
165 rip
166 );
167
168 // @formatter:on
169
170 /**
171 * Basic set of CPU features mirroring what is returned from the cpuid instruction. See:
172 * {@code VM_Version::cpuFeatureFlags}.
173 */
174 public enum CPUFeature {
175 CX8,
176 CMOV,
177 FXSR,
178 HT,
179 MMX,
180 AMD_3DNOW_PREFETCH,
181 SSE,
182 SSE2,
183 SSE3,
184 SSSE3,
185 SSE4A,
186 SSE4_1,
229 assert features.contains(CPUFeature.SSE2) : "minimum config for x64";
230
231 if (features.contains(CPUFeature.AVX512F)) {
232 largestKind = AMD64Kind.V512_QWORD;
233 } else if (features.contains(CPUFeature.AVX)) {
234 largestKind = AMD64Kind.V256_QWORD;
235 } else {
236 largestKind = AMD64Kind.V128_QWORD;
237 }
238 }
239
240 public EnumSet<CPUFeature> getFeatures() {
241 return features;
242 }
243
244 public EnumSet<Flag> getFlags() {
245 return flags;
246 }
247
248 @Override
249 public RegisterArray getAvailableValueRegisters() {
250 if (features.contains(CPUFeature.AVX512F)) {
251 return valueRegistersAVX512;
252 } else {
253 return valueRegistersSSE;
254 }
255 }
256
257 @Override
258 public PlatformKind getPlatformKind(JavaKind javaKind) {
259 switch (javaKind) {
260 case Boolean:
261 case Byte:
262 return AMD64Kind.BYTE;
263 case Short:
264 case Char:
265 return AMD64Kind.WORD;
266 case Int:
267 return AMD64Kind.DWORD;
268 case Long:
269 case Object:
|