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src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp

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rev 53735 : AArch64 support for ValueTypes

*** 1300,1310 **** bind(L_fallthrough); } void MacroAssembler::verify_oop(Register reg, const char* s) { ! if (!VerifyOops) return; // Pass register number to verify_oop_subroutine const char* b = NULL; { ResourceMark rm; --- 1300,1314 ---- bind(L_fallthrough); } void MacroAssembler::verify_oop(Register reg, const char* s) { ! if (!VerifyOops || VerifyAdapterSharing) { ! // Below address of the code string confuses VerifyAdapterSharing ! // because it may differ between otherwise equivalent adapters. ! return; ! } // Pass register number to verify_oop_subroutine const char* b = NULL; { ResourceMark rm;
*** 1330,1340 **** BLOCK_COMMENT("} verify_oop"); } void MacroAssembler::verify_oop_addr(Address addr, const char* s) { ! if (!VerifyOops) return; const char* b = NULL; { ResourceMark rm; stringStream ss; --- 1334,1348 ---- BLOCK_COMMENT("} verify_oop"); } void MacroAssembler::verify_oop_addr(Address addr, const char* s) { ! if (!VerifyOops || VerifyAdapterSharing) { ! // Below address of the code string confuses VerifyAdapterSharing ! // because it may differ between otherwise equivalent adapters. ! return; ! } const char* b = NULL; { ResourceMark rm; stringStream ss;
*** 1433,1442 **** --- 1441,1454 ---- pass_arg1(this, arg_1); pass_arg2(this, arg_2); call_VM_leaf_base(entry_point, 3); } + void MacroAssembler::super_call_VM_leaf(address entry_point) { + MacroAssembler::call_VM_leaf_base(entry_point, 1); + } + void MacroAssembler::super_call_VM_leaf(address entry_point, Register arg_0) { pass_arg0(this, arg_0); MacroAssembler::call_VM_leaf_base(entry_point, 1); }
*** 1482,1491 **** --- 1494,1536 ---- // nothing to do, (later) access of M[reg + offset] // will provoke OS NULL exception if reg = NULL } } + void MacroAssembler::test_klass_is_value(Register klass, Register temp_reg, Label& is_value) { + ldrw(temp_reg, Address(klass, Klass::access_flags_offset())); + andr(temp_reg, temp_reg, JVM_ACC_VALUE); + cbnz(temp_reg, is_value); + } + + void MacroAssembler::test_field_is_flattenable(Register flags, Register temp_reg, Label& is_flattenable) { + (void) temp_reg; // keep signature uniform with x86 + tbnz(flags, ConstantPoolCacheEntry::is_flattenable_field_shift, is_flattenable); + } + + void MacroAssembler::test_field_is_not_flattenable(Register flags, Register temp_reg, Label& not_flattenable) { + (void) temp_reg; // keep signature uniform with x86 + tbz(flags, ConstantPoolCacheEntry::is_flattenable_field_shift, not_flattenable); + } + + void MacroAssembler::test_field_is_flattened(Register flags, Register temp_reg, Label& is_flattened) { + (void) temp_reg; // keep signature uniform with x86 + tbnz(flags, ConstantPoolCacheEntry::is_flattened_field_shift, is_flattened); + } + + void MacroAssembler::test_flat_array_klass(Register klass, Register temp_reg, Label& is_flattened) { + ldrw(temp_reg, Address(klass, Klass::layout_helper_offset())); + asrw(temp_reg, temp_reg, Klass::_lh_array_tag_shift); + cmpw(temp_reg, Klass::_lh_array_tag_vt_value); + br(Assembler::EQ, is_flattened); + } + + void MacroAssembler::test_flat_array_oop(Register oop, Register temp_reg, Label& is_flattened) { + load_klass(temp_reg, oop); + test_flat_array_klass(temp_reg, temp_reg, is_flattened); + } + // MacroAssembler protected routines needed to implement // public methods void MacroAssembler::mov(Register r, Address dest) { code_section()->relocate(pc(), dest.rspec());
*** 5848,5852 **** --- 5893,5904 ---- mov(dst, c_rarg0); } pop(saved_regs, sp); } + + // DMS TODO ValueType MachVVEPNode support + void MacroAssembler::unpack_value_args(Compile* C) { + // Not implemented + guarantee(false, "Support for MachVVEPNode is not implemented"); + } +
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