215     target &= ~mask;
 216     target |= val;
 217     *(unsigned *)a = target;
 218   }
 219 
 220   static void spatch(address a, int msb, int lsb, long val) {
 221     int nbits = msb - lsb + 1;
 222     long chk = val >> (nbits - 1);
 223     guarantee (chk == -1 || chk == 0, "Field too big for insn");
 224     unsigned uval = val;
 225     unsigned mask = (1U << nbits) - 1;
 226     uval &= mask;
 227     uval <<= lsb;
 228     mask <<= lsb;
 229     unsigned target = *(unsigned *)a;
 230     target &= ~mask;
 231     target |= uval;
 232     *(unsigned *)a = target;
 233   }
 234 




















 235   void f(unsigned val, int msb, int lsb) {
 236     int nbits = msb - lsb + 1;
 237     guarantee(val < (1U << nbits), "Field too big for insn");
 238     assert_cond(msb >= lsb);
 239     unsigned mask = (1U << nbits) - 1;
 240     val <<= lsb;
 241     mask <<= lsb;
 242     insn |= val;
 243     assert_cond((bits & mask) == 0);
 244 #ifdef ASSERT
 245     bits |= mask;
 246 #endif
 247   }
 248 
 249   void f(unsigned val, int bit) {
 250     f(val, bit, bit);
 251   }
 252 
 253   void sf(long val, int msb, int lsb) {
 254     int nbits = msb - lsb + 1;

 215     target &= ~mask;
 216     target |= val;
 217     *(unsigned *)a = target;
 218   }
 219 
 220   static void spatch(address a, int msb, int lsb, long val) {
 221     int nbits = msb - lsb + 1;
 222     long chk = val >> (nbits - 1);
 223     guarantee (chk == -1 || chk == 0, "Field too big for insn");
 224     unsigned uval = val;
 225     unsigned mask = (1U << nbits) - 1;
 226     uval &= mask;
 227     uval <<= lsb;
 228     mask <<= lsb;
 229     unsigned target = *(unsigned *)a;
 230     target &= ~mask;
 231     target |= uval;
 232     *(unsigned *)a = target;
 233   }
 234 
 235 #define aarch64_NOP 0xd503201f
 236   static void patch_movk(address a, int pos, int msb, int lsb,
 237                          unsigned long val, unsigned shift) {
 238     address real_a = a + pos;
 239 
 240     // Revert NOP to MOVK
 241     if (*(uint32_t*)real_a == aarch64_NOP) {
 242       uint32_t patch_val = (0b111100101<<23);
 243 
 244       // Patch shift number.
 245       patch_val |= ((shift/16)<<21);
 246       // Patch dest register.
 247       patch_val |= extract(*(uint32_t *)a, 4, 0);
 248 
 249       *(uint32_t*)real_a = patch_val;
 250     }
 251 
 252     patch(real_a, msb, lsb, (val>>shift) & 0xffff);
 253   }
 254 
 255   void f(unsigned val, int msb, int lsb) {
 256     int nbits = msb - lsb + 1;
 257     guarantee(val < (1U << nbits), "Field too big for insn");
 258     assert_cond(msb >= lsb);
 259     unsigned mask = (1U << nbits) - 1;
 260     val <<= lsb;
 261     mask <<= lsb;
 262     insn |= val;
 263     assert_cond((bits & mask) == 0);
 264 #ifdef ASSERT
 265     bits |= mask;
 266 #endif
 267   }
 268 
 269   void f(unsigned val, int bit) {
 270     f(val, bit, bit);
 271   }
 272 
 273   void sf(long val, int msb, int lsb) {
 274     int nbits = msb - lsb + 1;