510 __ ldrb(rscratch1, Address(rscratch1));
511 Label nope, poll;
512 __ cbz(rscratch1, nope);
513 __ block_comment("safepoint");
514 __ enter();
515 __ push(0x3, sp); // r0 & r1
516 __ push(0x3ffffffc, sp); // integer registers except lr & sp & r0 & r1
517 __ adr(r0, poll);
518 __ str(r0, Address(rthread, JavaThread::saved_exception_pc_offset()));
519 __ mov(rscratch1, CAST_FROM_FN_PTR(address, SharedRuntime::get_poll_stub));
520 __ blrt(rscratch1, 1, 0, 1);
521 __ maybe_isb();
522 __ pop(0x3ffffffc, sp); // integer registers except lr & sp & r0 & r1
523 __ mov(rscratch1, r0);
524 __ pop(0x3, sp); // r0 & r1
525 __ leave();
526 __ br(rscratch1);
527 address polling_page(os::get_polling_page());
528 assert(os::is_poll_address(polling_page), "should be");
529 unsigned long off;
530 __ adrp(rscratch1, Address(polling_page, rtype), off);
531 __ bind(poll);
532 if (info)
533 add_debug_info_for_branch(info); // This isn't just debug info:
534 // it's the oop map
535 else
536 __ code_section()->relocate(pc(), rtype);
537 __ ldrw(zr, Address(rscratch1, off));
538 __ bind(nope);
539 }
540
541 void LIR_Assembler::return_op(LIR_Opr result) {
542 assert(result->is_illegal() || !result->is_single_cpu() || result->as_register() == r0, "word returns are in r0,");
543 // Pop the stack before the safepoint code
544 __ remove_frame(initial_frame_size_in_bytes());
545 address polling_page(os::get_polling_page());
546 __ read_polling_page(rscratch1, polling_page, relocInfo::poll_return_type);
547 __ ret(lr);
548 }
549
550 int LIR_Assembler::safepoint_poll(LIR_Opr tmp, CodeEmitInfo* info) {
551 address polling_page(os::get_polling_page());
552 guarantee(info != NULL, "Shouldn't be NULL");
553 assert(os::is_poll_address(polling_page), "should be");
554 unsigned long off;
555 __ adrp(rscratch1, Address(polling_page, relocInfo::poll_type), off);
556 assert(off == 0, "must be");
557 add_debug_info_for_branch(info); // This isn't just debug info:
558 // it's the oop map
559 __ read_polling_page(rscratch1, relocInfo::poll_type);
560 return __ offset();
561 }
562
563
564 void LIR_Assembler::move_regs(Register from_reg, Register to_reg) {
565 if (from_reg == r31_sp)
566 from_reg = sp;
567 if (to_reg == r31_sp)
568 to_reg = sp;
569 __ mov(to_reg, from_reg);
570 }
571
572 void LIR_Assembler::swap_reg(Register a, Register b) { Unimplemented(); }
573
574
575 void LIR_Assembler::const2reg(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info) {
2622
2623 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
2624 Unimplemented();
2625 }
2626
2627
2628 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2629 __ lea(dst->as_register(), frame_map()->address_for_monitor_lock(monitor_no));
2630 }
2631
2632 void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
2633 assert(op->crc()->is_single_cpu(), "crc must be register");
2634 assert(op->val()->is_single_cpu(), "byte value must be register");
2635 assert(op->result_opr()->is_single_cpu(), "result must be register");
2636 Register crc = op->crc()->as_register();
2637 Register val = op->val()->as_register();
2638 Register res = op->result_opr()->as_register();
2639
2640 assert_different_registers(val, crc, res);
2641 unsigned long offset;
2642 __ adrp(res, ExternalAddress(StubRoutines::crc_table_addr()), offset);
2643 if (offset) __ add(res, res, offset);
2644
2645 __ ornw(crc, zr, crc); // ~crc
2646 __ update_byte_crc32(crc, val, res);
2647 __ ornw(res, zr, crc); // ~crc
2648 }
2649
2650 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2651 COMMENT("emit_profile_type {");
2652 Register obj = op->obj()->as_register();
2653 Register tmp = op->tmp()->as_pointer_register();
2654 Address mdo_addr = as_Address(op->mdp()->as_address_ptr());
2655 ciKlass* exact_klass = op->exact_klass();
2656 intptr_t current_klass = op->current_klass();
2657 bool not_null = op->not_null();
2658 bool no_conflict = op->no_conflict();
2659
2660 Label update, next, none;
2661
2662 bool do_null = !not_null;
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510 __ ldrb(rscratch1, Address(rscratch1));
511 Label nope, poll;
512 __ cbz(rscratch1, nope);
513 __ block_comment("safepoint");
514 __ enter();
515 __ push(0x3, sp); // r0 & r1
516 __ push(0x3ffffffc, sp); // integer registers except lr & sp & r0 & r1
517 __ adr(r0, poll);
518 __ str(r0, Address(rthread, JavaThread::saved_exception_pc_offset()));
519 __ mov(rscratch1, CAST_FROM_FN_PTR(address, SharedRuntime::get_poll_stub));
520 __ blrt(rscratch1, 1, 0, 1);
521 __ maybe_isb();
522 __ pop(0x3ffffffc, sp); // integer registers except lr & sp & r0 & r1
523 __ mov(rscratch1, r0);
524 __ pop(0x3, sp); // r0 & r1
525 __ leave();
526 __ br(rscratch1);
527 address polling_page(os::get_polling_page());
528 assert(os::is_poll_address(polling_page), "should be");
529 unsigned long off;
530 __ far_adrp(rscratch1, Address(polling_page, rtype), off);
531 __ bind(poll);
532 if (info)
533 add_debug_info_for_branch(info); // This isn't just debug info:
534 // it's the oop map
535 else
536 __ code_section()->relocate(pc(), rtype);
537 __ ldrw(zr, Address(rscratch1, off));
538 __ bind(nope);
539 }
540
541 void LIR_Assembler::return_op(LIR_Opr result) {
542 assert(result->is_illegal() || !result->is_single_cpu() || result->as_register() == r0, "word returns are in r0,");
543 // Pop the stack before the safepoint code
544 __ remove_frame(initial_frame_size_in_bytes());
545 address polling_page(os::get_polling_page());
546 __ read_polling_page(rscratch1, polling_page, relocInfo::poll_return_type);
547 __ ret(lr);
548 }
549
550 int LIR_Assembler::safepoint_poll(LIR_Opr tmp, CodeEmitInfo* info) {
551 address polling_page(os::get_polling_page());
552 guarantee(info != NULL, "Shouldn't be NULL");
553 assert(os::is_poll_address(polling_page), "should be");
554 unsigned long off;
555 __ far_adrp(rscratch1, Address(polling_page, relocInfo::poll_type), off);
556 assert(off == 0, "must be");
557 add_debug_info_for_branch(info); // This isn't just debug info:
558 // it's the oop map
559 __ read_polling_page(rscratch1, relocInfo::poll_type);
560 return __ offset();
561 }
562
563
564 void LIR_Assembler::move_regs(Register from_reg, Register to_reg) {
565 if (from_reg == r31_sp)
566 from_reg = sp;
567 if (to_reg == r31_sp)
568 to_reg = sp;
569 __ mov(to_reg, from_reg);
570 }
571
572 void LIR_Assembler::swap_reg(Register a, Register b) { Unimplemented(); }
573
574
575 void LIR_Assembler::const2reg(LIR_Opr src, LIR_Opr dest, LIR_PatchCode patch_code, CodeEmitInfo* info) {
2622
2623 void LIR_Assembler::emit_delay(LIR_OpDelay*) {
2624 Unimplemented();
2625 }
2626
2627
2628 void LIR_Assembler::monitor_address(int monitor_no, LIR_Opr dst) {
2629 __ lea(dst->as_register(), frame_map()->address_for_monitor_lock(monitor_no));
2630 }
2631
2632 void LIR_Assembler::emit_updatecrc32(LIR_OpUpdateCRC32* op) {
2633 assert(op->crc()->is_single_cpu(), "crc must be register");
2634 assert(op->val()->is_single_cpu(), "byte value must be register");
2635 assert(op->result_opr()->is_single_cpu(), "result must be register");
2636 Register crc = op->crc()->as_register();
2637 Register val = op->val()->as_register();
2638 Register res = op->result_opr()->as_register();
2639
2640 assert_different_registers(val, crc, res);
2641 unsigned long offset;
2642 __ far_adrp(res, ExternalAddress(StubRoutines::crc_table_addr()), offset);
2643 if (offset) __ add(res, res, offset);
2644
2645 __ ornw(crc, zr, crc); // ~crc
2646 __ update_byte_crc32(crc, val, res);
2647 __ ornw(res, zr, crc); // ~crc
2648 }
2649
2650 void LIR_Assembler::emit_profile_type(LIR_OpProfileType* op) {
2651 COMMENT("emit_profile_type {");
2652 Register obj = op->obj()->as_register();
2653 Register tmp = op->tmp()->as_pointer_register();
2654 Address mdo_addr = as_Address(op->mdp()->as_address_ptr());
2655 ciKlass* exact_klass = op->exact_klass();
2656 intptr_t current_klass = op->current_klass();
2657 bool not_null = op->not_null();
2658 bool no_conflict = op->no_conflict();
2659
2660 Label update, next, none;
2661
2662 bool do_null = !not_null;
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