src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp

rev 10243 : 8150394: aarch64: add support for 8.1 LSE CAS instructions
Reviewed-by: aph
Contributed-by: ananth.jasty@caviumnetworks.com, edward.nevill@linaro.org

*** 1554,1563 ****
--- 1554,1569 ----
      ShouldNotReachHere();
    }
  }
  
  void LIR_Assembler::casw(Register addr, Register newval, Register cmpval) {
+   if (UseLSE) {
+     __ mov(rscratch1, cmpval);
+     __ casal(Assembler::word, rscratch1, newval, addr);
+     __ cmpw(rscratch1, cmpval);
+     __ cset(rscratch1, Assembler::NE);
+   } else {
      Label retry_load, nope;
      // flush and load exclusive from the memory location
      // and fail if it is not what we expect
      __ bind(retry_load);
      __ ldaxrw(rscratch1, addr);
*** 1568,1581 ****
--- 1574,1594 ----
      __ stlxrw(rscratch1, newval, addr);
      // retry so we only ever return after a load fails to compare
      // ensures we don't return a stale value after a failed write.
      __ cbnzw(rscratch1, retry_load);
      __ bind(nope);
+   }
    __ membar(__ AnyAny);
  }
  
  void LIR_Assembler::casl(Register addr, Register newval, Register cmpval) {
+   if (UseLSE) {
+     __ mov(rscratch1, cmpval);
+     __ casal(Assembler::xword, rscratch1, newval, addr);
+     __ cmp(rscratch1, cmpval);
+     __ cset(rscratch1, Assembler::NE);
+   } else {
      Label retry_load, nope;
      // flush and load exclusive from the memory location
      // and fail if it is not what we expect
      __ bind(retry_load);
      __ ldaxr(rscratch1, addr);
*** 1586,1595 ****
--- 1599,1609 ----
      __ stlxr(rscratch1, newval, addr);
      // retry so we only ever return after a load fails to compare
      // ensures we don't return a stale value after a failed write.
      __ cbnz(rscratch1, retry_load);
      __ bind(nope);
+   }
    __ membar(__ AnyAny);
  }
  
  
  void LIR_Assembler::emit_compare_and_swap(LIR_OpCompareAndSwap* op) {