src/cpu/aarch64/vm/globals_aarch64.hpp

rev 10243 : 8150394: aarch64: add support for 8.1 LSE CAS instructions
Reviewed-by: aph
Contributed-by: ananth.jasty@caviumnetworks.com, edward.nevill@linaro.org

*** 100,109 ****
--- 100,112 ----
    product(bool, UseBarriersForVolatile, false,                          \
            "Use memory barriers to implement volatile accesses")         \
                                                                          \
    product(bool, UseCRC32, false,                                        \
            "Use CRC32 instructions for CRC32 computation")               \
+                                                                         \
+   product(bool, UseLSE, false,                                          \
+           "Use LSE instructions")                                       \
  
  // Don't attempt to use Neon on builtin sim until builtin sim supports it
  #define UseCRC32 false
  
  #else
*** 120,129 ****
--- 123,134 ----
            "Use memory barriers to implement volatile accesses")         \
    product(bool, UseNeon, false,                                         \
            "Use Neon for CRC32 computation")                             \
    product(bool, UseCRC32, false,                                        \
            "Use CRC32 instructions for CRC32 computation")               \
+   product(bool, UseLSE, false,                                          \
+           "Use LSE instructions")                                       \
    product(bool, TraceTraps, false, "Trace all traps the signal handler")
  
  #endif