Prepared by: | fyang on Fri Dec 16 17:49:46 CST 2016 |
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Workspace: | /home/yangfei/openjdk9_hs/hotspot |
Compare against: | http://hg.openjdk.java.net/jdk9/hs/hotspot |
Compare against version: | 12408 |
Summary of changes: | 202 lines changed: 77 ins; 75 del; 50 mod; 8279 unchg |
Changeset: | hotspot.changeset |
Bug id: | JDK-8169177 |
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src/cpu/aarch64/vm/c1_MacroAssembler_aarch64.cpp
rev 12409 : 8169177: aarch64: SIGSEGV when "-XX:+ZeroTLAB" is specified along with GC options Summary: Add zero-initialization to C1 for fast TLAB refills Reviewed-by: aph, drwhite Contributed-by: kavitha.natarajan@linaro.org123 lines changed: 3 ins; 74 del; 46 mod; 339 unchg
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src/cpu/aarch64/vm/c1_MacroAssembler_aarch64.hpp
rev 12409 : 8169177: aarch64: SIGSEGV when "-XX:+ZeroTLAB" is specified along with GC options Summary: Add zero-initialization to C1 for fast TLAB refills Reviewed-by: aph, drwhite Contributed-by: kavitha.natarajan@linaro.org3 lines changed: 1 ins; 1 del; 1 mod; 110 unchg
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src/cpu/aarch64/vm/c1_Runtime1_aarch64.cpp
rev 12409 : 8169177: aarch64: SIGSEGV when "-XX:+ZeroTLAB" is specified along with GC options Summary: Add zero-initialization to C1 for fast TLAB refills Reviewed-by: aph, drwhite Contributed-by: kavitha.natarajan@linaro.org5 lines changed: 2 ins; 0 del; 3 mod; 1303 unchg
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src/cpu/aarch64/vm/macroAssembler_aarch64.cpp
rev 12409 : 8169177: aarch64: SIGSEGV when "-XX:+ZeroTLAB" is specified along with GC options Summary: Add zero-initialization to C1 for fast TLAB refills Reviewed-by: aph, drwhite Contributed-by: kavitha.natarajan@linaro.org70 lines changed: 70 ins; 0 del; 0 mod; 5192 unchg
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src/cpu/aarch64/vm/macroAssembler_aarch64.hpp
rev 12409 : 8169177: aarch64: SIGSEGV when "-XX:+ZeroTLAB" is specified along with GC options Summary: Add zero-initialization to C1 for fast TLAB refills Reviewed-by: aph, drwhite Contributed-by: kavitha.natarajan@linaro.org1 line changed: 1 ins; 0 del; 0 mod; 1335 unchg
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