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src/share/vm/opto/mulnode.cpp

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rev 12501 : 8173470: [C2] Mask shift operands in ideal graph.


 615     if( t12 && t12->is_con() ) { // Shift is by a constant
 616       int shift = t12->get_con();
 617       shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 618       const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
 619       // If the AND'ing of the 2 masks has no bits, then only original shifted
 620       // bits survive.  NO sign-extension bits survive the maskings.
 621       if( (sign_bits_mask & mask) == 0 ) {
 622         // Use zero-fill shift instead
 623         Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
 624         return new AndLNode(zshift, in(2));
 625       }
 626     }
 627   }
 628 
 629   return MulNode::Ideal(phase, can_reshape);
 630 }
 631 
 632 //=============================================================================
 633 //------------------------------Identity---------------------------------------
 634 Node* LShiftINode::Identity(PhaseGVN* phase) {
 635   const TypeInt *ti = phase->type( in(2) )->isa_int();  // shift count is an int
 636   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
 637 }
 638 
 639 //------------------------------Ideal------------------------------------------
 640 // If the right input is a constant, and the left input is an add of a
 641 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 642 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 643   const Type *t  = phase->type( in(2) );
 644   if( t == Type::TOP ) return NULL;       // Right input is dead
 645   const TypeInt *t2 = t->isa_int();
 646   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
 647   const int con = t2->get_con() & ( BitsPerInt - 1 );  // masked shift count





 648 
 649   if ( con == 0 )  return NULL; // let Identity() handle 0 shift count


 650 
 651   // Left input is an add of a constant?
 652   Node *add1 = in(1);
 653   int add1_op = add1->Opcode();
 654   if( add1_op == Op_AddI ) {    // Left input is an add?
 655     assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
 656     const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
 657     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 658       // Transform is legal, but check for profit.  Avoid breaking 'i2s'
 659       // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
 660       if( con < 16 ) {
 661         // Compute X << con0
 662         Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
 663         // Compute X<<con0 + (con1<<con0)
 664         return new AddINode( lsh, phase->intcon(t12->get_con() << con));
 665       }
 666     }
 667   }
 668 
 669   // Check for "(x>>c0)<<c0" which just masks off low bits


 727   // If the shift is a constant, shift the bounds of the type,
 728   // unless this could lead to an overflow.
 729   if (!r1->is_con()) {
 730     jint lo = r1->_lo, hi = r1->_hi;
 731     if (((lo << shift) >> shift) == lo &&
 732         ((hi << shift) >> shift) == hi) {
 733       // No overflow.  The range shifts up cleanly.
 734       return TypeInt::make((jint)lo << (jint)shift,
 735                            (jint)hi << (jint)shift,
 736                            MAX2(r1->_widen,r2->_widen));
 737     }
 738     return TypeInt::INT;
 739   }
 740 
 741   return TypeInt::make( (jint)r1->get_con() << (jint)shift );
 742 }
 743 
 744 //=============================================================================
 745 //------------------------------Identity---------------------------------------
 746 Node* LShiftLNode::Identity(PhaseGVN* phase) {
 747   const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
 748   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
 749 }
 750 
 751 //------------------------------Ideal------------------------------------------
 752 // If the right input is a constant, and the left input is an add of a
 753 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 754 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 755   const Type *t  = phase->type( in(2) );
 756   if( t == Type::TOP ) return NULL;       // Right input is dead
 757   const TypeInt *t2 = t->isa_int();
 758   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
 759   const int con = t2->get_con() & ( BitsPerLong - 1 );  // masked shift count



 760 
 761   if ( con == 0 ) return NULL;  // let Identity() handle 0 shift count




 762 
 763   // Left input is an add of a constant?
 764   Node *add1 = in(1);
 765   int add1_op = add1->Opcode();
 766   if( add1_op == Op_AddL ) {    // Left input is an add?
 767     // Avoid dead data cycles from dead loops
 768     assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
 769     const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
 770     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 771       // Compute X << con0
 772       Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
 773       // Compute X<<con0 + (con1<<con0)
 774       return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
 775     }
 776   }
 777 
 778   // Check for "(x>>c0)<<c0" which just masks off low bits
 779   if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
 780       add1->in(2) == in(2) )
 781     // Convert to "(x & -(1<<c0))"


 836   // If the shift is a constant, shift the bounds of the type,
 837   // unless this could lead to an overflow.
 838   if (!r1->is_con()) {
 839     jlong lo = r1->_lo, hi = r1->_hi;
 840     if (((lo << shift) >> shift) == lo &&
 841         ((hi << shift) >> shift) == hi) {
 842       // No overflow.  The range shifts up cleanly.
 843       return TypeLong::make((jlong)lo << (jint)shift,
 844                             (jlong)hi << (jint)shift,
 845                             MAX2(r1->_widen,r2->_widen));
 846     }
 847     return TypeLong::LONG;
 848   }
 849 
 850   return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
 851 }
 852 
 853 //=============================================================================
 854 //------------------------------Identity---------------------------------------
 855 Node* RShiftINode::Identity(PhaseGVN* phase) {
 856   const TypeInt *t2 = phase->type(in(2))->isa_int();
 857   if( !t2 ) return this;
 858   if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
 859     return in(1);
 860 
 861   // Check for useless sign-masking
 862   if( in(1)->Opcode() == Op_LShiftI &&
 863       in(1)->req() == 3 &&
 864       in(1)->in(2) == in(2) &&
 865       t2->is_con() ) {
 866     uint shift = t2->get_con();
 867     shift &= BitsPerJavaInteger-1; // semantics of Java shifts
 868     // Compute masks for which this shifting doesn't change
 869     int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
 870     int hi = ~lo;               // 00007FFF
 871     const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
 872     if( !t11 ) return this;
 873     // Does actual value fit inside of mask?
 874     if( lo <= t11->_lo && t11->_hi <= hi )
 875       return in(1)->in(1);      // Then shifting is a nop
 876   }
 877 
 878   return this;
 879 }
 880 
 881 //------------------------------Ideal------------------------------------------
 882 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 883   // Inputs may be TOP if they are dead.
 884   const TypeInt *t1 = phase->type( in(1) )->isa_int();
 885   if( !t1 ) return NULL;        // Left input is an integer
 886   const TypeInt *t2 = phase->type( in(2) )->isa_int();
 887   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
 888   const TypeInt *t3;  // type of in(1).in(2)
 889   int shift = t2->get_con();
 890   shift &= BitsPerJavaInteger-1;  // semantics of Java shifts


 891 
 892   if ( shift == 0 ) return NULL;  // let Identity() handle 0 shift count
 893 




 894   // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
 895   // Such expressions arise normally from shift chains like (byte)(x >> 24).
 896   const Node *mask = in(1);
 897   if( mask->Opcode() == Op_AndI &&
 898       (t3 = phase->type(mask->in(2))->isa_int()) &&
 899       t3->is_con() ) {
 900     Node *x = mask->in(1);
 901     jint maskbits = t3->get_con();
 902     // Convert to "(x >> shift) & (mask >> shift)"
 903     Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
 904     return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
 905   }
 906 
 907   // Check for "(short[i] <<16)>>16" which simply sign-extends
 908   const Node *shl = in(1);
 909   if( shl->Opcode() != Op_LShiftI ) return NULL;
 910 
 911   if( shift == 16 &&
 912       (t3 = phase->type(shl->in(2))->isa_int()) &&
 913       t3->is_con(16) ) {


 986 #ifdef ASSERT
 987     // Make sure we get the sign-capture idiom correct.
 988     if (shift == BitsPerJavaInteger-1) {
 989       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO,    ">>31 of + is  0");
 990       if (r1->_hi <  0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
 991     }
 992 #endif
 993     return ti;
 994   }
 995 
 996   if( !r1->is_con() || !r2->is_con() )
 997     return TypeInt::INT;
 998 
 999   // Signed shift right
1000   return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1001 }
1002 
1003 //=============================================================================
1004 //------------------------------Identity---------------------------------------
1005 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1006   const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1007   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1008 }
1009 
1010 //------------------------------Value------------------------------------------
1011 // A RShiftLNode shifts its input2 right by input1 amount.
1012 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1013   const Type *t1 = phase->type( in(1) );
1014   const Type *t2 = phase->type( in(2) );
1015   // Either input is TOP ==> the result is TOP
1016   if( t1 == Type::TOP ) return Type::TOP;
1017   if( t2 == Type::TOP ) return Type::TOP;
1018 
1019   // Left input is ZERO ==> the result is ZERO.
1020   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1021   // Shift by zero does nothing
1022   if( t2 == TypeInt::ZERO ) return t1;
1023 
1024   // Either input is BOTTOM ==> the result is BOTTOM
1025   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1026     return TypeLong::LONG;
1027 


1044     jlong lo = (jlong)r1->_lo >> (jlong)shift;
1045     jlong hi = (jlong)r1->_hi >> (jlong)shift;
1046     assert(lo <= hi, "must have valid bounds");
1047     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1048     #ifdef ASSERT
1049     // Make sure we get the sign-capture idiom correct.
1050     if (shift == (2*BitsPerJavaInteger)-1) {
1051       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO,    ">>63 of + is 0");
1052       if (r1->_hi < 0)  assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1053     }
1054     #endif
1055     return tl;
1056   }
1057 
1058   return TypeLong::LONG;                // Give up
1059 }
1060 
1061 //=============================================================================
1062 //------------------------------Identity---------------------------------------
1063 Node* URShiftINode::Identity(PhaseGVN* phase) {
1064   const TypeInt *ti = phase->type( in(2) )->isa_int();
1065   if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
1066 
1067   // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1068   // Happens during new-array length computation.
1069   // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1070   Node *add = in(1);
1071   if( add->Opcode() == Op_AddI ) {
1072     const TypeInt *t2  = phase->type(add->in(2))->isa_int();
1073     if( t2 && t2->is_con(wordSize - 1) &&
1074         add->in(1)->Opcode() == Op_LShiftI ) {
1075       // Check that shift_counts are LogBytesPerWord
1076       Node          *lshift_count   = add->in(1)->in(2);
1077       const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1078       if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1079           t_lshift_count == phase->type(in(2)) ) {
1080         Node          *x   = add->in(1)->in(1);
1081         const TypeInt *t_x = phase->type(x)->isa_int();
1082         if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1083           return x;
1084         }
1085       }
1086     }
1087   }
1088 
1089   return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1090 }
1091 
1092 //------------------------------Ideal------------------------------------------
1093 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1094   const TypeInt *t2 = phase->type( in(2) )->isa_int();
1095   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1096   const int con = t2->get_con() & 31; // Shift count is always masked
1097   if ( con == 0 ) return NULL;  // let Identity() handle a 0 shift count









1098   // We'll be wanting the right-shift amount as a mask of that many bits
1099   const int mask = right_n_bits(BitsPerJavaInteger - con);
1100 
1101   int in1_op = in(1)->Opcode();
1102 
1103   // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1104   if( in1_op == Op_URShiftI ) {
1105     const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1106     if( t12 && t12->is_con() ) { // Right input is a constant
1107       assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1108       const int con2 = t12->get_con() & 31; // Shift count is always masked
1109       const int con3 = con+con2;
1110       if( con3 < 32 )           // Only merge shifts if total is < 32
1111         return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1112     }
1113   }
1114 
1115   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1116   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1117   // If Q is "X << z" the rounding is useless.  Look for patterns like


1214   // Do not support shifted oops in info for GC
1215   //
1216   // else if( t1->base() == Type::InstPtr ) {
1217   //
1218   //   const TypeInstPtr *o = t1->is_instptr();
1219   //   if( t1->singleton() )
1220   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1221   // }
1222   // else if( t1->base() == Type::KlassPtr ) {
1223   //   const TypeKlassPtr *o = t1->is_klassptr();
1224   //   if( t1->singleton() )
1225   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1226   // }
1227 
1228   return TypeInt::INT;
1229 }
1230 
1231 //=============================================================================
1232 //------------------------------Identity---------------------------------------
1233 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1234   const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1235   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1236 }
1237 
1238 //------------------------------Ideal------------------------------------------
1239 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1240   const TypeInt *t2 = phase->type( in(2) )->isa_int();
1241   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1242   const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
1243   if ( con == 0 ) return NULL;  // let Identity() handle a 0 shift count
1244                               // note: mask computation below does not work for 0 shift count








1245   // We'll be wanting the right-shift amount as a mask of that many bits
1246   const jlong mask = jlong(max_julong >> con);
1247 
1248   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1249   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1250   // If Q is "X << z" the rounding is useless.  Look for patterns like
1251   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1252   Node *add = in(1);
1253   if( add->Opcode() == Op_AddL ) {
1254     Node *lshl = add->in(1);
1255     if( lshl->Opcode() == Op_LShiftL &&
1256         phase->type(lshl->in(2)) == t2 ) {
1257       Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1258       Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1259       return new AndLNode( sum, phase->longcon(mask) );
1260     }
1261   }
1262 
1263   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1264   // This shortens the mask.  Also, if we are extracting a high byte and




 615     if( t12 && t12->is_con() ) { // Shift is by a constant
 616       int shift = t12->get_con();
 617       shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 618       const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
 619       // If the AND'ing of the 2 masks has no bits, then only original shifted
 620       // bits survive.  NO sign-extension bits survive the maskings.
 621       if( (sign_bits_mask & mask) == 0 ) {
 622         // Use zero-fill shift instead
 623         Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
 624         return new AndLNode(zshift, in(2));
 625       }
 626     }
 627   }
 628 
 629   return MulNode::Ideal(phase, can_reshape);
 630 }
 631 
 632 //=============================================================================
 633 //------------------------------Identity---------------------------------------
 634 Node* LShiftINode::Identity(PhaseGVN* phase) {
 635   const TypeInt *ti = phase->type(in(2))->isa_int();  // shift count is an int
 636   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaInteger - 1)) == 0) ? in(1) : this;
 637 }
 638 
 639 //------------------------------Ideal------------------------------------------
 640 // If the right input is a constant, and the left input is an add of a
 641 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 642 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 643   const Type *t = phase->type(in(2));
 644   if (t == Type::TOP) return NULL;      // Right input is dead.
 645   const TypeInt *t2 = t->isa_int();
 646   if (!t2 || !t2->is_con()) return NULL; // Right input is a constant.
 647 
 648   // Mask useful bits of constant shift count.
 649   const int in2_con = t2->get_con();
 650   const int con     = in2_con & (BitsPerJavaInteger - 1);   // masked shift count
 651 
 652   if (con == 0)  return NULL; // Let Identity() handle 0 shift count.
 653 
 654   if (in2_con != con) {
 655     set_req(2, phase->intcon(con)); // Replace shift count with masked value.
 656   }
 657 
 658   // Left input is an add of a constant?
 659   Node *add1 = in(1);
 660   int add1_op = add1->Opcode();
 661   if( add1_op == Op_AddI ) {    // Left input is an add?
 662     assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
 663     const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
 664     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 665       // Transform is legal, but check for profit.  Avoid breaking 'i2s'
 666       // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
 667       if( con < 16 ) {
 668         // Compute X << con0
 669         Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
 670         // Compute X<<con0 + (con1<<con0)
 671         return new AddINode( lsh, phase->intcon(t12->get_con() << con));
 672       }
 673     }
 674   }
 675 
 676   // Check for "(x>>c0)<<c0" which just masks off low bits


 734   // If the shift is a constant, shift the bounds of the type,
 735   // unless this could lead to an overflow.
 736   if (!r1->is_con()) {
 737     jint lo = r1->_lo, hi = r1->_hi;
 738     if (((lo << shift) >> shift) == lo &&
 739         ((hi << shift) >> shift) == hi) {
 740       // No overflow.  The range shifts up cleanly.
 741       return TypeInt::make((jint)lo << (jint)shift,
 742                            (jint)hi << (jint)shift,
 743                            MAX2(r1->_widen,r2->_widen));
 744     }
 745     return TypeInt::INT;
 746   }
 747 
 748   return TypeInt::make( (jint)r1->get_con() << (jint)shift );
 749 }
 750 
 751 //=============================================================================
 752 //------------------------------Identity---------------------------------------
 753 Node* LShiftLNode::Identity(PhaseGVN* phase) {
 754   const TypeInt *ti = phase->type(in(2))->isa_int(); // Shift count is an int.
 755   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
 756 }
 757 
 758 //------------------------------Ideal------------------------------------------
 759 // If the right input is a constant, and the left input is an add of a
 760 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 761 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 762   const Type *t = phase->type(in(2));
 763   if (t == Type::TOP) return NULL;       // Right input is dead.
 764   const TypeInt *t2 = t->isa_int();
 765   if (!t2 || !t2->is_con()) return NULL; // Right input is a constant.
 766 
 767   // Mask useful bits of constant shift count.
 768   const int in2_con = t2->get_con();
 769   const int con     = in2_con & (BitsPerJavaLong - 1);  // masked shift count
 770 
 771   if (con == 0) return NULL;  // Let Identity() handle 0 shift count.
 772 
 773   if (in2_con != con) {
 774     set_req(2, phase->intcon(con)); // Replace shift count with masked value.
 775   }
 776 
 777   // Left input is an add of a constant?
 778   Node *add1 = in(1);
 779   int add1_op = add1->Opcode();
 780   if( add1_op == Op_AddL ) {    // Left input is an add?
 781     // Avoid dead data cycles from dead loops
 782     assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
 783     const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
 784     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 785       // Compute X << con0
 786       Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
 787       // Compute X<<con0 + (con1<<con0)
 788       return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
 789     }
 790   }
 791 
 792   // Check for "(x>>c0)<<c0" which just masks off low bits
 793   if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
 794       add1->in(2) == in(2) )
 795     // Convert to "(x & -(1<<c0))"


 850   // If the shift is a constant, shift the bounds of the type,
 851   // unless this could lead to an overflow.
 852   if (!r1->is_con()) {
 853     jlong lo = r1->_lo, hi = r1->_hi;
 854     if (((lo << shift) >> shift) == lo &&
 855         ((hi << shift) >> shift) == hi) {
 856       // No overflow.  The range shifts up cleanly.
 857       return TypeLong::make((jlong)lo << (jint)shift,
 858                             (jlong)hi << (jint)shift,
 859                             MAX2(r1->_widen,r2->_widen));
 860     }
 861     return TypeLong::LONG;
 862   }
 863 
 864   return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
 865 }
 866 
 867 //=============================================================================
 868 //------------------------------Identity---------------------------------------
 869 Node* RShiftINode::Identity(PhaseGVN* phase) {
 870   const TypeInt *t2 = phase->type(in(2))->isa_int(); // Shift count is an int.
 871   if (!t2) return this;
 872   if (t2->is_con() && (t2->get_con() & (BitsPerJavaInteger - 1)) == 0) return in(1);

 873 
 874   // Check for useless sign-masking
 875   if( in(1)->Opcode() == Op_LShiftI &&
 876       in(1)->req() == 3 &&
 877       in(1)->in(2) == in(2) &&
 878       t2->is_con() ) {
 879     uint shift = t2->get_con();
 880     shift &= BitsPerJavaInteger-1; // semantics of Java shifts
 881     // Compute masks for which this shifting doesn't change
 882     int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
 883     int hi = ~lo;               // 00007FFF
 884     const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
 885     if( !t11 ) return this;
 886     // Does actual value fit inside of mask?
 887     if( lo <= t11->_lo && t11->_hi <= hi )
 888       return in(1)->in(1);      // Then shifting is a nop
 889   }
 890 
 891   return this;
 892 }
 893 
 894 //------------------------------Ideal------------------------------------------
 895 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 896   // Inputs may be TOP if they are dead.
 897   const TypeInt *t1 = phase->type( in(1) )->isa_int();
 898   if( !t1 ) return NULL;        // Left input is an integer
 899   const TypeInt *t2 = phase->type( in(2) )->isa_int();
 900   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
 901   const TypeInt *t3;  // type of in(1).in(2)
 902 
 903   // Mask useful bits of constant shift count.
 904   int in2_shift = t2->get_con();
 905   int shift     = in2_shift & BitsPerJavaInteger-1;  // semantics of Java shifts
 906 
 907   if ( shift == 0 ) return NULL;  // let Identity() handle 0 shift count
 908 
 909   if (in2_shift != shift) {
 910     set_req( 2, phase->intcon(shift) ); // Replace shift count with masked value.
 911   }
 912 
 913   // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
 914   // Such expressions arise normally from shift chains like (byte)(x >> 24).
 915   const Node *mask = in(1);
 916   if( mask->Opcode() == Op_AndI &&
 917       (t3 = phase->type(mask->in(2))->isa_int()) &&
 918       t3->is_con() ) {
 919     Node *x = mask->in(1);
 920     jint maskbits = t3->get_con();
 921     // Convert to "(x >> shift) & (mask >> shift)"
 922     Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
 923     return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
 924   }
 925 
 926   // Check for "(short[i] <<16)>>16" which simply sign-extends
 927   const Node *shl = in(1);
 928   if( shl->Opcode() != Op_LShiftI ) return NULL;
 929 
 930   if( shift == 16 &&
 931       (t3 = phase->type(shl->in(2))->isa_int()) &&
 932       t3->is_con(16) ) {


1005 #ifdef ASSERT
1006     // Make sure we get the sign-capture idiom correct.
1007     if (shift == BitsPerJavaInteger-1) {
1008       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO,    ">>31 of + is  0");
1009       if (r1->_hi <  0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1010     }
1011 #endif
1012     return ti;
1013   }
1014 
1015   if( !r1->is_con() || !r2->is_con() )
1016     return TypeInt::INT;
1017 
1018   // Signed shift right
1019   return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1020 }
1021 
1022 //=============================================================================
1023 //------------------------------Identity---------------------------------------
1024 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1025   const TypeInt *ti = phase->type(in(2))->isa_int(); // Shift count is an int.
1026   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1027 }
1028 
1029 //------------------------------Value------------------------------------------
1030 // A RShiftLNode shifts its input2 right by input1 amount.
1031 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1032   const Type *t1 = phase->type( in(1) );
1033   const Type *t2 = phase->type( in(2) );
1034   // Either input is TOP ==> the result is TOP
1035   if( t1 == Type::TOP ) return Type::TOP;
1036   if( t2 == Type::TOP ) return Type::TOP;
1037 
1038   // Left input is ZERO ==> the result is ZERO.
1039   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1040   // Shift by zero does nothing
1041   if( t2 == TypeInt::ZERO ) return t1;
1042 
1043   // Either input is BOTTOM ==> the result is BOTTOM
1044   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1045     return TypeLong::LONG;
1046 


1063     jlong lo = (jlong)r1->_lo >> (jlong)shift;
1064     jlong hi = (jlong)r1->_hi >> (jlong)shift;
1065     assert(lo <= hi, "must have valid bounds");
1066     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1067     #ifdef ASSERT
1068     // Make sure we get the sign-capture idiom correct.
1069     if (shift == (2*BitsPerJavaInteger)-1) {
1070       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO,    ">>63 of + is 0");
1071       if (r1->_hi < 0)  assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1072     }
1073     #endif
1074     return tl;
1075   }
1076 
1077   return TypeLong::LONG;                // Give up
1078 }
1079 
1080 //=============================================================================
1081 //------------------------------Identity---------------------------------------
1082 Node* URShiftINode::Identity(PhaseGVN* phase) {
1083   const TypeInt *ti = phase->type(in(2))->isa_int();
1084   if (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaInteger - 1)) == 0) return in(1);
1085 
1086   // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1087   // Happens during new-array length computation.
1088   // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1089   Node *add = in(1);
1090   if( add->Opcode() == Op_AddI ) {
1091     const TypeInt *t2  = phase->type(add->in(2))->isa_int();
1092     if( t2 && t2->is_con(wordSize - 1) &&
1093         add->in(1)->Opcode() == Op_LShiftI ) {
1094       // Check that shift_counts are LogBytesPerWord
1095       Node          *lshift_count   = add->in(1)->in(2);
1096       const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1097       if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1098           t_lshift_count == phase->type(in(2)) ) {
1099         Node          *x   = add->in(1)->in(1);
1100         const TypeInt *t_x = phase->type(x)->isa_int();
1101         if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1102           return x;
1103         }
1104       }
1105     }
1106   }
1107 
1108   return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1109 }
1110 
1111 //------------------------------Ideal------------------------------------------
1112 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1113   const TypeInt *t2 = phase->type( in(2) )->isa_int();
1114   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1115 
1116   // Mask useful bits of constant shift count.
1117   const int in2_con = t2->get_con();
1118   const int con     = in2_con & (BitsPerJavaInteger - 1);   // masked shift count
1119 
1120   if (con == 0) return NULL;  // Let Identity() handle 0 shift count.
1121 
1122   if (in2_con != con) {
1123     set_req(2, phase->intcon(con)); // Replace shift count with masked value.
1124   }
1125 
1126   // We'll be wanting the right-shift amount as a mask of that many bits
1127   const int mask = right_n_bits(BitsPerJavaInteger - con);
1128 
1129   int in1_op = in(1)->Opcode();
1130 
1131   // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1132   if( in1_op == Op_URShiftI ) {
1133     const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1134     if( t12 && t12->is_con() ) { // Right input is a constant
1135       assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1136       const int con2 = t12->get_con() & 31; // Shift count is always masked
1137       const int con3 = con+con2;
1138       if( con3 < 32 )           // Only merge shifts if total is < 32
1139         return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1140     }
1141   }
1142 
1143   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1144   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1145   // If Q is "X << z" the rounding is useless.  Look for patterns like


1242   // Do not support shifted oops in info for GC
1243   //
1244   // else if( t1->base() == Type::InstPtr ) {
1245   //
1246   //   const TypeInstPtr *o = t1->is_instptr();
1247   //   if( t1->singleton() )
1248   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1249   // }
1250   // else if( t1->base() == Type::KlassPtr ) {
1251   //   const TypeKlassPtr *o = t1->is_klassptr();
1252   //   if( t1->singleton() )
1253   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1254   // }
1255 
1256   return TypeInt::INT;
1257 }
1258 
1259 //=============================================================================
1260 //------------------------------Identity---------------------------------------
1261 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1262   const TypeInt *ti = phase->type(in(2))->isa_int(); // shift count is an int
1263   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1264 }
1265 
1266 //------------------------------Ideal------------------------------------------
1267 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1268   const TypeInt *t2 = phase->type( in(2) )->isa_int();
1269   if (!t2 || !t2->is_con()) return NULL; // Right input is a constant.
1270 
1271   // Mask useful bits of constant shift count.
1272   const int in2_con = t2->get_con();
1273   const int con     = in2_con & (BitsPerJavaLong - 1);   // masked shift count
1274 
1275   if (con == 0) return NULL;  // Let Identity() handle 0 shift count.
1276 
1277   if (in2_con != con) {
1278     set_req(2, phase->intcon(con)); // Replace shift count with masked value.
1279   }
1280 
1281   // We'll be wanting the right-shift amount as a mask of that many bits
1282   const jlong mask = jlong(max_julong >> con);
1283 
1284   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1285   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1286   // If Q is "X << z" the rounding is useless.  Look for patterns like
1287   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1288   Node *add = in(1);
1289   if( add->Opcode() == Op_AddL ) {
1290     Node *lshl = add->in(1);
1291     if( lshl->Opcode() == Op_LShiftL &&
1292         phase->type(lshl->in(2)) == t2 ) {
1293       Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1294       Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1295       return new AndLNode( sum, phase->longcon(mask) );
1296     }
1297   }
1298 
1299   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1300   // This shortens the mask.  Also, if we are extracting a high byte and


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