< prev index next >

src/hotspot/cpu/x86/gc/g1/g1BarrierSetAssembler_x86.cpp

Print this page
rev 50745 : imported patch remove_in_concurrent_root


 332   __ bind(runtime);
 333   // save the live input values
 334   __ push(store_addr);
 335   __ push(new_val);
 336 #ifdef _LP64
 337   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, r15_thread);
 338 #else
 339   __ push(thread);
 340   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
 341   __ pop(thread);
 342 #endif
 343   __ pop(new_val);
 344   __ pop(store_addr);
 345 
 346   __ bind(done);
 347 }
 348 
 349 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 350                                          Address dst, Register val, Register tmp1, Register tmp2) {
 351   bool in_heap = (decorators & IN_HEAP) != 0;
 352   bool in_concurrent_root = (decorators & IN_CONCURRENT_ROOT) != 0;

 353 
 354   bool needs_pre_barrier = in_heap || in_concurrent_root;
 355   bool needs_post_barrier = val != noreg && in_heap;
 356 
 357   Register tmp3 = LP64_ONLY(r8) NOT_LP64(rsi);
 358   Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
 359   // flatten object address if needed
 360   // We do it regardless of precise because we need the registers
 361   if (dst.index() == noreg && dst.disp() == 0) {
 362     if (dst.base() != tmp1) {
 363       __ movptr(tmp1, dst.base());
 364     }
 365   } else {
 366     __ lea(tmp1, dst);
 367   }
 368 
 369 #ifndef _LP64
 370   InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm);
 371 #endif
 372 
 373   NOT_LP64(__ get_thread(rcx));
 374   NOT_LP64(imasm->save_bcp());




 332   __ bind(runtime);
 333   // save the live input values
 334   __ push(store_addr);
 335   __ push(new_val);
 336 #ifdef _LP64
 337   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, r15_thread);
 338 #else
 339   __ push(thread);
 340   __ call_VM_leaf(CAST_FROM_FN_PTR(address, G1BarrierSetRuntime::write_ref_field_post_entry), card_addr, thread);
 341   __ pop(thread);
 342 #endif
 343   __ pop(new_val);
 344   __ pop(store_addr);
 345 
 346   __ bind(done);
 347 }
 348 
 349 void G1BarrierSetAssembler::oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 350                                          Address dst, Register val, Register tmp1, Register tmp2) {
 351   bool in_heap = (decorators & IN_HEAP) != 0;
 352   bool as_normal = (decorators & AS_NORMAL) != 0;
 353   assert((decorators & IS_DEST_UNINITIALIZED) == 0, "unsupported");
 354 
 355   bool needs_pre_barrier = as_normal;
 356   bool needs_post_barrier = val != noreg && in_heap;
 357 
 358   Register tmp3 = LP64_ONLY(r8) NOT_LP64(rsi);
 359   Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
 360   // flatten object address if needed
 361   // We do it regardless of precise because we need the registers
 362   if (dst.index() == noreg && dst.disp() == 0) {
 363     if (dst.base() != tmp1) {
 364       __ movptr(tmp1, dst.base());
 365     }
 366   } else {
 367     __ lea(tmp1, dst);
 368   }
 369 
 370 #ifndef _LP64
 371   InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm);
 372 #endif
 373 
 374   NOT_LP64(__ get_thread(rcx));
 375   NOT_LP64(imasm->save_bcp());


< prev index next >