5221 // The inverted mask is sign-extended
5222 andptr(possibly_jweak, inverted_jweak_mask);
5223 }
5224
5225 void MacroAssembler::resolve_jobject(Register value,
5226 Register thread,
5227 Register tmp) {
5228 assert_different_registers(value, thread, tmp);
5229 Label done, not_weak;
5230 testptr(value, value);
5231 jcc(Assembler::zero, done); // Use NULL as-is.
5232 testptr(value, JNIHandles::weak_tag_mask); // Test for jweak tag.
5233 jcc(Assembler::zero, not_weak);
5234 // Resolve jweak.
5235 access_load_at(T_OBJECT, IN_NATIVE | ON_PHANTOM_OOP_REF,
5236 value, Address(value, -JNIHandles::weak_tag_value), tmp, thread);
5237 verify_oop(value);
5238 jmp(done);
5239 bind(not_weak);
5240 // Resolve (untagged) jobject.
5241 access_load_at(T_OBJECT, IN_CONCURRENT_ROOT,
5242 value, Address(value, 0), tmp, thread);
5243 verify_oop(value);
5244 bind(done);
5245 }
5246
5247 void MacroAssembler::subptr(Register dst, int32_t imm32) {
5248 LP64_ONLY(subq(dst, imm32)) NOT_LP64(subl(dst, imm32));
5249 }
5250
5251 // Force generation of a 4 byte immediate value even if it fits into 8bit
5252 void MacroAssembler::subptr_imm32(Register dst, int32_t imm32) {
5253 LP64_ONLY(subq_imm32(dst, imm32)) NOT_LP64(subl_imm32(dst, imm32));
5254 }
5255
5256 void MacroAssembler::subptr(Register dst, Register src) {
5257 LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src));
5258 }
5259
5260 // C++ bool manipulation
5261 void MacroAssembler::testbool(Register dst) {
5262 if(sizeof(bool) == 1)
6199 kmovwl(k1, rcx);
6200 pop(rcx);
6201 }
6202
6203 #ifndef _LP64
6204 // Either restore the x87 floating pointer control word after returning
6205 // from the JNI call or verify that it wasn't changed.
6206 if (CheckJNICalls) {
6207 call(RuntimeAddress(StubRoutines::x86::verify_fpu_cntrl_wrd_entry()));
6208 }
6209 #endif // _LP64
6210 }
6211
6212 // ((OopHandle)result).resolve();
6213 void MacroAssembler::resolve_oop_handle(Register result, Register tmp) {
6214 assert_different_registers(result, tmp);
6215
6216 // Only 64 bit platforms support GCs that require a tmp register
6217 // Only IN_HEAP loads require a thread_tmp register
6218 // OopHandle::resolve is an indirection like jobject.
6219 access_load_at(T_OBJECT, IN_CONCURRENT_ROOT,
6220 result, Address(result, 0), tmp, /*tmp_thread*/noreg);
6221 }
6222
6223 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
6224 // get mirror
6225 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
6226 movptr(mirror, Address(method, Method::const_offset()));
6227 movptr(mirror, Address(mirror, ConstMethod::constants_offset()));
6228 movptr(mirror, Address(mirror, ConstantPool::pool_holder_offset_in_bytes()));
6229 movptr(mirror, Address(mirror, mirror_offset));
6230 resolve_oop_handle(mirror, tmp);
6231 }
6232
6233 void MacroAssembler::load_klass(Register dst, Register src) {
6234 #ifdef _LP64
6235 if (UseCompressedClassPointers) {
6236 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
6237 decode_klass_not_null(dst);
6238 } else
6239 #endif
|
5221 // The inverted mask is sign-extended
5222 andptr(possibly_jweak, inverted_jweak_mask);
5223 }
5224
5225 void MacroAssembler::resolve_jobject(Register value,
5226 Register thread,
5227 Register tmp) {
5228 assert_different_registers(value, thread, tmp);
5229 Label done, not_weak;
5230 testptr(value, value);
5231 jcc(Assembler::zero, done); // Use NULL as-is.
5232 testptr(value, JNIHandles::weak_tag_mask); // Test for jweak tag.
5233 jcc(Assembler::zero, not_weak);
5234 // Resolve jweak.
5235 access_load_at(T_OBJECT, IN_NATIVE | ON_PHANTOM_OOP_REF,
5236 value, Address(value, -JNIHandles::weak_tag_value), tmp, thread);
5237 verify_oop(value);
5238 jmp(done);
5239 bind(not_weak);
5240 // Resolve (untagged) jobject.
5241 access_load_at(T_OBJECT, IN_NATIVE, value, Address(value, 0), tmp, thread);
5242 verify_oop(value);
5243 bind(done);
5244 }
5245
5246 void MacroAssembler::subptr(Register dst, int32_t imm32) {
5247 LP64_ONLY(subq(dst, imm32)) NOT_LP64(subl(dst, imm32));
5248 }
5249
5250 // Force generation of a 4 byte immediate value even if it fits into 8bit
5251 void MacroAssembler::subptr_imm32(Register dst, int32_t imm32) {
5252 LP64_ONLY(subq_imm32(dst, imm32)) NOT_LP64(subl_imm32(dst, imm32));
5253 }
5254
5255 void MacroAssembler::subptr(Register dst, Register src) {
5256 LP64_ONLY(subq(dst, src)) NOT_LP64(subl(dst, src));
5257 }
5258
5259 // C++ bool manipulation
5260 void MacroAssembler::testbool(Register dst) {
5261 if(sizeof(bool) == 1)
6198 kmovwl(k1, rcx);
6199 pop(rcx);
6200 }
6201
6202 #ifndef _LP64
6203 // Either restore the x87 floating pointer control word after returning
6204 // from the JNI call or verify that it wasn't changed.
6205 if (CheckJNICalls) {
6206 call(RuntimeAddress(StubRoutines::x86::verify_fpu_cntrl_wrd_entry()));
6207 }
6208 #endif // _LP64
6209 }
6210
6211 // ((OopHandle)result).resolve();
6212 void MacroAssembler::resolve_oop_handle(Register result, Register tmp) {
6213 assert_different_registers(result, tmp);
6214
6215 // Only 64 bit platforms support GCs that require a tmp register
6216 // Only IN_HEAP loads require a thread_tmp register
6217 // OopHandle::resolve is an indirection like jobject.
6218 access_load_at(T_OBJECT, IN_NATIVE,
6219 result, Address(result, 0), tmp, /*tmp_thread*/noreg);
6220 }
6221
6222 void MacroAssembler::load_mirror(Register mirror, Register method, Register tmp) {
6223 // get mirror
6224 const int mirror_offset = in_bytes(Klass::java_mirror_offset());
6225 movptr(mirror, Address(method, Method::const_offset()));
6226 movptr(mirror, Address(mirror, ConstMethod::constants_offset()));
6227 movptr(mirror, Address(mirror, ConstantPool::pool_holder_offset_in_bytes()));
6228 movptr(mirror, Address(mirror, mirror_offset));
6229 resolve_oop_handle(mirror, tmp);
6230 }
6231
6232 void MacroAssembler::load_klass(Register dst, Register src) {
6233 #ifdef _LP64
6234 if (UseCompressedClassPointers) {
6235 movl(dst, Address(src, oopDesc::klass_offset_in_bytes()));
6236 decode_klass_not_null(dst);
6237 } else
6238 #endif
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