487 REX_B = 0x41,
488 REX_X = 0x42,
489 REX_XB = 0x43,
490 REX_R = 0x44,
491 REX_RB = 0x45,
492 REX_RX = 0x46,
493 REX_RXB = 0x47,
494
495 REX_W = 0x48,
496
497 REX_WB = 0x49,
498 REX_WX = 0x4A,
499 REX_WXB = 0x4B,
500 REX_WR = 0x4C,
501 REX_WRB = 0x4D,
502 REX_WRX = 0x4E,
503 REX_WRXB = 0x4F,
504
505 VEX_3bytes = 0xC4,
506 VEX_2bytes = 0xC5,
507 EVEX_4bytes = 0x62
508 };
509
510 enum VexPrefix {
511 VEX_B = 0x20,
512 VEX_X = 0x40,
513 VEX_R = 0x80,
514 VEX_W = 0x80
515 };
516
517 enum ExexPrefix {
518 EVEX_F = 0x04,
519 EVEX_V = 0x08,
520 EVEX_Rb = 0x10,
521 EVEX_X = 0x40,
522 EVEX_Z = 0x80
523 };
524
525 enum VexSimdPrefix {
526 VEX_SIMD_NONE = 0x0,
527 VEX_SIMD_66 = 0x1,
591 //
592 // This does mean you'll get a linker/runtime error if you use a 64bit only instruction
593 // in a 32bit vm. This is somewhat unfortunate but keeps the ifdef noise down.
594
595 private:
596
597 int evex_encoding;
598 int input_size_in_bits;
599 int avx_vector_len;
600 int tuple_type;
601 bool is_evex_instruction;
602
603 // 64bit prefixes
604 int prefix_and_encode(int reg_enc, bool byteinst = false);
605 int prefixq_and_encode(int reg_enc);
606
607 int prefix_and_encode(int dst_enc, int src_enc, bool byteinst = false);
608 int prefixq_and_encode(int dst_enc, int src_enc);
609
610 void prefix(Register reg);
611 void prefix(Address adr);
612 void prefixq(Address adr);
613
614 void prefix(Address adr, Register reg, bool byteinst = false);
615 void prefix(Address adr, XMMRegister reg);
616 void prefixq(Address adr, Register reg);
617 void prefixq(Address adr, XMMRegister reg);
618
619 void prefetch_prefix(Address src);
620
621 void rex_prefix(Address adr, XMMRegister xreg,
622 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
623 int rex_prefix_and_encode(int dst_enc, int src_enc,
624 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
625
626 void vex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w,
627 int nds_enc, VexSimdPrefix pre, VexOpcode opc,
628 int vector_len);
629
630 void evex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w, bool evex_r, bool evex_v,
1148 void cmpw(Address dst, int imm16);
1149
1150 void cmpxchg8 (Address adr);
1151
1152 void cmpxchgb(Register reg, Address adr);
1153 void cmpxchgl(Register reg, Address adr);
1154
1155 void cmpxchgq(Register reg, Address adr);
1156
1157 // Ordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
1158 void comisd(XMMRegister dst, Address src);
1159 void comisd(XMMRegister dst, XMMRegister src);
1160
1161 // Ordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
1162 void comiss(XMMRegister dst, Address src);
1163 void comiss(XMMRegister dst, XMMRegister src);
1164
1165 // Identify processor type and features
1166 void cpuid();
1167
1168 // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
1169 void cvtsd2ss(XMMRegister dst, XMMRegister src);
1170 void cvtsd2ss(XMMRegister dst, Address src);
1171
1172 // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
1173 void cvtsi2sdl(XMMRegister dst, Register src);
1174 void cvtsi2sdl(XMMRegister dst, Address src);
1175 void cvtsi2sdq(XMMRegister dst, Register src);
1176 void cvtsi2sdq(XMMRegister dst, Address src);
1177
1178 // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value
1179 void cvtsi2ssl(XMMRegister dst, Register src);
1180 void cvtsi2ssl(XMMRegister dst, Address src);
1181 void cvtsi2ssq(XMMRegister dst, Register src);
1182 void cvtsi2ssq(XMMRegister dst, Address src);
1183
1184 // Convert Packed Signed Doubleword Integers to Packed Double-Precision Floating-Point Value
1185 void cvtdq2pd(XMMRegister dst, XMMRegister src);
1186
1187 // Convert Packed Signed Doubleword Integers to Packed Single-Precision Floating-Point Value
1747
1748 void sarl(Register dst, int imm8);
1749 void sarl(Register dst);
1750
1751 void sarq(Register dst, int imm8);
1752 void sarq(Register dst);
1753
1754 void sbbl(Address dst, int32_t imm32);
1755 void sbbl(Register dst, int32_t imm32);
1756 void sbbl(Register dst, Address src);
1757 void sbbl(Register dst, Register src);
1758
1759 void sbbq(Address dst, int32_t imm32);
1760 void sbbq(Register dst, int32_t imm32);
1761 void sbbq(Register dst, Address src);
1762 void sbbq(Register dst, Register src);
1763
1764 void setb(Condition cc, Register dst);
1765
1766 void shldl(Register dst, Register src);
1767
1768 void shll(Register dst, int imm8);
1769 void shll(Register dst);
1770
1771 void shlq(Register dst, int imm8);
1772 void shlq(Register dst);
1773
1774 void shrdl(Register dst, Register src);
1775
1776 void shrl(Register dst, int imm8);
1777 void shrl(Register dst);
1778
1779 void shrq(Register dst, int imm8);
1780 void shrq(Register dst);
1781
1782 void smovl(); // QQQ generic?
1783
1784 // Compute Square Root of Scalar Double-Precision Floating-Point Value
1785 void sqrtsd(XMMRegister dst, Address src);
1786 void sqrtsd(XMMRegister dst, XMMRegister src);
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487 REX_B = 0x41,
488 REX_X = 0x42,
489 REX_XB = 0x43,
490 REX_R = 0x44,
491 REX_RB = 0x45,
492 REX_RX = 0x46,
493 REX_RXB = 0x47,
494
495 REX_W = 0x48,
496
497 REX_WB = 0x49,
498 REX_WX = 0x4A,
499 REX_WXB = 0x4B,
500 REX_WR = 0x4C,
501 REX_WRB = 0x4D,
502 REX_WRX = 0x4E,
503 REX_WRXB = 0x4F,
504
505 VEX_3bytes = 0xC4,
506 VEX_2bytes = 0xC5,
507 EVEX_4bytes = 0x62,
508 Prefix_EMPTY = 0x0
509 };
510
511 enum VexPrefix {
512 VEX_B = 0x20,
513 VEX_X = 0x40,
514 VEX_R = 0x80,
515 VEX_W = 0x80
516 };
517
518 enum ExexPrefix {
519 EVEX_F = 0x04,
520 EVEX_V = 0x08,
521 EVEX_Rb = 0x10,
522 EVEX_X = 0x40,
523 EVEX_Z = 0x80
524 };
525
526 enum VexSimdPrefix {
527 VEX_SIMD_NONE = 0x0,
528 VEX_SIMD_66 = 0x1,
592 //
593 // This does mean you'll get a linker/runtime error if you use a 64bit only instruction
594 // in a 32bit vm. This is somewhat unfortunate but keeps the ifdef noise down.
595
596 private:
597
598 int evex_encoding;
599 int input_size_in_bits;
600 int avx_vector_len;
601 int tuple_type;
602 bool is_evex_instruction;
603
604 // 64bit prefixes
605 int prefix_and_encode(int reg_enc, bool byteinst = false);
606 int prefixq_and_encode(int reg_enc);
607
608 int prefix_and_encode(int dst_enc, int src_enc, bool byteinst = false);
609 int prefixq_and_encode(int dst_enc, int src_enc);
610
611 void prefix(Register reg);
612 void prefix(Register dst, Register src, Prefix p);
613 void prefix(Register dst, Address adr, Prefix p);
614 void prefix(Address adr);
615 void prefixq(Address adr);
616
617 void prefix(Address adr, Register reg, bool byteinst = false);
618 void prefix(Address adr, XMMRegister reg);
619 void prefixq(Address adr, Register reg);
620 void prefixq(Address adr, XMMRegister reg);
621
622 void prefetch_prefix(Address src);
623
624 void rex_prefix(Address adr, XMMRegister xreg,
625 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
626 int rex_prefix_and_encode(int dst_enc, int src_enc,
627 VexSimdPrefix pre, VexOpcode opc, bool rex_w);
628
629 void vex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w,
630 int nds_enc, VexSimdPrefix pre, VexOpcode opc,
631 int vector_len);
632
633 void evex_prefix(bool vex_r, bool vex_b, bool vex_x, bool vex_w, bool evex_r, bool evex_v,
1151 void cmpw(Address dst, int imm16);
1152
1153 void cmpxchg8 (Address adr);
1154
1155 void cmpxchgb(Register reg, Address adr);
1156 void cmpxchgl(Register reg, Address adr);
1157
1158 void cmpxchgq(Register reg, Address adr);
1159
1160 // Ordered Compare Scalar Double-Precision Floating-Point Values and set EFLAGS
1161 void comisd(XMMRegister dst, Address src);
1162 void comisd(XMMRegister dst, XMMRegister src);
1163
1164 // Ordered Compare Scalar Single-Precision Floating-Point Values and set EFLAGS
1165 void comiss(XMMRegister dst, Address src);
1166 void comiss(XMMRegister dst, XMMRegister src);
1167
1168 // Identify processor type and features
1169 void cpuid();
1170
1171 // CRC32C
1172 void crc32(Register crc, Register v, int8_t sizeInBytes);
1173 void crc32(Register crc, Address adr, int8_t sizeInBytes);
1174
1175 // Convert Scalar Double-Precision Floating-Point Value to Scalar Single-Precision Floating-Point Value
1176 void cvtsd2ss(XMMRegister dst, XMMRegister src);
1177 void cvtsd2ss(XMMRegister dst, Address src);
1178
1179 // Convert Doubleword Integer to Scalar Double-Precision Floating-Point Value
1180 void cvtsi2sdl(XMMRegister dst, Register src);
1181 void cvtsi2sdl(XMMRegister dst, Address src);
1182 void cvtsi2sdq(XMMRegister dst, Register src);
1183 void cvtsi2sdq(XMMRegister dst, Address src);
1184
1185 // Convert Doubleword Integer to Scalar Single-Precision Floating-Point Value
1186 void cvtsi2ssl(XMMRegister dst, Register src);
1187 void cvtsi2ssl(XMMRegister dst, Address src);
1188 void cvtsi2ssq(XMMRegister dst, Register src);
1189 void cvtsi2ssq(XMMRegister dst, Address src);
1190
1191 // Convert Packed Signed Doubleword Integers to Packed Double-Precision Floating-Point Value
1192 void cvtdq2pd(XMMRegister dst, XMMRegister src);
1193
1194 // Convert Packed Signed Doubleword Integers to Packed Single-Precision Floating-Point Value
1754
1755 void sarl(Register dst, int imm8);
1756 void sarl(Register dst);
1757
1758 void sarq(Register dst, int imm8);
1759 void sarq(Register dst);
1760
1761 void sbbl(Address dst, int32_t imm32);
1762 void sbbl(Register dst, int32_t imm32);
1763 void sbbl(Register dst, Address src);
1764 void sbbl(Register dst, Register src);
1765
1766 void sbbq(Address dst, int32_t imm32);
1767 void sbbq(Register dst, int32_t imm32);
1768 void sbbq(Register dst, Address src);
1769 void sbbq(Register dst, Register src);
1770
1771 void setb(Condition cc, Register dst);
1772
1773 void shldl(Register dst, Register src);
1774 void shldl(Register dst, Register src, int8_t imm8);
1775
1776 void shll(Register dst, int imm8);
1777 void shll(Register dst);
1778
1779 void shlq(Register dst, int imm8);
1780 void shlq(Register dst);
1781
1782 void shrdl(Register dst, Register src);
1783
1784 void shrl(Register dst, int imm8);
1785 void shrl(Register dst);
1786
1787 void shrq(Register dst, int imm8);
1788 void shrq(Register dst);
1789
1790 void smovl(); // QQQ generic?
1791
1792 // Compute Square Root of Scalar Double-Precision Floating-Point Value
1793 void sqrtsd(XMMRegister dst, Address src);
1794 void sqrtsd(XMMRegister dst, XMMRegister src);
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