510 class MachNopNode : public MachIdealNode {
511 private:
512 int _count;
513 public:
514 MachNopNode( ) : _count(1) {}
515 MachNopNode( int count ) : _count(count) {}
516 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
517 virtual uint size(PhaseRegAlloc *ra_) const;
518
519 virtual const class Type *bottom_type() const { return Type::CONTROL; }
520
521 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
522 virtual const Pipeline *pipeline() const;
523 #ifndef PRODUCT
524 virtual const char *Name() const { return "Nop"; }
525 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
526 virtual void dump_spec(outputStream *st) const { } // No per-operand info
527 #endif
528 };
529
530 //------------------------------MachSpillCopyNode------------------------------
531 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
532 // location (stack or register).
533 class MachSpillCopyNode : public MachIdealNode {
534 public:
535 enum SpillType {
536 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails
537 PhiInput, // Inserted when coalescing of a phi node and its input fails
538 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks
539 LoopPhiInput, // Pre-split compares of loop-phis
540 Definition, // An lrg marked as spilled will be spilled to memory right after its definition,
541 // if in high pressure region or the lrg is bound
542 RegToReg, // A register to register move
543 RegToMem, // A register to memory move
544 MemToReg, // A memory to register move
545 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
546 // the phi and its input resides at different locations (i.e. reg or mem)
547 BasePointerToMem, // Spill base pointer to memory at safepoint
548 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be
549 // stretched beyond a new definition point, therefore we split out new copies instead
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510 class MachNopNode : public MachIdealNode {
511 private:
512 int _count;
513 public:
514 MachNopNode( ) : _count(1) {}
515 MachNopNode( int count ) : _count(count) {}
516 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
517 virtual uint size(PhaseRegAlloc *ra_) const;
518
519 virtual const class Type *bottom_type() const { return Type::CONTROL; }
520
521 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
522 virtual const Pipeline *pipeline() const;
523 #ifndef PRODUCT
524 virtual const char *Name() const { return "Nop"; }
525 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
526 virtual void dump_spec(outputStream *st) const { } // No per-operand info
527 #endif
528 };
529
530 //------------------------------MachMskNode-----------------------------------
531 // Machine function Msk Node
532 class MachMskNode : public MachIdealNode {
533 private:
534 int _restore;
535 public:
536 MachMskNode() : _restore(true) {}
537 MachMskNode(bool restore) : _restore(restore) {}
538 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
539 virtual uint size(PhaseRegAlloc *ra_) const;
540
541 virtual const class Type *bottom_type() const { return Type::CONTROL; }
542
543 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
544 #ifndef PRODUCT
545 virtual const char *Name() const { return "Msk"; }
546 virtual void format(PhaseRegAlloc *, outputStream *st) const;
547 virtual void dump_spec(outputStream *st) const { } // No per-operand info
548 #endif
549 };
550
551 //------------------------------MachSpillCopyNode------------------------------
552 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
553 // location (stack or register).
554 class MachSpillCopyNode : public MachIdealNode {
555 public:
556 enum SpillType {
557 TwoAddress, // Inserted when coalescing of a two-address-instruction node and its input fails
558 PhiInput, // Inserted when coalescing of a phi node and its input fails
559 DebugUse, // Inserted as debug info spills to safepoints in non-frequent blocks
560 LoopPhiInput, // Pre-split compares of loop-phis
561 Definition, // An lrg marked as spilled will be spilled to memory right after its definition,
562 // if in high pressure region or the lrg is bound
563 RegToReg, // A register to register move
564 RegToMem, // A register to memory move
565 MemToReg, // A memory to register move
566 PhiLocationDifferToInputLocation, // When coalescing phi nodes in PhaseChaitin::Split(), a move spill is inserted if
567 // the phi and its input resides at different locations (i.e. reg or mem)
568 BasePointerToMem, // Spill base pointer to memory at safepoint
569 InputToRematerialization, // When rematerializing a node we stretch the inputs live ranges, and they might be
570 // stretched beyond a new definition point, therefore we split out new copies instead
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