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src/hotspot/cpu/ppc/assembler_ppc.inline.hpp

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rev 47384 : 8188868: PPC64: Support AES intrinsics on Big Endian
Reviewed-by: goetz


1040 inline void Assembler::stvxl( VectorRegister d, Register s2) { emit_int32( STVXL_OPCODE  | vrt(d) | rb(s2)); }
1041 inline void Assembler::lvsl(  VectorRegister d, Register s2) { emit_int32( LVSL_OPCODE   | vrt(d) | rb(s2)); }
1042 inline void Assembler::lvsr(  VectorRegister d, Register s2) { emit_int32( LVSR_OPCODE   | vrt(d) | rb(s2)); }
1043 
1044 inline void Assembler::load_perm(VectorRegister perm, Register addr) {
1045 #if defined(VM_LITTLE_ENDIAN)
1046   lvsr(perm, addr);
1047 #else
1048   lvsl(perm, addr);
1049 #endif
1050 }
1051 
1052 inline void Assembler::vec_perm(VectorRegister first_dest, VectorRegister second, VectorRegister perm) {
1053 #if defined(VM_LITTLE_ENDIAN)
1054   vperm(first_dest, second, first_dest, perm);
1055 #else
1056   vperm(first_dest, first_dest, second, perm);
1057 #endif
1058 }
1059 








1060 inline void Assembler::load_const(Register d, void* x, Register tmp) {
1061    load_const(d, (long)x, tmp);
1062 }
1063 
1064 // Load a 64 bit constant encoded by a `Label'. This works for bound
1065 // labels as well as unbound ones. For unbound labels, the code will
1066 // be patched as soon as the label gets bound.
1067 inline void Assembler::load_const(Register d, Label& L, Register tmp) {
1068   load_const(d, target(L), tmp);
1069 }
1070 
1071 // Load a 64 bit constant encoded by an AddressLiteral. patchable.
1072 inline void Assembler::load_const(Register d, AddressLiteral& a, Register tmp) {
1073   // First relocate (we don't change the offset in the RelocationHolder,
1074   // just pass a.rspec()), then delegate to load_const(Register, long).
1075   relocate(a.rspec());
1076   load_const(d, (long)a.value(), tmp);
1077 }
1078 
1079 inline void Assembler::load_const32(Register d, int i) {


1040 inline void Assembler::stvxl( VectorRegister d, Register s2) { emit_int32( STVXL_OPCODE  | vrt(d) | rb(s2)); }
1041 inline void Assembler::lvsl(  VectorRegister d, Register s2) { emit_int32( LVSL_OPCODE   | vrt(d) | rb(s2)); }
1042 inline void Assembler::lvsr(  VectorRegister d, Register s2) { emit_int32( LVSR_OPCODE   | vrt(d) | rb(s2)); }
1043 
1044 inline void Assembler::load_perm(VectorRegister perm, Register addr) {
1045 #if defined(VM_LITTLE_ENDIAN)
1046   lvsr(perm, addr);
1047 #else
1048   lvsl(perm, addr);
1049 #endif
1050 }
1051 
1052 inline void Assembler::vec_perm(VectorRegister first_dest, VectorRegister second, VectorRegister perm) {
1053 #if defined(VM_LITTLE_ENDIAN)
1054   vperm(first_dest, second, first_dest, perm);
1055 #else
1056   vperm(first_dest, first_dest, second, perm);
1057 #endif
1058 }
1059 
1060 inline void Assembler::vec_perm(VectorRegister dest, VectorRegister first, VectorRegister second, VectorRegister perm) {
1061 #if defined(VM_LITTLE_ENDIAN)
1062   vperm(dest, second, first, perm);
1063 #else
1064   vperm(dest, first, second, perm);
1065 #endif
1066 }
1067 
1068 inline void Assembler::load_const(Register d, void* x, Register tmp) {
1069    load_const(d, (long)x, tmp);
1070 }
1071 
1072 // Load a 64 bit constant encoded by a `Label'. This works for bound
1073 // labels as well as unbound ones. For unbound labels, the code will
1074 // be patched as soon as the label gets bound.
1075 inline void Assembler::load_const(Register d, Label& L, Register tmp) {
1076   load_const(d, target(L), tmp);
1077 }
1078 
1079 // Load a 64 bit constant encoded by an AddressLiteral. patchable.
1080 inline void Assembler::load_const(Register d, AddressLiteral& a, Register tmp) {
1081   // First relocate (we don't change the offset in the RelocationHolder,
1082   // just pass a.rspec()), then delegate to load_const(Register, long).
1083   relocate(a.rspec());
1084   load_const(d, (long)a.value(), tmp);
1085 }
1086 
1087 inline void Assembler::load_const32(Register d, int i) {
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