887 inline void Assembler::stvxl( VectorRegister d, Register s2) { emit_int32( STVXL_OPCODE  | vrt(d) | rb(s2)); }
 888 inline void Assembler::lvsl(  VectorRegister d, Register s2) { emit_int32( LVSL_OPCODE   | vrt(d) | rb(s2)); }
 889 inline void Assembler::lvsr(  VectorRegister d, Register s2) { emit_int32( LVSR_OPCODE   | vrt(d) | rb(s2)); }
 890 
 891 inline void Assembler::load_perm(VectorRegister perm, Register addr) {
 892 #if defined(VM_LITTLE_ENDIAN)
 893   lvsr(perm, addr);
 894 #else
 895   lvsl(perm, addr);
 896 #endif
 897 }
 898 
 899 inline void Assembler::vec_perm(VectorRegister first_dest, VectorRegister second, VectorRegister perm) {
 900 #if defined(VM_LITTLE_ENDIAN)
 901   vperm(first_dest, second, first_dest, perm);
 902 #else
 903   vperm(first_dest, first_dest, second, perm);
 904 #endif
 905 }
 906 








 907 inline void Assembler::load_const(Register d, void* x, Register tmp) {
 908    load_const(d, (long)x, tmp);
 909 }
 910 
 911 // Load a 64 bit constant encoded by a `Label'. This works for bound
 912 // labels as well as unbound ones. For unbound labels, the code will
 913 // be patched as soon as the label gets bound.
 914 inline void Assembler::load_const(Register d, Label& L, Register tmp) {
 915   load_const(d, target(L), tmp);
 916 }
 917 
 918 // Load a 64 bit constant encoded by an AddressLiteral. patchable.
 919 inline void Assembler::load_const(Register d, AddressLiteral& a, Register tmp) {
 920   assert(d != R0, "R0 not allowed");
 921   // First relocate (we don't change the offset in the RelocationHolder,
 922   // just pass a.rspec()), then delegate to load_const(Register, long).
 923   relocate(a.rspec());
 924   load_const(d, (long)a.value(), tmp);
 925 }
 926 

 887 inline void Assembler::stvxl( VectorRegister d, Register s2) { emit_int32( STVXL_OPCODE  | vrt(d) | rb(s2)); }
 888 inline void Assembler::lvsl(  VectorRegister d, Register s2) { emit_int32( LVSL_OPCODE   | vrt(d) | rb(s2)); }
 889 inline void Assembler::lvsr(  VectorRegister d, Register s2) { emit_int32( LVSR_OPCODE   | vrt(d) | rb(s2)); }
 890 
 891 inline void Assembler::load_perm(VectorRegister perm, Register addr) {
 892 #if defined(VM_LITTLE_ENDIAN)
 893   lvsr(perm, addr);
 894 #else
 895   lvsl(perm, addr);
 896 #endif
 897 }
 898 
 899 inline void Assembler::vec_perm(VectorRegister first_dest, VectorRegister second, VectorRegister perm) {
 900 #if defined(VM_LITTLE_ENDIAN)
 901   vperm(first_dest, second, first_dest, perm);
 902 #else
 903   vperm(first_dest, first_dest, second, perm);
 904 #endif
 905 }
 906 
 907 inline void Assembler::vec_perm(VectorRegister dest, VectorRegister first, VectorRegister second, VectorRegister perm) {
 908 #if defined(VM_LITTLE_ENDIAN)
 909   vperm(dest, second, first, perm);
 910 #else
 911   vperm(dest, first, second, perm);
 912 #endif
 913 }
 914 
 915 inline void Assembler::load_const(Register d, void* x, Register tmp) {
 916    load_const(d, (long)x, tmp);
 917 }
 918 
 919 // Load a 64 bit constant encoded by a `Label'. This works for bound
 920 // labels as well as unbound ones. For unbound labels, the code will
 921 // be patched as soon as the label gets bound.
 922 inline void Assembler::load_const(Register d, Label& L, Register tmp) {
 923   load_const(d, target(L), tmp);
 924 }
 925 
 926 // Load a 64 bit constant encoded by an AddressLiteral. patchable.
 927 inline void Assembler::load_const(Register d, AddressLiteral& a, Register tmp) {
 928   assert(d != R0, "R0 not allowed");
 929   // First relocate (we don't change the offset in the RelocationHolder,
 930   // just pass a.rspec()), then delegate to load_const(Register, long).
 931   relocate(a.rspec());
 932   load_const(d, (long)a.value(), tmp);
 933 }
 934